Changes
/* Interrupt generation */
When the Gate Array sends an interrupt request:
*If the interrupts were authorized at the time of the request, then bit5 of R52 is cleared (but R52 was reset to 0 anyway) and the interrupt takes place
Deprecated: The each() function is deprecated. This message will be suppressed on further calls in /mnt/cpcwiki-httpdocs/includes/diff/DairikiDiff.php on line 434
*If interrupts are not authorized, then the R52 counter continues to increment and the interrupt remains armed (the Gate Array then maintains its INT signal). When interrupts are enabled (using the EI instruction) , bit5 of R52 is cleared and the interrupt takes place. This happens only '''after the instruction that follows EI'''
Note: On Amstrad Plus, the interrupt management system is seriously beefed up. See the [[ASIC]] wiki page.
