Notice: Trying to access array offset on value of type bool in /mnt/cpcwiki-httpdocs/includes/libs/IPSet.php on line 243

Notice: Trying to access array offset on value of type bool in /mnt/cpcwiki-httpdocs/includes/libs/IPSet.php on line 246

Notice: Trying to access array offset on value of type bool in /mnt/cpcwiki-httpdocs/includes/libs/IPSet.php on line 243

Notice: Trying to access array offset on value of type bool in /mnt/cpcwiki-httpdocs/includes/libs/IPSet.php on line 246
Changes - CPCWiki
Open main menu

Changes

Aleste 520EX

43 bytes added, 03:29, 6 February 2010
/* Gate Array Register 3 */
Writing to port #7Fxx with bit 7 and bit 6 of data set to 1 can be used to set page 3 RAM bank in Aleste mapper mode, or to define CPC RAM configuration in CPC mode.
 
See also: [[Standard Memory Expansions]].
== Upper ROM Bank ==
Nocash
6,388
edits