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PSG

64 bytes added, 16:42, 21 March 2025
/* I/O Access */
== I/O Access ==

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The PSG has 16 read/writeable data registers, and a write-only index register. Only  While there are only 16 data registers, the index register is 8-bit, not 4-bit. The higher 4 least significant -bits of the selected index register number are consideredused as chip select.
Both the index and data registers are accessed through [[8255|PPI Port A]], depending on the current setting of the BC1 and BDIR bits in [[8255|PPI Port C]]. The four possible combinations are:
Phi2x
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