Changes

Jump to: navigation, search

ASIC

41 bytes added, 22:37, 5 July 2024
/* Vectored Interrupt */
Bits2..1 of the interrupt vector provided by the ASIC to the CPU are as follows: 00 = DMA chan 2, 01 = DMA chan 1, 10 = DMA chan 0, 11 = DMA raster.

Deprecated: The each() function is deprecated. This message will be suppressed on further calls in /mnt/cpcwiki-httpdocs/includes/diff/DairikiDiff.php on line 434
Bit 0 Bit0 of the interrupt vector provided by the ASIC to the CPU is always 0. Bits2..1 of the IVR register are unused.
Bit0 of the IVR register controls whether DMA channel interrupts are automatically cleared.
Phi2x
13,173
edits
Retrieved from "https://oldwiki.cpcwiki.eu/index.php/Special:MobileDiff/117278"