Notice: Trying to access array offset on value of type bool in /mnt/cpcwiki-httpdocs/includes/libs/IPSet.php on line 243

Notice: Trying to access array offset on value of type bool in /mnt/cpcwiki-httpdocs/includes/libs/IPSet.php on line 246

Notice: Trying to access array offset on value of type bool in /mnt/cpcwiki-httpdocs/includes/libs/IPSet.php on line 243

Notice: Trying to access array offset on value of type bool in /mnt/cpcwiki-httpdocs/includes/libs/IPSet.php on line 246
Changes - CPCWiki

Changes

Gate Array

11 bytes added, 06:20, 1 July 2024
/* CSYNC */
For example, if CRTC R2=46, and CRTC HSYNC width is 14 chars then monitor hsync starts at 48 and lasts only until 51 included.
The VSYNC is also modified before being sent to the monitor. It happens two 2 lines* after the VSYNC from the CRTC and stay two a maximum of 2 lines (same cut rule if VSYNC is lower greater than 4). PAL (50Hz) does need two lines VSYNC_width, and 4µs HSYNC_width.
The Gate Array uses 2 internal counters to create its CSYNC signal:
13,173
edits