In this scheme, the BIU forms memory addresses by shifting a 16‑bit segment register four bits to the left and then adding a 16‑bit offset. This results in a 20‑bit physical address.
Although this model can be seen as complex, it allowed small programs (fitting within a 64‑KB 64KB segment) to be loaded at a fixed offset, simplifying relocation in many cases.
See: [https://www.righto.com/2023/07/8086-pins.html Reverse-engineering the 8086 processor's address and data pin circuits]