Once the ASIC is unlocked, we get access to a new [[Gate Array]] register called RMR2. It is accessible in the same way as other Gate Array registers.
<br>
= BASIC version =
<pre>
10 RESTORE
20 FOR x=0 TO 16:READ a:OUT &BC00,a:NEXT
30 DATA 255,0,255,119,179,81,168,212,98,57,156,70,43,21,138,205,238
40 PRINT"ASIC unlocked!"
</pre>
<br>
Note: As one may see, the nybbles in the sequence are based on two 4bit shift registers. For one reason or another, Amstrad has patented the verification mechanism ([[Media:Patent GB2243701A.pdf|GB2243701A]]). The patent seems to focus on ''verifying'' (rather than on ''sending'') the sequence, so its legal use is a bit unclear.
<br>
= BASIC version =
<pre>
10 RESTORE
20 FOR x=0 TO 16:READ a:OUT &BC00,a:NEXT
30 DATA 255,0,255,119,179,81,168,212,98,57,156,70,43,21,138,205,238
40 PRINT"ASIC unlocked!"
</pre>
<br>