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Changes - CPCWiki

Changes

Gate Array

8 bytes added, 19:24, 4 July 2024
/* Register RMR2 (ASIC & Advanced ROM mapping) */
11 &0000-&3FFF &4000-&7fff
The physical lower ROMs are also accessible as logical upper ROMs by using the [[Upper ROM Bank Number]] port and the RMR register.
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