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PAL16L8

6 bytes added, 14:54, 26 June 2024
/* PAL I/O port */
== PAL I/O port ==
Note that no settings are stored in the Gate Array regarding the MMR register 3, but the PAL and Gate Array share an I/O port address.
Bit14 of the PAL selection address can be at 0 or 1 on CPCs equipped with CRTCs 3, 4.
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