Faster Again
+77
Faster Again
+1
Faster Again: - Optimised using SBC A:ADD n
m-10
Added optimised version (much much faster!)
+683
Added optimised version
+903
Automatic feeding of sound generator: - Pause doesn't decrement while DMA disabled
+78
Interrupt service (Vectored interrupts): - Bit 0 tested, never set in IM0
-82
Programmable raster interrupt: - Added detailed information on HSYNC/PRI interaction.
+505
Automatic feeding of sound generator
m+3
Automatic feeding of sound generator: - Detailed information on DMA pause and prescaler
+536
New Register Map: - Improved formating of DMA regs
mFaster, accurate 8bit * 8bit Unsigned
+1,686
ASIC IVR bit 0? Anyone know this?
New Register Map: - Removed second table heading
m-36
New Register Map: - Added IVR register
+66
Interrupt service: More complete description of vectored interrupts etc. Still need some research on IM0
+2,368
Enhanced ROM cartridge support: Fixed High Bank table heading
m+3
Faster, accurate 8bit * 8bit Unsigned
+129
Added information on my new 4 bit table based multiplication routines.
+1,976
no edit summary
+132
no edit summary
+103
New page: The FastMult routine using logs can be optimised somewhat from it's original by removing the slow SET instructions and extra direct addressing operation: <pre> FastMult: ld l,c l...
mFast Sprites: - Removed DB #DD and DB #FD to use HX,LX etc
-67
Other countries
m+14
Other countries - I'm from Australia :)
+47
Austria - I don't come from Austria!
-18
Only need SRL E for MODE 0
-9
Added MODE 2 version to complete it and fixed MODE 0 comment
+1,148
Added MODE 0 version
+6