== Pipeline Design ==
Internally, the 8086 features a 16‑bit execution unit (EU) that performs arithmetic, logic, and control functions, while a separate bus interface unit (BIU) handles all data transfers and external communications. The BIU includes a 6‑byte prefetch queue (4-byte for 8088).
The BIU includes a 6‑byte prefetch queue (4-byte for 8088) that overlaps instruction fetching with execution, improving overall throughput. The EU fetches instructions from the prefetch queue (not directly from memory). It has no direct connection to the external system bus, relying entirely on the BIU for data and instruction access.
Since EU and BIU are independent, whenever the EU starts decoding and executing fetched instructions, the BIU fetches additional instruction bytes to refill the queue from memory. Externally, the 20‑bit address bus enables the processor to access up to 1 megabyte of physical memory. The BIU calculates physical addresses by shifting a segment register left by 4 bits and adding the offset.