== Pipeline Design ==
Internally, the 8086 features a 16‑bit execution unit (EU) that performs arithmetic, logic, and control functions, while a separate bus interface unit (BIU) handles all data transfers and external communications. Since EU and BIU are independent, whenever the EU starts decoding and executing fetched instructions, the BIU fetches additional instructions to the queue from memory.
The BIU includes a 6‑byte prefetch queue (4-byte for 8088) that overlaps instruction fetching with execution, improving overall throughput. Externally, the 20‑bit address bus—combined with a 16‑bit data bus—enables the processor to access up to 1 megabyte of physical memory.