These instructions are encoded in little-endian (LSB byte first). They must be located in Base 64k RAM and aligned to word boundary (the address of first byte must be even).
&4xxx 4xxxh instruction codes are partially decoded by the DMA controller. For example, the instruction code CFCFh is equivalent to 4001h.
Each DMA channel fetch one 16-bit instruction during horizontal retrace time. Once the 3 instructions have been captured, they are then executed sequentially.