Notice: Trying to access array offset on value of type bool in /mnt/cpcwiki-httpdocs/includes/libs/IPSet.php on line 243

Notice: Trying to access array offset on value of type bool in /mnt/cpcwiki-httpdocs/includes/libs/IPSet.php on line 246

Notice: Trying to access array offset on value of type bool in /mnt/cpcwiki-httpdocs/includes/libs/IPSet.php on line 243

Notice: Trying to access array offset on value of type bool in /mnt/cpcwiki-httpdocs/includes/libs/IPSet.php on line 246
Changes - CPCWiki

Changes

Z80-DART/Z80-SIO chip

3 bytes added, 15:27, 5 January 2010
has a 1-stage FIFO, plus 1 tx shift register (2-stages in total)
== Interrupt Notes==
Interrupts can occur on both channel A and channel B, certain bits (like
6,388
edits