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Gate Array

82 bytes added, 19:42, 6 July 2024
/* CSYNC signal */
For example, if CRTC R2=46, and CRTC HSYNC width is 14 chars then monitor hsync starts at 48 and lasts only until 51 included.

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On Gate Array, even if the duration of the CRTC VSYNCis reduced to 2 µseconds, the Gate Array (or ASIC) will always output black for 26 lines, including with 4 lines of C-VSYNC to the monitor. This is true even if the duration of  On ASIC/Pre-ASIC, the CRTC VSYNC is reduced must be active for the C-VSYNC signal to 2 µsecondsbe sent by the ASIC to the monitor.
The Gate Array uses 2 internal counters to create its CSYNC signal:
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