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ASIC

39 bytes removed, 12:30, 5 July 2024
/* Programmable Raster Interrupt */
The 8-bit memory-mapped register PRI (at address 6800h) specifies the scan line where the interrupt occurs. The interrupt will occur at the end of that scan line. Setting this register to 0 (the default value at power-up) reverts to the classic R52 raster interrupt system of the [[Gate Array]] instead.
The PRI can be reprogrammed as required to produce multiple interrupts per frame.

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And there is more than that. On Additionally, on Amstrad Plus, we don't have a unique source multiple sources of interrupts. Each as each DMA sound channel is also able to can trigger an interrupt. And the ASIC also provides an interrupt vector register (IVR) for vectorized interrupts.
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Phi2x
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