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Changes - CPCWiki

Changes

8255

1 byte added, 19:52, 16 April 2024
*On the ASIC PPI, Port B is always defined as input and Port C is always defined as output.
*On a real PPI chip, when the PPI control register is used (with bit7=1) to configure the ports, the output latches of all ports are reset to 0. The ASIC poorly emulates the PPI and does not reset these ports.
 
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