CPCWiki - THE Amstrad CPC encyclopedia! - User contributions [en]

File:M4FIRM v208.zip

2025-11-13T09:59:49Z

Pelrun:

Schematics

2022-08-25T06:32:52Z

Pelrun: Added link to new 6128 kicad schematics

== CPC Classic Schematics ==

<gallery caption="System Schematics">
File:Schaltplan_cpc_464.jpg|Amstrad CPC464
File:CPC664_Schematic.png|Amstrad CPC664 (main)
File:CPC664 Disk Interface Schematic.png|Amstrad CPC664 (disc)
File:CPC6128_Schematic.png|Amstrad CPC6128 (main)
File:CPC6128 Disk Interface Schematic.png|Amstrad CPC6128 (disc)
File:CPC_Disc_Cassette_Schematic.gif|Disc And Cassette Schematics
</gallery>

A full KiCad 6 schematic and pcb layout for the MC0020x CPC6128 boards (featuring the "new" gate array and 24-pin data separator IC) is available at https://github.com/pelrun/cpc-schematics

<gallery caption="Monitor Schematics">
File:GT64_Schematic.png|GT64
File:GT65_Schematic.png|GT65
File:CTM640_Schematic.png|CTM640
File:CTM644_Schematic.png|CTM644
</gallery>

<gallery caption="Disk Drive Interface Schematics">
File:DDI_Schematic.png|DDI
</gallery>

== CPC Plus Schematics ==

<gallery caption="Original Scans (high-resolution, with lots of blank space)">
File:CPC_Plus_CPU_Schematic.jpg|CPU Schematic
File:CPC_Plus_Asic_Schematic.GIF|Asic Schematic
File:CPC_Plus_Vid_Mem_Schematic.jpg|Video and Memory Schematic
File:CPC_Plus_Cassette_Schematic.jpg|Cassette Schematic
</gallery>

<gallery caption="Edited (lower resolution, less blank space, more concentrated info)">
File:Edited CPC_Plus_CPU_Schematic.gif|CPU Schematic
File:Edited CPC_Plus_Asic_Schematic.gif|Asic Schematic
File:Edited CPC_Plus_Vid_Mem_Schematic.gif|Video and Memory Schematic
File:Edited CPC_Plus_Cassette_Schematic.gif|Cassette Schematic
</gallery>

<gallery caption="Monitor Schematics">
File:MM12_Schematic.gif|MM12 Schematic
File:CM14_Power_Sound_Schematic.gif|CM14 Power And Sound Schematic
File:CM14_Video_Schematic.gif|CM14 Video Schematic
</gallery>

== GX4000 Schematics ==

<gallery caption="System Schematics">
File:GX4000_CPU_Schematic.png|CPU Schematic
File:GX4000_ASIC_Schematic.png|Asic Schematic
File:GX4000_Memory_Video_Schematic.png|Video and Memory Schematic
File:GX4000_RGB_Schematic.png|RGB Conversion Schematic
File:GX4000_Power_Schematic.png|Power Supply Schematic
</gallery>

<gallery caption="GX4000 - Edited version (lower resolution, less white space)">
File:Edited GX4000 ASIC Schematic.gif|ASIC Schematic
File:Edited GX4000 Vid Mem Cpu Schematic.gif|CPU Video Memory
File:Edited GX4000 RGB Power Schematic.gif|RGB and Power (PAL)
File:Edited GX4000 French Schematic.gif|RGB and Power (French)

</gallery>

== KC Compact Schematics (East German CPC clone) ==

<gallery>
File:Kcc schematic cpu io.gif|CPU and I/O Schematic
File:Kcc schematic memory.gif|Memory Schematic
File:Kcc schematic modulator.gif|Modulator Schematic
File:Kcc schematic video power.gif|Video and Power Schematic
File:Kcc block diagram.gif|Block Diagram
File:Kcc component map mainboard.gif|Component Map (Mainboard)
File:Kcc component map modulator.gif|Component Map (Modulator)
</gallery>

== Aleste 520EX Schematics (Russian CPC clone) ==

<gallery>
File:Aleste-Schematic1.gif|Schematic 1/4
File:Aleste-Schematic2.gif|Schematic 2/4
File:Aleste-Schematic3.gif|Schematic 3/4
File:Aleste-Schematic4.gif|Schematic 4/4
File:Aleste-Component-Map.gif|Component Map
</gallery>

For reference, the original '''unedited''' schematics are here:
[[Media:Black-Aleste-Schematic1.gif|Sheet 1]],
[[Media:Black-Aleste-Schematic2.gif|Sheet 2]],
[[Media:Black-Aleste-Schematic3.gif|Sheet 3]],
[[Media:Black-Aleste-Schematic4.gif|Sheet 4]], and
[[Media:Black-Aleste-Component-Map.gif|Component Map]]

== Additional Hardware ==
* [[3 1/2" & 5 1/4" Disk Drives]] (errr. no schematics here, no pinouts, nothing?)
* [[Peripherals]] (contains schematics - as far as any do exist)
* [[Joystick Y-cables]] (with schematics)
* [[TV Scart cable]] (with schematics)

* '''Note''' - Further schematics are found in the [[Service Manuals]].

[[Category:Hardware| ]][[Category:CPC Internal Components| ]][[Category:Amstrad CPC media]][[Category:Picture Gallery]][[Category:Electronic Component| ]][[Category:Clones|*]][[Category:CPC Plus|*]]

I/O Port Summary

2021-08-08T11:14:59Z

Pelrun: Add note about not abusing the partial address decoding.

This is a list of all known I/O ports of the Amstrad CPC, including all [[Peripherals]]. For a list showing only the built-in standard addresses see [[Default I/O Port Summary]]. The original list of I/O ports was taken from the [[FutureOS]] handbook.

== I/O Port Summary ==
Note: While most of these devices can be reached via a range of addresses due to the partial address decoding, code should never use any address other than the canonical one (all 'x'/don't care positions filled by 1's). Otherwise multiple devices will be enabled simultaneously, which is unlikely to be what you want.

{|{{Prettytable|width: 700px; font-size: 2em;}}
|'''I/O'''||'''Decoded as'''||'''Port'''||'''Read'''||'''Write'''
|-
|#1C00||%x0xxxx00 xxxxxxxx||[[Dk'tronics Lightpen]] faulty mirror of #BCXX [[CRTC]] Index|| - ||Write
|-
|#1F00||%x0xxxx11 xxxxxxxx||[[Dk'tronics Lightpen]] faulty mirror of #BFXX [[CRTC]] Data In|| Read || -
|-
|#78XX||%0xxxx000 xxxxxxxx||[[CPC4MB|4Mb Memory extension]]||-||Write
|-
|#79XX||%0xxxx001 xxxxxxxx||[[CPC4MB|4Mb Memory extension]]||-||Write
|-
|#7AXX||%0xxxx010 xxxxxxxx||[[CPC4MB|4Mb Memory extension]]||-||Write
|-
|#7BXX||%0xxxx011 xxxxxxxx||[[CPC4MB|4Mb Memory extension]]||-||Write
|-
|#7CXX||%0xxxx100 xxxxxxxx||[[CPC4MB|4Mb Memory extension]]||-||Write
|-
|#7CXX||%0xxxxx00 xxxxxxxx||[[Aleste 520EX]] RAM Mapper page 0 (extended "Gate Array 3")||Read||Write
|-
|#7DXX||%0xxxx101 xxxxxxxx||[[CPC4MB|4Mb Memory extension]]||-||Write
|-
|#7DXX||%0xxxxx01 xxxxxxxx||[[Aleste 520EX]] RAM Mapper page 1 (extended "Gate Array 3")||Read||Write
|-
|#7EXX||%0xxxx110 xxxxxxxx||[[CPC4MB|4Mb Memory extension]]||-||Write
|-
|#7EXX||%0xxxxx10 xxxxxxxx||[[Aleste 520EX]] RAM Mapper page 2 (extended "Gate Array 3")||Read||Write

|-

|#7EXX||%0xxxxxx0 xxxxxxxx||[[Y-MEM]] 512K RAM Expansion part||Read||Write

|-
|#7FXX||%0xxxx111 xxxxxxxx||[[CPC4MB|4Mb Memory extension]]||-||Write
|-
|#7FXX||%0xxxxx11 xxxxxxxx||[[Aleste 520EX]] RAM Mapper page 3 (extended "Gate Array 3")||Read||Write
|-

|#7FXX||%0xxxxxx1 xxxxxxxx||[[X-MEM]] 512K RAM Expansion part||Read||Write
|-
|#7FXX||?||[[Dk'tronics memory expansion]]||-||Write
|-
|#7FXX||?||[[Dobbertin Memory Expansion]]||-||Write
|-
|#7FXX||%01xxxxxx xxxxxxxx||[[Gate Array]]||-||Write
|-
|#7FXX||%0xxxxxxx xxxxxxxx||[[PAL16L8]] extension to [[Gate Array]] for 128K RAM banking||-||Write
|-
|#BCXX||%x0xxxx00 xxxxxxxx||6845 [[CRTC]] Index|| - ||Write
|-
|#BDXX||%x0xxxx01 xxxxxxxx||6845 [[CRTC]] Data Out|| - ||Write
|-
|#BEXX||%x0xxxx10 xxxxxxxx||6845 [[CRTC]] Status (as far as supported)||Read|| -
|-
|#BFXX||%x0xxxx11 xxxxxxxx||6845 [[CRTC]] Data In (as far as supported)||Read|| -
|-
|#DFXX||%xx0xxxxx xxxxxxxx||[[Upper ROM Bank Number]] (as decoded within CPC664, CPC6128, 464+, 6128+, decoding in ROM expansions may be different)|| - ||Write
|-
|#ECXX||%xxx0xx00 xxxxxxxx||[[KC Compact]] CIO Port B (timer)|| Read ||Write
|-
|#EDXX||%xxx0xx01 xxxxxxxx||[[KC Compact]] CIO Port C (timer)|| Read ||Write
|-
|#EEXX||%xxx0xx10 xxxxxxxx||[[KC Compact]] CIO Control|| Read ||Write
|-
|#EEXX||%xxx0xxx0 xxxxxxxx||[[Aleste 520EX]] USART 8251 (RS232/Mouse) Data|| Read ||Write
|-
|#EFXX||%xxx0xx11 xxxxxxxx||[[KC Compact]] CIO Port A (Bi-drectional [[Printer Port]])|| Read ||Write
|-
|#EFXX||%xxx0xxx1 xxxxxxxx||[[Aleste 520EX]] USART 8251 (RS232/Mouse) Control/Status|| Read ||Write
|-
|#EFXX||%xxx0xxxx xxxxxxxx||[[Printer Port]]|| - ||Write
|-
|#F0E0||?||[[Draysoft Doubler]] External Tape Data Input (Bit5)||Read|| -
|-
|#F4XX||%xxxx0x00 xxxxxxxx||[[8255]] PIO Port A ([[PSG]] Data)||Read||Write
|-
|#F5XX||%xxxx0x01 xxxxxxxx||[[8255]] PIO Port B (Vsync,[[Printer Port|PrnBusy]],Tape,etc.)||Read|| -
|-
|#F6XX||%xxxx0x10 xxxxxxxx||[[8255]] PIO Port C (KeybRow,Tape,[[PSG]] Control)|| - ||Write
|-
|#F7XX||%xxxx0x11 xxxxxxxx||[[8255]] PIO Control-Register|| - ||Write
|-
|#F880-#F88F||%1111100x 1000xxxx||[[PlayCity]] Expansion CTC channels and YMZ data|| - || Write
|-
|#F890-#F89F||%1111100x 1001xxxx||[[MultiPlay]] Expansion|| Read || -
|-
|#F8A0-#F8AF||%11111000 1010xxxx||[[X-CPC]] ClockPort RTC|| Read || Write
|-
|#F8B0||?||[[VIDI digitizer|Vidi-CPC Video-Digitiser]], CRTC Index||?||Write
|-
|#F8B1||?||[[VIDI digitizer|Vidi-CPC Video-Digitiser]], CRTC Data||?||Write
|-
|#F8DC||?||[[CPCI RS232 Interface|CPCI Serial Interface]] MC6850 Control/Status||Read||Write
|-
|#F8DD||?||[[CPCI RS232 Interface|CPCI Serial Interface]] MC6850 Data||Read||Write
|-
|#F8E0||?||[[DHCP MIDI Interface]]||Read||Write
|-
|#F8E0||%11111000 11100000||[[Schneider RS232 Interface]] Z80-STI Indirect Data Register||Read||Write
|-
|#F8E1||%11111000 11100001||[[Schneider RS232 Interface]] Z80-STI General Purpose I/O Data Register||Read||Write
|-
|#F8E2||%11111000 11100010||[[Schneider RS232 Interface]] Z80-STI Interrupt Pending Register B (unused)||Read||Write
|-
|#F8E2||?||[[Universeller EPROM Programmer 4004|Dobbertin Eprommer 4003]]||?||?
|-
|#F8E3||%11111000 11100011||[[Schneider RS232 Interface]] Z80-STI Interrupt Pending Register A (unused)||Read||Write
|-
|#F8E3||?||[[Universeller EPROM Programmer 4004|Dobbertin Eprommer 4003]]||?||?
|-
|#F8E4||%11111000 11100100||[[Schneider RS232 Interface]] Z80-STI Interrupt in-Service Register B (unused)||Read||Write
|-
|#F8E4||?||[[Universeller EPROM Programmer 4004|Dobbertin Eprommer 4003]]||?||?
|-
|#F8E5||%11111000 11100101||[[Schneider RS232 Interface]] Z80-STI Interrupt in-Service Register A (unused)||Read||Write
|-
|#F8E6||%11111000 11100110||[[Schneider RS232 Interface]] Z80-STI Interrupt Mask Register B (unused)||Read||Write
|-
|#F8E6||?||Port A - [[IDE8255]]||?||?
|-
|#F8E7||%11111000 11100111||[[Schneider RS232 Interface]] Z80-STI Interrupt Mask Register A (unused)||Read||Write
|-
|#F8E7||?||Port C - [[IDE8255]]||?||?
|-
|#F8E8||%11111000 11101000||[[Schneider RS232 Interface]] Z80-STI Indirect Index and Interrupt Vector Register||Read||Write
|-
|#F8E8||?||[[Music Machine]] Interrupt Sel|| - ||Write
|-
|#F8E9||%11111000 11101001||[[Schneider RS232 Interface]] Z80-STI Timers A and B Control Register (unused)||Read||Write
|-
|#F8EA||%11111000 11101010||[[Schneider RS232 Interface]] Z80-STI Timer B Data Register (unused)||Read||Write
|-
|#F8EB||%11111000 11101011||[[Schneider RS232 Interface]] Z80-STI Timer A Data Register (unused)||Read||Write
|-
|#F8EC||%11111000 11101100||[[Schneider RS232 Interface]] Z80-STI USART Control Register||Read||Write
|-
|#F8EC||?||[[Music Machine]] ACIA Control|| - ||Write
|-
|#F8ED||?||[[Music Machine]] ACIA Data Write|| - || Write
|-
|#F8ED||%11111000 11101101||[[Schneider RS232 Interface]] Z80-STI Receiver Status Register||Read||Write
|-
|#F8EE||?||[[Music Machine]] ACIA Status||Read|| -
|-
|#F8EE||%11111000 11101110||[[Schneider RS232 Interface]] Z80-STI Transmitter Status Register||Read||Write
|-
|#F8EF||%11111000 11101111||[[Schneider RS232 Interface]] Z80-STI USART Data Register||Read||Write
|-
|#F8EF||?||[[Music Machine]] ACIA Data Read||Read|| -
|-
|#F8FX||%xxxxx0xx 1111NNNx||[[Maplins 8bit Input Port]] and [[Maplins Weather Satellite Receiver]]||Read|| -
|-
|#F8F0||?||[[Music Machine]] DAC Write|| - ||Write
|-
|#F8F2||?||[[EMR MIDI Interface]]|| - ||Write
|-
|#F8F2||?||[[Universeller EPROM Programmer 4004|Dobbertin Eprommer 4003]]||Read||Write
|-
|-
|#F8F2||?||[[EMR MIDI Interface]]||Read||Write
|-
|#F8F4||?||[[Music Machine]] ADC Read||Read|| -

|-
|#F8F5||?||[[ARA Video Digitizer]] - Read Sync Signal (bit0)||Read|| -
|-
|#F8F8||?||[[Music Machine]] ADC Start|| - ||Write
|-
|#F8F8||?||[[ANTA 64K Memory Expansion]] ANTA 64k.3 latch||Read||Write
|-
|#F8FE||%11111000 11111110||[[Z-MEM]] Software Memory Configuration|| - || Write
|-
|#F8FF||%1111100x 111xxxxx||[[CPCISA by Yarek|CPCISA control port]]|| - ||Write
|-
|#F8FF||%xxxxx0xx 111111xx||[[Peripheral Soft Reset]] (MC_BOOT_PROGRAM and MC_START_PROGRAM do OUT [F8FF],FF)|| - ||Write
|-
|#F980-#F98F||%1111100x 1000xxxx||[[PlayCity]] Expansion CTC channels (mirror) and YMZ registers|| - || Write
|-
|#F990-#F99F||%1111100x 1001xxxx||[[MultiPlay]] Expansion (mirror)|| Read || -
|-
|#F9A0-#F9AF||%11111001 1010xxxx||[[X-CPC]] ClockPort SPR|| Read || Write
|-
|#F9B0||?||[[VIDI digitizer|Vidi-CPC Video-Digitiser]], Config (W) and Capture Data (R)||Read||Write
|-
|#F9D0||%11111000 11010000||[[Sid|SwinSID part of SONIQUE Sound Board WIP]] by [[User:DaDMaN|DaDMaN]] SwinSID1 + SwinSID2 DATA (MONO Mode / 3 Channels)||-||Write
|-
|#F9D1||%11111000 11010001||[[Sid|SwinSID part of SONIQUE Sound Board WIP]] by [[User:DaDMaN|DaDMaN]] SwinSID1 (LEFT) DATA (STEREO Mode / 6 Channels)||-||Write
|-
|#F9D2||%11111000 11010010||[[Sid|SwinSID part of SONIQUE Sound Board WIP]] by [[User:DaDMaN|DaDMaN]] SwinSID2 (RIGHT) DATA (STEREO Mode / 6 Channels)||-||Write
|-
|#F9DC||?||[[Panda Electronics Communications Interface Unit]] PPI Port A - 8bit Printer data||Read||Write
|-
|#F9DD||?||[[Panda Electronics Communications Interface Unit]] PPI Port B - 8bit general purpose I/O port||Read||Write
|-
|#F9DE||?||[[Panda Electronics Communications Interface Unit]] PPI Port C - Handshake (bit0=Strobe.out, Bit5=Busy.in)||Read||Write
|-
|#F9DF||?||[[Panda Electronics Communications Interface Unit]] PPI Control - 8bit Printer data|| - ||Write
|-
|#F9E6||?||Port B - [[IDE8255]]||?||?
|-
|#F9E7||?||RS Port - [[IDE8255]]||?||?
|-
|#F9F5||?||[[ARA Video Digitizer]] - Reset 10bit Config Value|| - ||Write
|-
|#F9F7||?||[[Grafpad II|Hegotron grafpad II]]||?||?
|-
|#F9FC - #F9FE||?||[[Otten & Fecht 1 MB RAM-Disc]]||Read||Write
|-
|#F9FF||?||[[Grafpad II|Hegotron grafpad II]]||?||?
|-
|#FA7E||%xxxxx0x0 0xxxxxxx||Floppy Motor Control (for [[765 FDC]])|| - ||Write
|-
|#FABC||%xxxxx0x0 10xxxx00||[[Aleste 520EX]] EXTPORT with CS53: Forward PPI Port A to 8253 Timer 0|| - ||Write
|-
|#FABD||%xxxxx0x0 10xxxx01||[[Aleste 520EX]] EXTPORT with CS53: Forward PPI Port A to 8253 Timer 1|| - ||Write
|-
|#FABE||%xxxxx0x0 10xxxx10||[[Aleste 520EX]] EXTPORT with CS53: Forward PPI Port A to 8253 Timer 2|| - ||Write
|-
|#FABF||%xxxxx0x0 10xxxx11||[[Aleste 520EX]] EXTPORT with CS53: Forward PPI Port A to 8253 Control|| - ||Write
|-
|#FABF||%xxxxx0x0 10xxxxxx||[[Aleste 520EX]] EXTPORT (config for internal hardware)|| - ||Write
|-
|#FAD0||%11111010 11010000||[[Sid|SwinSID part of SONIQUE Sound Board WIP]] by [[User:DaDMaN|DaDMaN]] Select SID (1&2) Register MONO mode||-||Write
|-
|#FAD1||%11111010 11010001||[[Sid|SwinSID part of SONIQUE Sound Board WIP]] by [[User:DaDMaN|DaDMaN]] Select SID1 Register||-||Write
|-
|#FAD2||%11111010 11010010||[[Sid|SwinSID part of SONIQUE Sound Board WIP]] by [[User:DaDMaN|DaDMaN]] Select SID2 Register||-||Write
|-
|#FADC||?||[[Amstrad Serial Interface]] Z80-SIO / DART port A Data Register||Read||Write
|-
|#FADC||?||[[RS-232 para Amstrad|MHT Ingenieros RS232 para Amstrad]] 8251 USART data|| Read || Write
|-
|#FADD||?||[[Amstrad Serial Interface]] Z80-SIO / DART port A Control Reg.||Read||Write
|-
|#FADD||?||[[RS-232 para Amstrad|MHT Ingenieros RS232 para Amstrad]] 8251 USART control/status|| Read || Write
|-
|#FADE||?||[[Amstrad Serial Interface]] Z80-SIO / DART port B Data Register||Read||Write
|-
|#FADF||?||[[Amstrad Serial Interface]] Z80-SIO / DART port B Control Reg.||Read||Write
|-
|#FADF||?||[[Cirkit serial interface]] 8251 UART data register||Read||Write
|-
|#FAE6||?||Port A - [[IDE8255]]||?||?
|-
|#FAE7||?||Port C - [[IDE8255]]||?||?
|-
|#FAEE||?||[[Amstrad SSA-1 Speech Synthesizer]] (faulty mirror used by included RSX driver)||Read||Write
|-
|#FAEF||%xxxxx0x0 xxx0xxxx||[[Kempston Mouse]] - Mouse Buttons||Read||-
|-
|#FAF5||?||[[ARA Video Digitizer]] - Read Capture Data||Read|| -
|-
|#FAF5||?||[[ARA Video Digitizer]] - Increment 10bit Config Value|| - ||Write
|-
|#FB7E||%xxxxx0x1 0xxxxxx0||[[765 FDC]] (internal) Status Register||Read|| -
|-
|#FB7F||%xxxxx0x1 0xxxxxx1||[[765 FDC]] (internal) Data Register||Read||Write
|-
|#FBBD||%xxxxx0xx x0xxxx0x||Ram select mode [[Vortex Expansions RAM card|Vortex SP512]]||?||Write
|-
|#FBDC||?||[[Amstrad Serial Interface]] 8253 Timer counter 0||Read||Write
|-
|#FBDC||?||[[RS-232 para Amstrad|MHT Ingenieros RS232 para Amstrad]] 8253 timer 0 (transmit baudrate)|| Read || Write
|-
|#FBDD||?||[[Amstrad Serial Interface]] 8253 Timer counter 1||Read||Write
|-
|#FBDD||?||[[RS-232 para Amstrad|MHT Ingenieros RS232 para Amstrad]] 8253 timer 1 (receive baudrate)|| Read || Write
|-
|#FBDE||?||[[Amstrad Serial Interface]] 8253 Timer counter 2||Read||Write
|-
|#FBDE||?||[[RS-232 para Amstrad|MHT Ingenieros RS232 para Amstrad]] 8253 timer 2 (used as 1ms timer)|| Read || Write
|-
|#FBDF||?||[[Amstrad Serial Interface]] 8253 Timer Modus Select|| - ||Write
|-
|#FBDF||?||[[RS-232 para Amstrad|MHT Ingenieros RS232 para Amstrad]] 8253 timer 0-2 control|| - || Write
|-
|#FBDF||?||[[Cirkit serial interface]] 8251 UART status/control register||Read||Write
|-
|#FBxx+0||?||CPCI [[Real Time Clock]] Index (DIY)||-||Write
|-
|#FBxx+1||?||CPCI [[Real Time Clock]] Data (DIY)||Read||Write
|-
|#FBE0||?||[[Dk'tronics Real Time Clock]] - Z80 PIO Port A Data (HD146818P RTC Data bus)|| Read || Write
|-
|#FBE0||?||[[Dobbertin Harddisc]] Data Port||Read||Write
|-
|#FBE1||?||[[Dk'tronics Real Time Clock]] - Z80 PIO Port B Data (General Purpose 8bit I/O Port)|| Read || Write
|-
|#FBE1||?||[[Dobbertin Harddisc]] Status, Reset||Read||Write
|-
|#FBE2||?||[[Dk'tronics Real Time Clock]] - Z80 PIO Port A Control||?|| Write
|-
|#FBE2||?||[[Dobbertin Harddisc]] Select, Configuration||Read||Write
|-
|#FBE3||?||[[Dk'tronics Real Time Clock]] - Z80 PIO Port B Control||?|| Write
|-
|#FBE3||?||[[Dobbertin Harddisc]] DMA, Interrupt||Read||Write
|-
|#FBE4||?||[[Dobbertin Harddisc]] Reset||Read||Write
|-
|#FBE6||?||Port B - [[IDE8255]]||?||?
|-
|#FBE7||?||RS Port - [[IDE8255]]||?||?
|-
|#FBE7||?||[[ACU Real Time Clock (DIY)]] Z80-PIO Data In/Out Port A ||Read||Write
|-
|#FBE8||?||[[Dk'tronics Real Time Clock]] "4bit latch" (details unknown)|| ? || Write
|-
|#FBE8||?||[[KDS_Electronics_Serial_Interface|KDS RS232]] 8253 Timer0 (RX Clock)||Read||Write
|-
|#FBE9||?||[[KDS_Electronics_Serial_Interface|KDS RS232]] 8253 Timer1 (TX Clock)||Read||Write
|-
|#FBEA||?||[[KDS_Electronics_Serial_Interface|KDS RS232]] 8253 Timer2 (not used)||Read||Write
|-
|#FBEB||?||[[KDS_Electronics_Serial_Interface|KDS RS232]] 8253 Timer Control||-||Write
|-
|#FBEC||?||[[KDS_Electronics_Serial_Interface|KDS RS232]] 6850 (reversed bit-order) Control||-||Write
|-
|#FBEC||?||[[PDS development system]] Z80 PIO Port A Data (8bit data to/from PC)||Read||Write
|-
|#FBED||?||[[KDS_Electronics_Serial_Interface|KDS RS232]] 6850 (reversed bit-order) TX Data||-||Write
|-
|#FBED||?||[[PDS development system]] Z80 PIO Port B Data (handshake to/from PC)||Read||Write
|-
|#FBEE||?||[[PDS development system]] Z80 PIO Port A Control||?||Write
|-
|#FBEE||?||[[Amstrad SSA-1 Speech Synthesizer]]||Read||Write
|-
|#FBEE||%xxxxx0x1 xxx0xxx0||[[Kempston Mouse]] - 8bit X position||Read||-
|-
|#FBEE||?||[[KDS_Electronics_Serial_Interface|KDS RS232]] 6850 (reversed bit-order) Status||Read||-
|-
|#FBEF||?||[[PDS development system]] Z80 PIO Port B Control||?||Write
|-
|#FBEF||%xxxxx0x1 xxx0xxx1||[[Kempston Mouse]] - 8bit Y position||Read||-
|-
|#FBEF||?||[[KDS_Electronics_Serial_Interface|KDS RS232]] 6850 (reversed bit-order) RX Data||Read||-
|-
|#FBEF||?||[[ACU Real Time Clock (DIY)]] Z80-PIO Data In/Out Port B ||Read||Write
|-
|#FBF0 - #FBFF||?||[[Otten & Fecht 1 MB RAM-Disc]]||Read||Write
|-
|#FBF0||%xxxx1011 1111xxxx||[[AMRAM2]]||-||Write
|-
|#FBF0||%xxxxx011 1111xxx0||[[AMSSIO]] Serial Interface MC6850 Control/Status Register||Read||Write
|-
|#FBF1||%xxxxx011 1111xxx1||[[AMSSIO]] Serial Interface MC6850 Data Register||Read||Write
|-
|#FBF5||?||[[ARA Video Digitizer]] - Invoke Video Capture|| - ||Write
|-
|#FBF6||?||[[Vortex Disc Drives]] 765 FDC (Vortex,ext) Status Register||Read|| -
|-
|#FBF7||?||[[Vortex Disc Drives]] 765 FDC (Vortex,ext) Data Register||Read||Write
|-
|#FBF7||?||[[ACU Real Time Clock (DIY)]] Z80-PIO Configure Port A ||Read||Write
|-
|#FBF8||%11111011 11111000||[[8bit Printer Port (Amstrad Action)]] Strobe/Busy||Read||Write
|-
|#FBF9||%11111011 11111001||[[8bit Printer Port (Amstrad Action)]] Data|| - ||Write
|-
|#FBFE||?||[[Amstrad Magnum Phaser|Magnum Light Phaser]]||-||Write
|-
|#FBFE||?||[[Dart Scanner for DMP-Printers]]||Read||?
|-
|#FBFE||?||[[Dk'tronics Speech Synthesizer]]||Read||Write
|-
|#FBFE||%xxxxxxxx 11111110||[[TMPI speech synthesizer]] Data Register ||||Write
|-
|#FBFF||%xxxxxxxx 11111111||[[TMPI speech synthesizer]] Command/Status Register ||Read||Write
|-
|#FBFF||?||[[ACU Real Time Clock (DIY)]] Z80-PIO Configure Port B ||Read||Write
|-
|#FC00 - #FDFF||%1111110x xxxxxxxx||[[CPCISA by Yarek|CPCISA]] 16bits mode high byte latch||Read||Write
|-
|#FC00||?||[[M4 Board]] ACK/KICK|| - ||Write
|-
|#FC5C||?||[[Z80-SIO dual ports RS232 interface for CPC (French)|French DIY Dual Port RS232]] - Baudrate Selection|| - ||Write
|-
|#FC7C||?||[[Z80-SIO dual ports RS232 interface for CPC (French)|French DIY Dual Port RS232]] - Z80-SIO Channel A Data||Read||Write
|-
|#FC7D||?||[[Z80-SIO dual ports RS232 interface for CPC (French)|French DIY Dual Port RS232]] - Z80-SIO Channel A Control/Status||Read||Write
|-
|#FC7E||?||[[Z80-SIO dual ports RS232 interface for CPC (French)|French DIY Dual Port RS232]] - Z80-SIO Channel B Data||Read||Write
|-
|#FC7F||?||[[Z80-SIO dual ports RS232 interface for CPC (French)|French DIY Dual Port RS232]] - Z80-SIO Channel B Control/Status||Read||Write
|-
|#FCE6||?||Port A - [[IDE8255]]||Read||Write
|-
|#FCE7||?||Port C - [[IDE8255]]||Read||Write
|-
|#FD00 - #FD3F||%11111101 00xxxxxx||[[Programming:SYMBiFACE_II|SYMBiFACE II]]||Read||Write
|-
|#FD08 - #FD0F||%11111101 00001xxx||[[X-Mass|X-MASS]] 2.5" 44-pin IDE interface / DOM / CF adapter (SYMBiFACE II compatible)||Read||Write
|-
|#FD40 - #FD4F||%11111101 0100xxxx||[[Programming:SYMBiFACE_III|SYMBiFACE III]]||Read||Write
|-
|#FD80 - #FD87||%11111101 10000xxx||CPC-CPLink - FIFO Interface card for Co-processors, incl. Raspberry Pi ||Read||Write
|-
|#FDE6||?||Port B - [[IDE8255]]||Read||Write
|-
|#FDE7||?||RS Port - [[IDE8255]]||Read||Write
|-
|#FE00||?||[[M4 Board]] Data|| - ||Write
|-
|#FE00 - #FFFF||%1111111x xxxxxxxx||[[CPCISA by Yarek|CPCISA]] I/O access (low byte)||Read||Write
|-
|#FE80 - #FE81||%11111110 1000000x||[[Albireo]] CH376 controller||Read||Write
|-
|#FE84 - #FEA7||%11111110 10xxx1xx||[http://shinra.cpcscene.net/willy.html Willy] Future use or multi-soundchip ||-||-
|-
|#FEAC - #FEAD||%11111110 101011xx||[http://shinra.cpcscene.net/willy.html Willy] S2P Dream SAM2965 MIDI synthetizer ||Read||Write
|-
|#FEB0 - #FEB7||%11111110 10110xxx||[[Albireo]] serial port||Read||Write
|-
|#FEBC - #FEBF||%11111110 101111xx||[http://shinra.cpcscene.net/willy.html Willy] OPL3 ||-||Write
|-
|#FEE6||?||Port A - [[IDE8255]]||Read||Write
|-
|#FEE7||?||Port C - [[IDE8255]]||Read||Write
|-
|#FEE8||%11111110 1110100x||[[Multiface II]] - Enable Multiface II ROM/RAM||-||Write
|-
|#FEEA||%11111110 1110110x||[[Multiface II]] - Disable Multiface II ROM/RAM||-||Write
|-
|#FEF0 - #FEF7||%11111110 11110xxx||[[CPC-CompactFlash]] - IDE registers||Read||Write
|-
|#FEF0 - #FEF7||%11111110 11110xxx||[[uIDE 16]] - IDE registers||Read||Write
|-
|#FF00 - #FFFF||%11111111 xxxxxxxx||AMSDAP (Amstrad MSx aDAPter, MSX-to-CPC I/O hardware interface (MSX ports #00-#ff)||Read||Write
|-
|#FF20 - #FF27||%11111111 00100xxx||MP3MSX (MP3 player) via AMSDAP||Read||Write
|-
|#FF20 - #FF27||%11111111 00100xxx||SE-ONE (MP3 player, FM radio receiver, USB master interface) via AMSDAP||Read||Write
|-
|#FF60 - #FF6F||%11111111 0110xxxx||CPC [[V9990]] [[PowerGraph]] (upcoming graphic card based on the Graphics 9000 for the MSX)||Read||Write
|-
|#FFXX||%11111111 xxxxxxxx||[[CPC Booster]] (XX=#00..#28 are used now)||Read||Write
|-
|#FFXX||%11111111 xxxxxxxx||[[Amdrum]] (unsigned 8bit DAC)||-||Write
|-
|#FFE6||?||Port B - [[IDE8255]]||Read||Write
|-
|#FFE7||?||RS Port - [[IDE8255]]||Read||Write
|-
|}

== Memory Mapped I/O Ports ==

{|{{Prettytable|width: 700px; font-size: 2em;}}
|'''Mem'''||'''Decoded as'''||'''Port'''||'''Read'''||'''Write'''
|-
|#4000-7FFF||%01xxxxxx xxxxxxxx||[[ASIC]] - CPC+/GX4000 registers|| Read || Write
|-
|#C00?||%11000000 0000000x||[[Dobbertin Smart Watch]] data read (A0=data)|| Read || -
|-
|#C00?||%11000000 0000000x||[[Dobbertin Smart Watch]] data write (A0=data)|| Read || -
|-
|}

== More Ports ==

Some more I/O addresses (which aren't included in the above list yet) are here:
* [[Schneiderware Summary]]

== Other I/O Ports ==

A number of peripherals connect to the joystick/printer ports, and so, they do not include "own" I/O addresses. This includes hardware ''other than joysticks/printers'' - for example, mice, robots, audio devices, and simple network adapters. For a more complete list, see corresponding sections on [[Digital Joysticks|Digital Joystick]] and [[Printer Port]] pages.

Aside from I/O addresses, there are some other important I/O signals, for example: [[NMI]] or [[External Interrupt|INT]].

== CPCISA ports for ISA cards ==

{|{{Prettytable|width: 700px; font-size: 2em;}}
|''Device''||''PC I/O range''||''CPCISA high''||''CPCISA low''
|-
|IDE1||1F0h..1F7h||#FDF0..#FDF7||#FFF0..#FFF7
|-
|IDE2||170h..177h||#FD70..#FD77||#FF70..#FF77
|-
|Joystick||201h..201h||#FC01..#FC01||#FE01..#FE01
|-
|Ethernet||210h..21Fh||#FC10..#FC1F||#FE10..#FE1F
|-
|Sound Blaster||220h..23Fh||#FC20..#FC3F||#FE20..#FE3F
|-
|LPT2||278h..27Fh||#FC78..#FC7F||#FE78..#FE7F
|-
|COM1||2F8h..2FFh||#FCF8..#FCFF||#FEF8..#FEFF
|-
|MIDI'||300h..301h||#FD00..#FD01||#FF00..#FF01
|-
|MIDI||330h..331h||#FD30..#FD31||#FF30..#FF31
|-
|Sound control||370h..371h||#FD70..#FD71||#FF70..#FF71
|-
|FDC1||372h..377h||#FD72..#FD77||#FF72..#FF77
|-
|LPT1||378h..37Fh||#FD78..#FD7F||#FF78..#FF7F
|-
|Sound AD-LIB||388h..38Bh||#FD88..#FD8B||#FF88..#FF8B
|-
|VGA||3B0h..3BBh||#FDB0..#FDBB||#FFB0..#FFBB
|-
|LPT3||3BCh..3BFh||#FDBC..#FDBF||#FFBC..#FFBF
|-
|VGA||3C0h..3DFh||#FDC0..#FDCF||#FFC0..#FFCF
|-
|FDC1||3F2h..3F7h||#FDF2..#FDF7||#FFF2..#FFF7
|-
|COM1||3F8h..3FFh||#FDF8..#FDFF||#FFF8..#FFFF
|-
|}

== CPCISA ports for ISA motherboard ==

{|{{Prettytable|width: 700px; font-size: 2em;}}
|''Device''||''PC I/O range''||''CPCISA high''||''CPCISA low''
|-
|DMA||000h..00Fh||#FC00..#FC0F||#FE00..#FE0F
|-
|interrupt||020h..03Fh||#FC20..#FC3F||#FE20..#FE3F
|-
|counter||040h..05Fh||#FC40..#FC5F||#FE40..#FE5F
|-
|keyboard||060h..067h||#FC60..#FC67||#FE60..#FE67
|-
|RTC||070h..071h||#FC70..#FC71||#FE70..#FE71
|-
|DMA||080h..08Fh||#FC80..#FC8F||#FE80..#FE8F
|-
|DMA||0C0h..0DFh||#FCC0..#FCDF||#FEC0..#FEDF
|-
|interrupt||0A0h..0BFh||#FCA0..#FCBF||#FEA0..#FEBF
|-
|}

[[Category:Programming]] [[Category:Stub]][[Category:CPC Internal Components]][[Category:Hardware]][[Category:Electronic Component]]

AMSDOS Memory Map

2020-11-18T09:54:05Z

Pelrun: Fix description for BE42 (points to drive A, not B)

AMSDOS uses two memory blocks. The first is always at BE40h..BE7Fh (on the 464 this region was used as Stack). The second is allocated from User RAM, typically located at A700h..ABFFh (unless other expansion ROMs with higher ROM bank number have already allocated RAM at that locations).

== AMSDOS RAM 1 (always at BE40h..BE7Fh) ==
BE40 2 Pointer to CP/M DPH for Drive A and drive B (A910h) (CPM:AE58h) (see below)
BE42 2 Pointer to XPDB for Drive A and drive B (A890h) (CPM:ADD8h)
BE44 2 Delay for Motor Spin-up in 1/50 seconds (0032h)
BE46 2 Delay for Motor Spin-down in 1/50 seconds (00FAh)
BE48 1 Delay for Formatting in whatever units (AFh)
BE49 1 Delay for whatever in milliseconds (0Fh)
BE4A 1 Delay for Track-Settle in milliseconds (0Ch)
BE4B 1 Number of bytes received in Result Phase
BE4C 7 Response from FDC in Result Phase
BE53 1 Drive HS/US
BE54 1 Track
BE55 1 Record
BE56 1 Drive HS/US
BE57 1 Track
BE58 1 Sector
BE59 1 Number of Records per Track? or (Blockmask+1)?
BE5A 1 Drive HS/US
BE5B 1 Track
BE5C 1 Record
BE5D 1 ?
BE5E 1 Flag Read/Write Sector
BE5F 1 Flag On/Off Motor
BE60 2 Pointer to 128-byte Directory Record I/O Buffer (A930h) (CPM:0080h)
BE62 2 Pointer to 512-byte Sector I/O Buffer (A9B0h) (CPM:AEF8h)
BE64 2 Stack...Temporary...? (BFxxh)
BE66 1 Number of retries (10h)
BE67 6 Ticker Block (Chain,Count,Reload)
BE6D 7 Event Block (Chain,Count,Class,Proc,Bank)
BE74 1 Desired Track or Sector Number
BE75 1 FDC Command Number
BE76 2 Pointer to 512-byte Sector I/O Buffer (A9B0h) (CPM:AEF8h)
BE78 1 Flag Enable/Disable Error Messages
BE79 1 Reserved, CPC+: 00h=Normal, FFh=Enable Keyboard Scanning during I/O
BE7A 1 Reserved, CPC+: 00h=No Disc (464+), FFh=Disc (6128+)
BE7B 2 Reserved
BE7D 2 Pointer to Memory Pool (A700h) (CPM:N/A)
BE7F 1 Hook (C9h)

== AMSDOS RAM 2 (usually at A6FCh..ABFFh) ==
A6FC 4 AMSDOS RSX Block (Next block, AMSDOS ROM bank) (0000h,0007h)
A700 1 Default Drive (00h or 01h)
A701 1 Default User (00h and up)
A702 1 Active Drive (00h or 01h)
A703 2 Pointer to DPH for Active Drive (A910h or A920h)
A705 1 Flag if OPEN on Default Drive
A706 2 Stackpointer
A708 36 Extended File Control Block for OPENIN
A72C 36 Extended File Control Block for OPENOUT
A750 74 File Header for OPENIN
A79A 74 File Header for OPENOUT
A7E4 128 Temporary Record & Filename Buffer
A864 39 Original CAS_Function Vectors (13 x 3 bytes)
A88B 3 FAR Address for RST4 in patched CAS_vectors
A88E 2 ?
A890 64 Extended Disk Parameter Block Drive A
A8D0 64 Extended Disk Parameter Block Drive B
A910 16 Disk Parameter Header Drive A
A920 16 Disk Parameter Header Drive B
A930 128 Record Buffer for Directory Records
A9B0 512 Sector Buffer
ABB0 80 Reserved

== Extended File Control Block (FCB) for OPENIN/OPENOUT ==
00h 1 Drive Number (00h=A, 01h=B, FFh=Not Open)
01h 1 User Number
02h 8 Filename (padded with 20h)
0Ah 3 Extension (padded with 20h)
0Dh 1 Extent Number (00h=First directory entry of file)
0Eh 2 Zero
10h 1 Number of Records in current Extent
11h 16 Block Numbers for current Extent
21h 3 Number of previously accessed Records

== File Header for OPENIN/OPENOUT ==
00h 1 Access Mode (1=CHAR, 2=DIRECT)
01h 2 Pointer to 2K work buffer
03h 2 Pointer to current CHAR in 2K work buffer
05h 16 User Number and Filename (padded with 00h)
15h 1 Block Number (whatever, can be zero)
16h 1 Last Block (whatever, can be zero)
17h 1 File Type (00h=Basic, 01h=EncryptedBasic, 02h=Binary)
18h 2 Data Length (whatever, can be zero)
1Ah 2 Load Address in memory
1Ch 1 First Block FFh
1Dh 2 Filesize (excluding the 80h-byte header)
1Fh 2 Entrypoint (for executable binary files)
21h 36 Unused (free for user?) (parts are used for OPENOUT)
45h 3 24bit Filepos in CHARs, or 16bit Filesize if non-ASCII file
48h 2 Checksum accross [05h..47h]

== Extended Disk Parameter Block (DPB,CSA,ALT) for Drive A/B ==
00h 2 SPT Records per Track (CPM/Data=36, IBM=32)
02h 1 BSH Block Shift (3) (records per block = 1 SHL N)
03h 1 BLM Block Mask (7) (records per block minus 1)
04h 1 EXM Extend Mask (0)
05h 2 DSM Max Block Number (CPM=170, Data=179, IBM=155)
07h 2 DRM Max Dir Entries-1 (63)
09h 2 AL Directory Allocation Table (11000000b,00000000b = Block 0,1)
0Bh 2 CKS Check Area Size (Size of the "CSA" field) (0010h)
0Dh 2 OFF Track Offset (Size of Bootstrap) (CPM=2, Data=0, IBM=1)
0Fh 1 FSC First Sector on Track (CPM=41h, Data=C1h, IBM=01h)
10h 1 PST Physical Sectors per Track (CPM/Data=9, IBM=8)
11h 1 GPS GAP3 for Sector Read/Write (2Ah)
12h 1 GPT GAP3 for Track Formatting (52h)
13h 1 FLB Fillbyte for Track Formatting (E5h)
14h 1 BPS Bytes per Sector (2=512) (80h SHL N, Shift amount or so?)
15h 1 RPS Records per Sector (4)
16h 1 Current Track
17h 1 Recalibrate Track 0 Flag
18h 1 Flag Login on any access ? (re-detect CPM/Data format?)
19h 16 CSA Checksums (directory record chksums, for sensing disk-changes)
29h 23 ALT Block Allocation Table (23x8bit = 184bit) (only 180bit used)

== Disk Parameter Header (DPH) for Drive A/B ==
00h 2 XLT Skew Factor Translation (physical-to-logical sector) (not used)
02h 2 TRACK Current Track (misused as DIRNUM by AMSDOS)
04h 2 SECTOR Current Sector
06h 2 DIRNUM Current Directory Number
08h 2 DIRBUF Pointer to Directory Buffer (A930h)
0Ah 2 DPB Pointer to DPB/XDPB (A890h/A8D0h for Drive A/B) Drive Param Block
0Ch 2 CSV Pointer to CSA (A8A9h/A8E9h for Drive A/B) Checksums
0Eh 2 ALV Pointer to ALT (A8B9h/A8F9h for Drive A/B) Allocation Table

== Finding the XDPB for a drive ==

The 2 byte pointer at &BE40 points to a list of DPH structures, 1 per drive, listed in order.
In most AMSTRAD dos there is space for 2 only.

To get the XDPB for a drive (this works on [[VDOS]], [[X-DDOS]], [[AMSDOS]] and [[Parados]]:

;; A = drive
ld l,a
ld h,0
add hl,hl
add hl,hl
add hl,hl
add hl,hl
ld de,(&be40)
add hl,de
ld de,&A
add hl,de
ld a,(hl)
inc hl
ld h,(hl)
ld l,a
;; HL = address of XDPB

On VDOS, to access the XDPB for the 3rd drive, you need to use |S,1:|A and then read it.

On Dobbertin HD and Vortex HD you can't get the XDPB for the hard disc partitions using the above code.

[[Category:Programming]]

Bonzo News

2017-07-16T14:15:32Z

Pelrun: Add PDF link

A UK fanzine written by [[Colin Harris]] of [[Nemesis]], containing information for owners of his Bonzo tape-to-disc utilities, cheats, various type-ins and very silly writeups.

Ran from 1986 to 1989, and succeeded by [[Bonzo's Scrapyard]].

== Issues ==

[[Media:bonzonews_1-25.pdf | Omnibus edition of issues 1-7, full editions of issues 8-25]]

[[Category:Fanzines]] [[Category:Papermag]]

File:Bonzonews 1-25.pdf

2017-07-16T14:06:59Z

Pelrun: Bonzo News fanzine. Summary version of issues 1-7, full version of issues 8-25.

Bonzo News fanzine. Summary version of issues 1-7, full version of issues 8-25.

Bonzo News

2017-07-16T14:04:58Z

Pelrun: Initial edit

Connector:Expansion port

2015-01-23T21:49:46Z

Pelrun: Added explanation for /BUS RESET based on 6128 schematic

== CPC Expansion Port ==

[[File:ExpansionPortEdge.gif]]

[[File:ExpansionPortPlus.png]]

EXPANSION: 50 way Delta range.

1 Sound 2 GND
3 A15 4 A14
5 A13 6 A12
7 A11 8 A10
9 A9 10 A8
11 A7 12 A6
13 A5 14 A4
15 A3 16 A2
17 A1 18 A0
19 D7 20 D6
21 D5 22 D4
23 D3 24 D2
25 D1 26 D0
27 VCC 28 *MREQ
29 *M1 30 *RFSH
31 *IORQ 32 *RD
33 *WR 34 *HALT
35 *INT 36 *NMI
37 *BUSRQ 38 *BUSAK
39 READY 40 *BRST
41 *RSET 42 *ROMEN
43 ROMDIS 44 *RAMRD
45 RAMDIS 46 CURSOR
47 LPEN 48 *EXP
49 GND 50 CLK4

== KC Compact Expansion Port ==

The [[KC Compact]] has 58pin, special-type connector
1B +12V (20mA max) 29B ............................. 1B
1A +20V 29A ............................. 1A
2B Same as CPC Pin1 (SOUND)
2A Same as CPC Pin2 (GND)
.. Same as CPC Pin3..48 (see there)
26B Same as CPC Pin49 (GND)
26A Same as CPC Pin50 (4MHz)
27B FBAS Video Output
27A PIO /TEST ;\
28B Printer Bit1 ;
28A Printer Bit0 ; for TEST mode (remote-network-boot)
29B Printer /Strobe ;
29A Printer Bit6 ;/

== Expansion Port on Aleste 520EX Expansion Port ==

The [[Aleste 520EX]] has a 62pin, male edge connector.
A1..A25 Same as <odd> CPC Pins 1..49 (ie. SOUND, A15, A14, etc.)
B1..B25 Same as <even> CPC Pins 2..50 (except B20=NC, instead /BUSRESET)
A26 MAP14 B26 MAP15
A27 MAP16 B27 MAP17 A31___________________A1
A28 MAP18 B28 MAPBLK |___________________|
A29 /INTA B29 /DISP B31 B1
A30 Agnd B30 /CPU
A31 Aucc B31 HIGH
Most of the extra pins are DMA related. The Aucc/Agnd pins are meant to be smoother voltages then VCC/GND (for use with Audio expansions).

== Amstrad PCW ==

The Amstrad PCW has a 50-pin Expansion port, too. But it's pin-outs are entirely different as on CPC.
* [[Amstrad PCW Expansion Port]]

==Signal Descriptions==
This information was originally available here: http://www.retroisle.com/amstrad/cpc/Technical/Hardware/ExpansionPorts.php

The signals are listed in alphabetical order. Signals which have a "/" prefix are "active-low".

More information for signals which are inputs to the CPU or outputs from the CPU can be found by reading other documents or datasheets about the Z80 CPU.

* +5V (5V power) The CPC power output is not able to supply many peripherals. This power output should be used to power IC's and used as a signal reference only.
* φ 4MHz Clock
* A15-A0 (Address bus; Output from CPU). A15-A0 form a 16-bit address. A15-A0 are used to specify a memory address or an I/O address.
* /BUSAK (Bus Acknowledge; Output from CPU). When /BUSAK="0" the CPU is signalling that control of the address bus, data bus and output signals has been released, and the device can take control.
* /BUS RESET (Bus Reset; Input to PIO/CPU) Acts similarly to /RESET but also resets the PIO chip.
* /BUSRQ (Bus Request; Input to CPU). When /BUSRQ="0" a device is requesting control of the address bus, data bus and the CPU's output signals. At the end of the current instruction cycle, the CPU will issue a Bus Acknowledge.
* CURSOR (Cursor; Output from CRTC). When CURSOR="1" the CRTC is displaying the cursor.
* D7-D0 (Data bus; Input to CPU/Output from CPU). D7-D0 form 8-bit data. In a I/O operation, D7-D0 are used to transfer data to/from a I/O device. In a memory operation, D7-D0 are used to transfer data to/from memory. In an interrupt request operation, D7-D0 are used to specify part of an interrupt response vector.
* /EXP (Expansion device connected; Input to PPI). The function of this signal can be used by a device to signal it's presence, it does this by setting this signal to "0". This signal is connected to bit 5 of PPI port B. This signal can be reprogrammed as input or output using the PPI, and can therefore be used as a general purpose input/output.
* Gnd (Signal Ground). Signal Ground. This can be used as a signal reference and as the Gnd connection to IC's.
* /HALT (Halt; Output from CPU). When /HALT="0" the CPU has executed a "HALT" instruction. The CPU will execute "NOP" instructions until a interrupt request is received and interrupts are not masked.
* /INT (Interrupt Request; Input to CPU). This is the maskable interrupt input to the CPU. When /INT="0" a interrupt request is signalled to the CPU. In the CPC, the interrupts are generated by the Gate-Array. In the CPC+, the interrupts are generated by the ASIC. In the KC Compact, the interrupts are generated by the Z8536 CIO.
** If interrupts are masked, the interrupt request is ignored.
** If interrupts are not masked, the interrupt request will be acknowledged.
* /IORQ (Input/Output Request; Output from CPU). When /IORQ="0" there are two possible functions:
** Interrupt acknowledge: /M1="0". The interrupt acknowledge function is used to indicate that the interrupting device can put a interrupt vector into D7-D0.
** I/O operation (read or write): /M1="1", /WR="0" OR /RD="0". The I/O operation is used to read from/write to a I/O device. When the CPU is performing a I/O operation, A15-A0 will contain the I/O address.
*** If /RD is "0" then the operation is reading from a I/O device. D7-D0 will contain data read from the selected device.
*** If /WR is "0" then the operation is writing to a I/O device. D7-D0 contain data to write to the selected device.
* L.PEN (Light Pen trigger; Input to CRTC). A low-to-high ("0" to "1") transition on this signal will cause the CRTC to store the current memory address (CRTC MA signal) it has generated. The CRTC memory address can be used to calculate the position of a light-pen/light-gun on the screen.
* /M1 (Machine cycle one; Output from CPU). When /M1="0" there are two possible functions:
** Interrupt acknowledge: /IORQ="0"
** CPU is fetching the op-code part of an instruction: /MREQ="0" and /IORQ="1"
* /MREQ (Memory Request; Output from CPU). When /MREQ="0" the CPU is performing a memory operation. A15-A0 contain the memory address.
** If /RD is "0" then the operation is reading from memory. D7-D0 will contain data read from the memory.
** If /WR is "0" then the operation is writing to memory. D7-D0 contain data to write to the memory.
* /NMI (Non-Maskable Interrupt; Input to CPU). When there is a negative-edge on this signal (signal changes from "1" to "0"), this will force the CPU to execute the non-maskable interrupt service routine at &0066. This interrupt can't be masked and has a higher priority than /INT.
* RAMDIS (Internal RAM Disable; Input to Internal RAM). When RAMDIS="1" the internal RAM of the CPC/CPC+/KC Compact is forced inactive. e.g. a ram-expansion device would use this signal to override the internal RAM selection with the ram on the device. The internal RAM would be forced inactive, and the ram on the ram-expansion would be actived.
* /RAMRD (Ram Read; Output from Gate-Array). When /RAMRD="0" a ram read operation is active. This signal is generated by the Gate-Array. This signal will be "0" when:
** A15=A14="0" and bit 2 of the Gate-Array ROM configuration register is set to 1. (lower ROM disable)
** A15=A14="1" and bit 3 of the Gate-Array ROM configuration register is set to 1. (upper ROM disable)
** A15 is not equal to A14.
* /RD (Read; Output from CPU). When /RD="0" the CPU is performing a read operation. The operations are:
** Reading from a I/O device: (/IORQ="0", A15-A0 contain I/O address)
** Reading from memory (/MREQ="0", A15-A0 contain memory address)
* /RESET (Reset; Input to CPU). When /RESET="0" the CPU is held in the reset state. When the reset state is released, the CPU Program Counter (PC) is set to "0" and execution begins resumes from the new PC address.
* /RFSH (Refresh; Output from CPU). When /RFSH="0" and /MREQ="0" this indicates that A6-A0 contain a refresh memory address that can be used to refresh the memory
* ROMDIS (Internal ROM Disable; Input to internal ROM). When ROMDIS="1" the internal ROM of the CPC/CPC+/KC Compact is forced inactive. e.g. a ROM-board device would use this signal to override the ROM selection with a ROM plugged into the device. The internal ROM would be forced inactive, and the selected expansion ROM would be activated.
* /ROMEN (ROM Enable; Output from Gate-Array). When /ROMEN="0" a ROM read operation is active. This signal is generated by the Gate-Array. This signal will be "0" when:
** A15=A14="0" and bit 2 of the Gate-Array ROM configuration register is set to 0, (lower ROM enable)
** A15=A14="1" and bit 3 of the Gate-Array ROM configuration register is set to 0. (upper ROM enable)
** A expansion device (e.g. a ROM-board) can use this signal to activate the selected ROM plugged into the device.
* Sound (Mono Audio; Output from PSG). This is a mono audio signal generated by mixing the 3 PSG audio channels together.
* /WAIT (Wait; Input to CPU, Output from Gate-Array). When /WAIT="0" this signal is used to delay memory or I/O access by the CPU. This signal is used to force the CPU to access memory or I/O when it is ready. This signal is generated by the Gate-Array.
* /WR (Write; Output from CPU). When /WR="0" the CPU is performing a write operation. The operations are:
** Writing to a I/O device: (/IORQ="0", A15-A0 contain I/O address)
** Writing to memory (/MREQ="0", A15-A0 contain memory address)

[[Category:Peripherals]][[Category:CPC Internal Components]][[Category:CPC Plus]]

Solavox

2014-04-24T12:57:50Z

Pelrun: Added Awa to the used brand names sentence.

[[Solavox]] is one the [[LK-selectable Brand Names]] contained in the CPC BIOS.

Solavox is a manufacturer for HiFi speakers and televisions sets.

* Comet was the exclusive distributor for Solavox.
* Solavox. Brand name used by Comet Group plc.
* Comet Group Plc, Criterion House, George Street, Hull. HU1 3AU, UK

== Solavox and CPC ==

'''Solavox''' is also included in the CPCs alternative manufacturer names, which are predefined in the BIOS ROM, and are jumper-selectable via [[8255|PPI Port B]]. Amstrad was apparently planning to allow Solavox (and some other companies) to redistribute the CPC computers.

Of these pre-defined brand names, only [[Amstrad]], [[Schneider]] (german distributor) and [[Awa]] (australian distributor) were used. Another distributor was [[Indescomp]] (spain), this company wasn't included in the BIOS ROM, and so, Indescomp CPCs usually displayed [[Amstrad]] in the boot message, for some reason (maybe accidently) a few Indescomp CPCs displayed [[Solavox]]. For best confusion, this happened in '''Indescomp U.S.A.''' models, whilst Solavox / Comet Group are '''UK''' based companies.

== The "Solavox" CPC 6128 ==

The Solavox CPC 6128 is a [[Schneider]] CPC 6128 (metal inner-cover and centronics connectors) inside a standard [[Amstrad]] CPC 6128 case, with British keyboard and [[Solavox]] startup, produced by [[Indescomp]]. No external Solavox logos or labels, nothing unusual but the sticker on the back, which reads:

Indescomp International U.S.A., inc.
1313 E. Westleigh Rd.
P.O.Box 592, Lake Forest Illinois 60045, U.S.A.
Manufactured: November 1985

Not "Amstrad USA", but "Indescomp USA".

There are at least three known Solavox units on Spain, so it seems some of them were marketed here for any strange reason.

Note: Indescomp USA did actually officially launch the CPC 6128 (see [[:File:Amstrad Computer User8508 007.jpg|here]]).

== Real Solavox Pictures ==

<gallery>
File:Solavox-tk30-in-speakers-front.jpg
File:Solavox-tk30-in-speakers-boxed.jpg
File:Solavox 14inch.jpg
File:Solavox 140.jpg
</gallery>

[[Category:CPC History]]