CPCWiki - THE Amstrad CPC encyclopedia! - User contributions [en]

Main Page

2016-01-05T04:26:06Z

Executioner:

__NOTOC__
<center>This site is an encyclopaedia on all things [[Amstrad|Amstrad]] [[CPC|CPC]] related. There are now '''[[Special:Allpages|{{NUMBEROFARTICLES}} articles]]''' about the CPC available.</center>
<center>[[Image:forum.png|300px|link=http://www.cpcwiki.eu/forum]] [[Image:Vs.png|300px|link=http://www.cpcwiki.eu/index.php/Speccy_Port]]</center><br>

<div style="border: 1px solid rgb(255, 201, 201); margin: 0px 0px 5px; padding: 0.5em 1em; background-color: rgb(255, 243, 243);">
<center> '''CPC Related News''' </center>

[[File:Traxtor.png|thumb|320px|[http://www.cpcwiki.eu/forum/games/new-game-the-return-of-traxtor/ The Return of Traxtor]]]

<div style="height:20em; overflow:auto; border: 1px solid #FFC9C9">

*5/1/16: '''[[WinApe|WinAPE]]''' 2.0 Beta 2 released. [http://www.winape.net/ Download]
*20/12/15: After more than one decade Overlanders released [http://www.pouet.net/prod.php?which=66699/ Points Barres]
*27/11/15: New game released! [http://www.cpcwiki.eu/forum/games/new-game-the-return-of-traxtor/ The Return of Traxtor]
*26/11/15: '''[[WinApe|WinAPE]]''' 2.0 Beta 1 released. [http://www.winape.net/ Download]
*02/09/15: '''iMPdraw Lite v1.132''' is now released. [http://www.cpcwiki.eu/forum/programming/impdraw-v1-0f/60/ Download]
*28/08/15: '''[[FutureOS]] system .8''' comprehensive update released. [http://futureos.cpc-live.com Download]
*27/08/15: [[MegaFlashROManager|ROManager]] 2.14 released. [http://futureos.cpc-live.com/files/ROManager_ALL.zip Download]
*11/05/15: '''CPCtelera''', a cross-platform game development framework was [http://www.cpcwiki.eu/index.php/CPCtelera released]
*21/03/15: '''[[C4CPC]]''', a cartridge replacement for PLUS and GX4000 was [http://www.cpcwiki.eu/index.php/C4CPC released]
*02/01/15: [[Cosmos|COSMOS]] v.22 (final version) has been [http://www.cpcwiki.eu/index.php/Cosmos released]
*14/12/14: '''X-MASS''', Add a [http://www.cpcwiki.eu/forum/news-events/x-mass-a-mass-storage-expansion-for-all-cpc/msg91048/#msg91048 128MB mass-storage] to your CPC.
*30/08/14: '''[[SymbOS]]''' 2.1 Final [http://www.cpcwiki.eu/forum/news-events/symbos-2-1-final-released released]
*14/08/14: '''[[PlayCity]]''', Add [http://www.cpcwiki.eu/forum/amstrad-cpc-hardware/playcity-aka-ctc-ay-(mx4)-for-august-!!!/ 6ch stereo audio, Z80 CTC...] to your CPC.
*22/04/14: '''X-MEM''', Add up to [http://www.cpcwiki.eu/forum/news-events/x-mem-a-new-memory-expansion-for-all-cpc/ 512K RAM/ROM] on your 464/664/6128.
</div>



<center><gallery widths=128px heights=96px>
Image:Cpctelera compo.jpg|[http://www.cpcwiki.eu/index.php/CPCtelera CPCtelera]
Image:C4CPC_CprSelect.png|[http://www.cpcwiki.eu/index.php/C4CPC C4CPC]
Image:X-MASS01.jpg|[http://www.cpcwiki.eu/forum/news-events/x-mass-a-mass-storage-expansion-for-all-cpc/msg91048/#msg91048 X-MASS MX4 Board]
Image:symbos21cpc.gif|[[SymbOS]] 2.1
Image:PlayCity.jpg|[http://www.cpcwiki.eu/index.php/PlayCity PlayCity]



</gallery></center>

<div align=right>...[[OldNews|Older News]]...</div>
</div>

{| width="100%" class="FCK__ShowTableBorders"
|- valign="top"
| <div style="border: 1px solid rgb(176, 176, 176); margin: 0px 0px 5px; padding: 0.5em 1em; background-color: rgb(238, 238, 238);">

=== CPCWiki related ===
*[[CPCWiki updates]]
*[[Donors]]

'''Become an Author!'''
<createbox>
default=Enter name of article to create
buttonlabel=Create article!
width=40
</createbox>
</div>

<div style="border: 1px solid rgb(176, 176, 176); margin: 0px 0px 5px; padding: 0.5em 1em; background-color: rgb(238, 238, 238);">

<div style="text-align: right;"><small>'''All [[Special:Wantedpages|wanted articles]]''' | [[:Category:Stub|Extendable Stubs]] | '''[[Special:ContributionScores|List of most active contributors]]'''</small></div>

| width="50%" style="vertical-align: top;" | <div style="border: 1px solid rgb(228, 222, 222); margin: 0px 0px 5px; padding: 0.5em 1em; background-color: rgb(249, 249, 249);">

=== Did you know? ===

*When the 664 was being developed, Sugar was already looking (and hinting publicly!) at the 6128
*The [[472|CPC 472]] was a model released in Spain with an extra unaccessible 8 KB of RAM to circumvent a spanish tax that was charged on imported machines with up to 64 KB memory.

*With a possible total amount of '''832 x 288 pixel''' (576 interlaced) the [[CPC|CPC]] was the 8 bit homecomputer with the highest screen resolution ever.

*'''OpenOffice''' for Windows/Linux is a direct descendant of [[Star-Division|StarWriter]] for the CPC.
*The transfer speed of the [[CPC Booster|CPC Booster +]] serial interface is faster than a standard '''DSL connection'''.

*[[SymbOS|SymbOS]] can handle more than '''50 times''' bigger hard discs than MS Windows 95A.
*[[FutureOS|FutureOS]] can load 178 KB in '''9 seconds''' from floppy disc and manages up to '''4 MB''' of RAM
</div>
</div>

|}

Main Page

2016-01-05T04:24:54Z

Executioner:

__NOTOC__
<center>This site is an encyclopaedia on all things [[Amstrad|Amstrad]] [[CPC|CPC]] related. There are now '''[[Special:Allpages|{{NUMBEROFARTICLES}} articles]]''' about the CPC available.</center>
<center>[[Image:forum.png|300px|link=http://www.cpcwiki.eu/forum]] [[Image:Vs.png|300px|link=http://www.cpcwiki.eu/index.php/Speccy_Port]]</center><br>

<div style="border: 1px solid rgb(255, 201, 201); margin: 0px 0px 5px; padding: 0.5em 1em; background-color: rgb(255, 243, 243);">
<center> '''CPC Related News''' </center>

[[File:Traxtor.png|thumb|320px|[http://www.cpcwiki.eu/forum/games/new-game-the-return-of-traxtor/ The Return of Traxtor]]]

<div style="height:20em; overflow:auto; border: 1px solid #FFC9C9">

*6/1/16: '''[[WinApe|WinAPE]]''' 2.0 Beta 2 released. [http://www.winape.net/ Download]
*20/12/15: After more than one decade Overlanders released [http://www.pouet.net/prod.php?which=66699/ Points Barres]
*27/11/15: New game released! [http://www.cpcwiki.eu/forum/games/new-game-the-return-of-traxtor/ The Return of Traxtor]
*26/11/15: '''[[WinApe|WinAPE]]''' 2.0 Beta 1 released. [http://www.winape.net/ Download]
*02/09/15: '''iMPdraw Lite v1.132''' is now released. [http://www.cpcwiki.eu/forum/programming/impdraw-v1-0f/60/ Download]
*28/08/15: '''[[FutureOS]] system .8''' comprehensive update released. [http://futureos.cpc-live.com Download]
*27/08/15: [[MegaFlashROManager|ROManager]] 2.14 released. [http://futureos.cpc-live.com/files/ROManager_ALL.zip Download]
*11/05/15: '''CPCtelera''', a cross-platform game development framework was [http://www.cpcwiki.eu/index.php/CPCtelera released]
*21/03/15: '''[[C4CPC]]''', a cartridge replacement for PLUS and GX4000 was [http://www.cpcwiki.eu/index.php/C4CPC released]
*02/01/15: [[Cosmos|COSMOS]] v.22 (final version) has been [http://www.cpcwiki.eu/index.php/Cosmos released]
*14/12/14: '''X-MASS''', Add a [http://www.cpcwiki.eu/forum/news-events/x-mass-a-mass-storage-expansion-for-all-cpc/msg91048/#msg91048 128MB mass-storage] to your CPC.
*30/08/14: '''[[SymbOS]]''' 2.1 Final [http://www.cpcwiki.eu/forum/news-events/symbos-2-1-final-released released]
*14/08/14: '''[[PlayCity]]''', Add [http://www.cpcwiki.eu/forum/amstrad-cpc-hardware/playcity-aka-ctc-ay-(mx4)-for-august-!!!/ 6ch stereo audio, Z80 CTC...] to your CPC.
*22/04/14: '''X-MEM''', Add up to [http://www.cpcwiki.eu/forum/news-events/x-mem-a-new-memory-expansion-for-all-cpc/ 512K RAM/ROM] on your 464/664/6128.
</div>



<center><gallery widths=128px heights=96px>
Image:Cpctelera compo.jpg|[http://www.cpcwiki.eu/index.php/CPCtelera CPCtelera]
Image:C4CPC_CprSelect.png|[http://www.cpcwiki.eu/index.php/C4CPC C4CPC]
Image:X-MASS01.jpg|[http://www.cpcwiki.eu/forum/news-events/x-mass-a-mass-storage-expansion-for-all-cpc/msg91048/#msg91048 X-MASS MX4 Board]
Image:symbos21cpc.gif|[[SymbOS]] 2.1
Image:PlayCity.jpg|[http://www.cpcwiki.eu/index.php/PlayCity PlayCity]



</gallery></center>

<div align=right>...[[OldNews|Older News]]...</div>
</div>

{| width="100%" class="FCK__ShowTableBorders"
|- valign="top"
| <div style="border: 1px solid rgb(176, 176, 176); margin: 0px 0px 5px; padding: 0.5em 1em; background-color: rgb(238, 238, 238);">

=== CPCWiki related ===
*[[CPCWiki updates]]
*[[Donors]]

'''Become an Author!'''
<createbox>
default=Enter name of article to create
buttonlabel=Create article!
width=40
</createbox>
</div>

<div style="border: 1px solid rgb(176, 176, 176); margin: 0px 0px 5px; padding: 0.5em 1em; background-color: rgb(238, 238, 238);">

<div style="text-align: right;"><small>'''All [[Special:Wantedpages|wanted articles]]''' | [[:Category:Stub|Extendable Stubs]] | '''[[Special:ContributionScores|List of most active contributors]]'''</small></div>

| width="50%" style="vertical-align: top;" | <div style="border: 1px solid rgb(228, 222, 222); margin: 0px 0px 5px; padding: 0.5em 1em; background-color: rgb(249, 249, 249);">

=== Did you know? ===

*When the 664 was being developed, Sugar was already looking (and hinting publicly!) at the 6128
*The [[472|CPC 472]] was a model released in Spain with an extra unaccessible 8 KB of RAM to circumvent a spanish tax that was charged on imported machines with up to 64 KB memory.

*With a possible total amount of '''832 x 288 pixel''' (576 interlaced) the [[CPC|CPC]] was the 8 bit homecomputer with the highest screen resolution ever.

*'''OpenOffice''' for Windows/Linux is a direct descendant of [[Star-Division|StarWriter]] for the CPC.
*The transfer speed of the [[CPC Booster|CPC Booster +]] serial interface is faster than a standard '''DSL connection'''.

*[[SymbOS|SymbOS]] can handle more than '''50 times''' bigger hard discs than MS Windows 95A.
*[[FutureOS|FutureOS]] can load 178 KB in '''9 seconds''' from floppy disc and manages up to '''4 MB''' of RAM
</div>
</div>

|}

Main Page

2015-11-26T04:50:57Z

Executioner:

__NOTOC__
<center>This site is an encyclopaedia on all things [[Amstrad|Amstrad]] [[CPC|CPC]] related. There are now '''[[Special:Allpages|{{NUMBEROFARTICLES}} articles]]''' about the CPC available.</center>
<center>[[Image:forum.png|300px|link=http://www.cpcwiki.eu/forum]] [[Image:Vs.png|300px|link=http://www.cpcwiki.eu/index.php/Speccy_Port]]</center><br>

<div style="border: 1px solid rgb(255, 201, 201); margin: 0px 0px 5px; padding: 0.5em 1em; background-color: rgb(255, 243, 243);">
<center> '''CPC Related News''' </center>
<center>

[[File:Cpctelera compo.jpg|thumb|320px|[http://www.cpcwiki.eu/index.php/CPCtelera CPCtelera]]]</center><br>

<div style="height:20em; overflow:auto; border: 1px solid #FFC9C9">

*26/11/15: '''[[WinApe|WinAPE]]''' 2.0 Beta 1 released. [http://www.winape.net/ Download]
*02/09/15: '''[[iMPdraw Lite v1.132]]''' is now released. [http://www.cpcwiki.eu/forum/programming/impdraw-v1-0f/60/ Download]
*28/08/15: '''[[FutureOS]] system .8''' comprehensive update released. [http://futureos.cpc-live.com Download]
*27/08/15: [[MegaFlashROManager|ROManager]] 2.14 released. [http://futureos.cpc-live.com/files/ROManager_ALL.zip Download]
*11/05/15: '''CPCtelera''', a cross-platform game development framework was [http://www.cpcwiki.eu/index.php/CPCtelera released]
*21/03/15: '''[[C4CPC]]''', a cartridge replacement for PLUS and GX4000 was [http://www.cpcwiki.eu/index.php/C4CPC released]
*02/01/15: [[Cosmos|COSMOS]] v.22 (final version) has been [http://www.cpcwiki.eu/index.php/Cosmos released]
*14/12/14: '''X-MASS''', Add a [http://www.cpcwiki.eu/forum/news-events/x-mass-a-mass-storage-expansion-for-all-cpc/msg91048/#msg91048 128MB mass-storage] to your CPC.
*30/08/14: '''[[SymbOS]]''' 2.1 Final [http://www.cpcwiki.eu/forum/news-events/symbos-2-1-final-released released]
*14/08/14: '''[[PlayCity]]''', Add [http://www.cpcwiki.eu/forum/amstrad-cpc-hardware/playcity-aka-ctc-ay-(mx4)-for-august-!!!/ 6ch stereo audio, Z80 CTC...] to your CPC.
*22/04/14: '''X-MEM''', Add up to [http://www.cpcwiki.eu/forum/news-events/x-mem-a-new-memory-expansion-for-all-cpc/ 512K RAM/ROM] on your 464/664/6128.
*20/04/14: '''Breaking Baud''', [http://www.cpcwiki.eu/forum/demos/breaking-baud/ THE tape demo]. 2nd place at Revision!
*30/03/14: '''Superpix''', a new Picross-style game was [http://www.cpc-power.com/index.php?page=detail&num=10000 released].
*24/03/14: '''SAMdisk''' 3.8.2 [http://simonowen.com/samdisk/ released].
*23/03/14: [[PSX controller mod for Amstrad CPC]] by [[User:Forcy|Forcy]]
</div>
<br>



<center><gallery widths=128px heights=96px>

Image:C4CPC_CprSelect.png|[http://www.cpcwiki.eu/index.php/C4CPC C4CPC]
Image:X-MASS01.jpg|[http://www.cpcwiki.eu/forum/news-events/x-mass-a-mass-storage-expansion-for-all-cpc/msg91048/#msg91048 X-MASS MX4 Board]

Image:PlayCity.jpg|[http://www.cpcwiki.eu/index.php/PlayCity PlayCity]
Image:symbos21cpc.gif|[[SymbOS]] 2.1
Image:superpix.png|[http://www.cpc-power.com/index.php?page=detail&num=10000 Superpix]



</gallery></center>

<div align=right>...[[OldNews|Older News]]...</div>
</div>

{| width="100%" class="FCK__ShowTableBorders"
|- valign="top"
| <div style="border: 1px solid rgb(176, 176, 176); margin: 0px 0px 5px; padding: 0.5em 1em; background-color: rgb(238, 238, 238);">

=== CPCWiki related ===
*[[CPCWiki updates]]
*[[Donors]]

'''Become an Author!'''
<createbox>
default=Enter name of article to create
buttonlabel=Create article!
width=40
</createbox>
</div>

<div style="border: 1px solid rgb(176, 176, 176); margin: 0px 0px 5px; padding: 0.5em 1em; background-color: rgb(238, 238, 238);">

<div style="text-align: right;"><small>'''All [[Special:Wantedpages|wanted articles]]''' | [[:Category:Stub|Extendable Stubs]] | '''[[Special:ContributionScores|List of most active contributors]]'''</small></div>

| width="50%" style="vertical-align: top;" | <div style="border: 1px solid rgb(228, 222, 222); margin: 0px 0px 5px; padding: 0.5em 1em; background-color: rgb(249, 249, 249);">

=== Did you know? ===

*When the 664 was being developed, Sugar was already looking (and hinting publicly!) at the 6128
*The [[472|CPC 472]] was a model released in Spain with an extra unaccessible 8 KB of RAM to circumvent a spanish tax that was charged on imported machines with up to 64 KB memory.

*With a possible total amount of '''832 x 288 pixel''' (576 interlaced) the [[CPC|CPC]] was the 8 bit homecomputer with the highest screen resolution ever.

*'''OpenOffice''' for Windows/Linux is a direct descendant of [[Star-Division|StarWriter]] for the CPC.
*The transfer speed of the [[CPC Booster|CPC Booster +]] serial interface is faster than a standard '''DSL connection'''.

*[[SymbOS|SymbOS]] can handle more than '''50 times''' bigger hard discs than MS Windows 95A.
*[[FutureOS|FutureOS]] can load 178 KB in '''9 seconds''' from floppy disc and manages up to '''4 MB''' of RAM
</div>
</div>

|}

Main Page

2015-11-26T04:50:31Z

Executioner:

__NOTOC__
<center>This site is an encyclopaedia on all things [[Amstrad|Amstrad]] [[CPC|CPC]] related. There are now '''[[Special:Allpages|{{NUMBEROFARTICLES}} articles]]''' about the CPC available.</center>
<center>[[Image:forum.png|300px|link=http://www.cpcwiki.eu/forum]] [[Image:Vs.png|300px|link=http://www.cpcwiki.eu/index.php/Speccy_Port]]</center><br>

<div style="border: 1px solid rgb(255, 201, 201); margin: 0px 0px 5px; padding: 0.5em 1em; background-color: rgb(255, 243, 243);">
<center> '''CPC Related News''' </center>
<center>

[[File:Cpctelera compo.jpg|thumb|320px|[http://www.cpcwiki.eu/index.php/CPCtelera CPCtelera]]]</center><br>

<div style="height:20em; overflow:auto; border: 1px solid #FFC9C9">

*26/11/15: '''[[WinAPE|WinApe]]''' 2.0 Beta 1 released. [http://www.winape.net/ Download]
*02/09/15: '''[[iMPdraw Lite v1.132]]''' is now released. [http://www.cpcwiki.eu/forum/programming/impdraw-v1-0f/60/ Download]
*28/08/15: '''[[FutureOS]] system .8''' comprehensive update released. [http://futureos.cpc-live.com Download]
*27/08/15: [[MegaFlashROManager|ROManager]] 2.14 released. [http://futureos.cpc-live.com/files/ROManager_ALL.zip Download]
*11/05/15: '''CPCtelera''', a cross-platform game development framework was [http://www.cpcwiki.eu/index.php/CPCtelera released]
*21/03/15: '''[[C4CPC]]''', a cartridge replacement for PLUS and GX4000 was [http://www.cpcwiki.eu/index.php/C4CPC released]
*02/01/15: [[Cosmos|COSMOS]] v.22 (final version) has been [http://www.cpcwiki.eu/index.php/Cosmos released]
*14/12/14: '''X-MASS''', Add a [http://www.cpcwiki.eu/forum/news-events/x-mass-a-mass-storage-expansion-for-all-cpc/msg91048/#msg91048 128MB mass-storage] to your CPC.
*30/08/14: '''[[SymbOS]]''' 2.1 Final [http://www.cpcwiki.eu/forum/news-events/symbos-2-1-final-released released]
*14/08/14: '''[[PlayCity]]''', Add [http://www.cpcwiki.eu/forum/amstrad-cpc-hardware/playcity-aka-ctc-ay-(mx4)-for-august-!!!/ 6ch stereo audio, Z80 CTC...] to your CPC.
*22/04/14: '''X-MEM''', Add up to [http://www.cpcwiki.eu/forum/news-events/x-mem-a-new-memory-expansion-for-all-cpc/ 512K RAM/ROM] on your 464/664/6128.
*20/04/14: '''Breaking Baud''', [http://www.cpcwiki.eu/forum/demos/breaking-baud/ THE tape demo]. 2nd place at Revision!
*30/03/14: '''Superpix''', a new Picross-style game was [http://www.cpc-power.com/index.php?page=detail&num=10000 released].
*24/03/14: '''SAMdisk''' 3.8.2 [http://simonowen.com/samdisk/ released].
*23/03/14: [[PSX controller mod for Amstrad CPC]] by [[User:Forcy|Forcy]]
</div>
<br>



<center><gallery widths=128px heights=96px>

Image:C4CPC_CprSelect.png|[http://www.cpcwiki.eu/index.php/C4CPC C4CPC]
Image:X-MASS01.jpg|[http://www.cpcwiki.eu/forum/news-events/x-mass-a-mass-storage-expansion-for-all-cpc/msg91048/#msg91048 X-MASS MX4 Board]

Image:PlayCity.jpg|[http://www.cpcwiki.eu/index.php/PlayCity PlayCity]
Image:symbos21cpc.gif|[[SymbOS]] 2.1
Image:superpix.png|[http://www.cpc-power.com/index.php?page=detail&num=10000 Superpix]



</gallery></center>

<div align=right>...[[OldNews|Older News]]...</div>
</div>

{| width="100%" class="FCK__ShowTableBorders"
|- valign="top"
| <div style="border: 1px solid rgb(176, 176, 176); margin: 0px 0px 5px; padding: 0.5em 1em; background-color: rgb(238, 238, 238);">

=== CPCWiki related ===
*[[CPCWiki updates]]
*[[Donors]]

'''Become an Author!'''
<createbox>
default=Enter name of article to create
buttonlabel=Create article!
width=40
</createbox>
</div>

<div style="border: 1px solid rgb(176, 176, 176); margin: 0px 0px 5px; padding: 0.5em 1em; background-color: rgb(238, 238, 238);">

<div style="text-align: right;"><small>'''All [[Special:Wantedpages|wanted articles]]''' | [[:Category:Stub|Extendable Stubs]] | '''[[Special:ContributionScores|List of most active contributors]]'''</small></div>

| width="50%" style="vertical-align: top;" | <div style="border: 1px solid rgb(228, 222, 222); margin: 0px 0px 5px; padding: 0.5em 1em; background-color: rgb(249, 249, 249);">

=== Did you know? ===

*When the 664 was being developed, Sugar was already looking (and hinting publicly!) at the 6128
*The [[472|CPC 472]] was a model released in Spain with an extra unaccessible 8 KB of RAM to circumvent a spanish tax that was charged on imported machines with up to 64 KB memory.

*With a possible total amount of '''832 x 288 pixel''' (576 interlaced) the [[CPC|CPC]] was the 8 bit homecomputer with the highest screen resolution ever.

*'''OpenOffice''' for Windows/Linux is a direct descendant of [[Star-Division|StarWriter]] for the CPC.
*The transfer speed of the [[CPC Booster|CPC Booster +]] serial interface is faster than a standard '''DSL connection'''.

*[[SymbOS|SymbOS]] can handle more than '''50 times''' bigger hard discs than MS Windows 95A.
*[[FutureOS|FutureOS]] can load 178 KB in '''9 seconds''' from floppy disc and manages up to '''4 MB''' of RAM
</div>
</div>

|}

Main Page

2015-11-26T04:49:10Z

Executioner:

__NOTOC__
<center>This site is an encyclopaedia on all things [[Amstrad|Amstrad]] [[CPC|CPC]] related. There are now '''[[Special:Allpages|{{NUMBEROFARTICLES}} articles]]''' about the CPC available.</center>
<center>[[Image:forum.png|300px|link=http://www.cpcwiki.eu/forum]] [[Image:Vs.png|300px|link=http://www.cpcwiki.eu/index.php/Speccy_Port]]</center><br>

<div style="border: 1px solid rgb(255, 201, 201); margin: 0px 0px 5px; padding: 0.5em 1em; background-color: rgb(255, 243, 243);">
<center> '''CPC Related News''' </center>
<center>

[[File:Cpctelera compo.jpg|thumb|320px|[http://www.cpcwiki.eu/index.php/CPCtelera CPCtelera]]]</center><br>

<div style="height:20em; overflow:auto; border: 1px solid #FFC9C9">

*26/11/15: '''[[WinAPE]]''' 2.0 Beta 1 released. [http://www.winape.net/ Download]
*02/09/15: '''[[iMPdraw Lite v1.132]]''' is now released. [http://www.cpcwiki.eu/forum/programming/impdraw-v1-0f/60/ Download]
*28/08/15: '''[[FutureOS]] system .8''' comprehensive update released. [http://futureos.cpc-live.com Download]
*27/08/15: [[MegaFlashROManager|ROManager]] 2.14 released. [http://futureos.cpc-live.com/files/ROManager_ALL.zip Download]
*11/05/15: '''CPCtelera''', a cross-platform game development framework was [http://www.cpcwiki.eu/index.php/CPCtelera released]
*21/03/15: '''[[C4CPC]]''', a cartridge replacement for PLUS and GX4000 was [http://www.cpcwiki.eu/index.php/C4CPC released]
*02/01/15: [[Cosmos|COSMOS]] v.22 (final version) has been [http://www.cpcwiki.eu/index.php/Cosmos released]
*14/12/14: '''X-MASS''', Add a [http://www.cpcwiki.eu/forum/news-events/x-mass-a-mass-storage-expansion-for-all-cpc/msg91048/#msg91048 128MB mass-storage] to your CPC.
*30/08/14: '''[[SymbOS]]''' 2.1 Final [http://www.cpcwiki.eu/forum/news-events/symbos-2-1-final-released released]
*14/08/14: '''[[PlayCity]]''', Add [http://www.cpcwiki.eu/forum/amstrad-cpc-hardware/playcity-aka-ctc-ay-(mx4)-for-august-!!!/ 6ch stereo audio, Z80 CTC...] to your CPC.
*22/04/14: '''X-MEM''', Add up to [http://www.cpcwiki.eu/forum/news-events/x-mem-a-new-memory-expansion-for-all-cpc/ 512K RAM/ROM] on your 464/664/6128.
*20/04/14: '''Breaking Baud''', [http://www.cpcwiki.eu/forum/demos/breaking-baud/ THE tape demo]. 2nd place at Revision!
*30/03/14: '''Superpix''', a new Picross-style game was [http://www.cpc-power.com/index.php?page=detail&num=10000 released].
*24/03/14: '''SAMdisk''' 3.8.2 [http://simonowen.com/samdisk/ released].
*23/03/14: [[PSX controller mod for Amstrad CPC]] by [[User:Forcy|Forcy]]
</div>
<br>



<center><gallery widths=128px heights=96px>

Image:C4CPC_CprSelect.png|[http://www.cpcwiki.eu/index.php/C4CPC C4CPC]
Image:X-MASS01.jpg|[http://www.cpcwiki.eu/forum/news-events/x-mass-a-mass-storage-expansion-for-all-cpc/msg91048/#msg91048 X-MASS MX4 Board]

Image:PlayCity.jpg|[http://www.cpcwiki.eu/index.php/PlayCity PlayCity]
Image:symbos21cpc.gif|[[SymbOS]] 2.1
Image:superpix.png|[http://www.cpc-power.com/index.php?page=detail&num=10000 Superpix]



</gallery></center>

<div align=right>...[[OldNews|Older News]]...</div>
</div>

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=== CPCWiki related ===
*[[CPCWiki updates]]
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<div style="text-align: right;"><small>'''All [[Special:Wantedpages|wanted articles]]''' | [[:Category:Stub|Extendable Stubs]] | '''[[Special:ContributionScores|List of most active contributors]]'''</small></div>

| width="50%" style="vertical-align: top;" | <div style="border: 1px solid rgb(228, 222, 222); margin: 0px 0px 5px; padding: 0.5em 1em; background-color: rgb(249, 249, 249);">

=== Did you know? ===

*When the 664 was being developed, Sugar was already looking (and hinting publicly!) at the 6128
*The [[472|CPC 472]] was a model released in Spain with an extra unaccessible 8 KB of RAM to circumvent a spanish tax that was charged on imported machines with up to 64 KB memory.

*With a possible total amount of '''832 x 288 pixel''' (576 interlaced) the [[CPC|CPC]] was the 8 bit homecomputer with the highest screen resolution ever.

*'''OpenOffice''' for Windows/Linux is a direct descendant of [[Star-Division|StarWriter]] for the CPC.
*The transfer speed of the [[CPC Booster|CPC Booster +]] serial interface is faster than a standard '''DSL connection'''.

*[[SymbOS|SymbOS]] can handle more than '''50 times''' bigger hard discs than MS Windows 95A.
*[[FutureOS|FutureOS]] can load 178 KB in '''9 seconds''' from floppy disc and manages up to '''4 MB''' of RAM
</div>
</div>

|}

Snapshot

2015-07-27T05:01:38Z

Executioner: Additions to V3 including some WinAPE specific usage with descriptions.

= Snapshot (.SNA) file format =

The format was first defined for the [[CPCEMU|CPCEMU]] emulator but is now widely supported. The format was originally defined by [[Marco Vieth|Marco Vieth]]. Version 3 was defined by [[Ulrich Doewich|Ulrich Doewich]], [[Martin Korth|Martin Korth]], [[Richard Wilson|Richard Wilson]] and [[Kevin Thacker|Kevin Thacker]].

There are 3 versions defined in this document. Version 3 is the most recent and is currently supported by a few of the most recent emulators.

Snapshots produced with [[CPCE|CPCE]] appears to be the most compatible and will run correctly using any emulator.

Abbreviations:

*[[Gate Array|GA = "Gate Array"]]
*[[CRTC|CRTC = "6845 Cathode Ray Tube Controller"]]
*[[8255|PPI = "Intel 8255 Programmable Peripheral Interface"]]
*[[PSG|PSG = "AY-3-8912 Programmable Sound Generator"]]

= Version 1 =

{|
|-
| ''Offset (Hex)''
| ''Count''
| ''Description''
|-
| 00-07
| 8
| The identification string "MV - SNA". This must exist for the snapshot to be valid.
|-
| 08-0f
| 8
| (not used; set to 0)
|-
| 10
| 1
| snapshot version (1)
|-
| 11
| 1
| Z80 register F
|-
| 12
| 1
| Z80 register A
|-
| 13
| 1
| Z80 register C
|-
| 14
| 1
| Z80 register B
|-
| 15
| 1
| Z80 register E
|-
| 16
| 1
| Z80 register D
|-
| 17
| 1
| Z80 register L
|-
| 18
| 1
| Z80 register H
|-
| 19
| 1
| Z80 register R
|-
| 1a
| 1
| Z80 register I
|-
| 1b
| 1
| Z80 interrupt flip-flop IFF0 (note 2)
|-
| 1c
| 1
| Z80 interrupt flip-flop IFF1 (note 2)
|-
| 1d
| 1
| Z80 register IX (low) (note 5)
|-
| 1e
| 1
| Z80 register IX (high) (note 5)
|-
| 1f
| 1
| Z80 register IY (low) (note 5)
|-
| 20
| 1
| Z80 register IY (high) (note 5)
|-
| 21
| 1
| Z80 register SP (low) (note 5)
|-
| 22
| 1
| Z80 register SP (high) (note 5)
|-
| 23
| 1
| Z80 register PC (low) (note 5)
|-
| 24
| 1
| Z80 register PC (high) (note 5)
|-
| 25
| 1
| Z80 interrupt mode (0,1,2) (note 3)
|-
| 26
| 1
| Z80 register F' (note 4)
|-
| 27
| 1
| Z80 register A' (note 4)
|-
| 28
| 1
| Z80 register C' (note 4)
|-
| 29
| 1
| Z80 register B' (note 4)
|-
| 2a
| 1
| Z80 register E' (note 4)
|-
| 2b
| 1
| Z80 register D' (note 4)
|-
| 2c
| 1
| Z80 register L' (note 4)
|-
| 2d
| 1
| Z80 register H' (note 4)
|-
| 2e
| 1
| GA: index of selected pen (note 10)
|-
| 2f-3f
| 1
| GA: current palette (note 11)
|-
| 40
| 1
| GA: multi configuration (note 12)
|-
| 41
| 1
| current RAM configuration (note 13)
|-
| 42
| 1
| CRTC: index of selected register (note 14)
|-
| 43-54
| 1
| CRTC: register data (0..17) (note 15)
|-
| 55
| 1
| current ROM selection (note 16)
|-
| 56
| 1
| PPI: port A (note 6)
|-
| 57
| 1
| PPI: port B (note 7)
|-
| 58
| 1
| PPI: port C (note 8)
|-
| 59
| 1
| PPI: control port (note 9)
|-
| 5a
| 1
| PSG: index of selected register (note 17)
|-
| 5b-6a
| 1
| PSG: register data (0,1,....15)
|-
| 6b
| 2
| memory dump size in Kilobytes (e.g. 64 for 64K, 128 for 128k) (note 18)
|-
| 6d-ff
| 1
| not used set to 0
|-
| 100-...
| 1
| memory dump
|}

== Notes ==

1. All multi-byte values are stored in little-endian format (low byte followed by higher bytes).

2. "IFF0" reflects the state of the maskable interrupt (INT). "IFF1" is used to store the state of IFF0 when a non-maskable interrupt (NMI) is executed. Bit 0 of these bytes is significant. For CPCEMU compatibility, these bytes should be set to "1" when the IFF flip-flop is "1" and "0" when the flip-flop is "0". For compatibility with other emulators, bits 7-1 should be set to "0". When bit 0 of "IFF0" is "0" maskable interrupts will be ignored. When bit 0 of "IFF1" is "1" maskable interrupts will be acknowledged and executed. See the document about the Z80 for more information.

3. This byte will be 0, 1 or 2 for the interrupt modes 0, 1 or 2. The interrupt mode is set using the "IM x" instructions. See the document about the Z80 for more information.

4. These registers are from the alternate register set of the Z80.

5. These registers are 16-bit. "low" indicates bits 7..0, "high"indicates bits 15..8.

6. This byte represents the inputs to PPI port A regardless of the input/output setting of this port.

7. This byte represents the inputs to PPI port B regardless of the input/output setting of this port.

8. This byte represents the outputs from port C regardless of the input/output setting of this port.

9. This byte represents the PPI control byte which defines the input/output and mode of each port and not the last value written to this port. For CPCEMU compatibility bit 7 of this byte must be set to "1".

10. This byte in the snapshot represents the selected pen register of the Gate-Array. This byte is the last value written to this port. Bit 7,6,5 should be set to "0".

11. This byte in the snapshot represents the multi-configuration register of the Gate-Array. This byte is the last byte written to this register. For CPCEMU compatibility, bit 7 should be set to "1" and bit 6 and bit 5 set to "0".

12. These bytes are the current palette. For CPCEMU compatibility, these bytes should have bit 7=bit 6=bit 5="0". Bits 4..0 define the colour using the hardware colour code. The colours are stored in the order pen 0, pen1, pen 2,...,pen 15 followed by border colour.

13. This byte represents a ram configuration for a Dk'Tronics/Dobbertin/Amstrad compatible RAM expansion, or the built in RAM expansion of the CPC6128 and CPC6128+. Bits 5..0 define the ram expansion code. For CPCEMU compatibility, bit 7 and bit 6 of this byte should be set to "0".

14. This byte in the snapshot represents the index of the currently selected CRTC register. For compatibility with CPCEMU this value should be in the range 0-31.

15. These bytes represent the data of the CRTC's registers.

16. This byte in the snapshot represents the last byte written to the "ROM select" I/O port.

17. This byte in the snapshot represents the index of the currently selected PSG register. For CPCEMU compatibility, this byte should be in the range 0-15.

18. the first 64k is always the base 64k of ram. The second 64k (if present) is the additional ram in a Dk'Tronics/Dobbertin/Amstrad compatible RAM expansion or the internal ram of the CPC6128/CPC6128+. The memory dump is not dependant on the current RAM configuration. Note that CPCEMU can only write a 64K or 128K snapshot.

= Changes and additions in Version 2 from Version 1 =

{|
|-
| ''Offset (Hex)''
| ''Count''
| ''Description''
|-
| 10
| 1
| snapshot version (2)
|-
| 6d
| 1
| CPC Type:
*0 = CPC464
*1 = CPC664
*2 = CPC6128
*3 = unknown

|-
| 6e
| 1
| interrupt number (0..5) (note 1a)
|-
| 6f-74
| 6
| 6 multimode bytes (note 1b)
|-
| 75-ff
| x
| (not used)
|}

== Notes ==

1. If standard CPC raster interrupts are used, interrupts are acknowledged and "executed" at the time they are requested, then there will be 6 interrupts executed per screen update cycle.

*CPCEMU uses a simple system to emulate the interrupts. It is assumed there are exactly 6 interrupts per screen update cycle (the interrupts are assumed to occur at a frequency of 300Hz). This byte records the interrupt number in the current screen update cycle. More accurate emulators use the correct interrupt generation method and may ignore this byte. For CPCEMU compatibility, these emulators should set this byte to "0".

*CPCEMU uses a simple system to emulate the screen display. It allows the mode to be changed in each of the 6 interrupts that occur during a single 50Hz/60Hz period. These bytes represent the mode in each of these sections, i.e. the screen modes (0,1 or 2) for the interrupts 0..5. More accurate emulators support changing of the screen mode at any point supported by the Amstrad hardware, these emulators should write "0" for all these bytes.

= Changes and additions in Version 3 from Version 2 =

{|
|-
| ''Offset (Hex)''
| ''Count''
| ''Description''
|-
| 10
| 1
| snapshot version (3)
|-
| 6d
| 1
| CPC Type:
*0 = CPC464
*1 = CPC664
*2 = CPC6128
*3 = unknown
*4 = 6128 Plus
*5 = 464 Plus
*6 = GX4000

|-
| 99
| 1
| Monitor VHold Value (-45 to +85)

|-
| 9a
| 1
| Memory Expansion Enable (when Bit 7 is set)
*Bit 0 = 128K memory (Banks C4..C7)
*Bit 1 = 256K memory (Banks C4..DF)
*Bit 2 = 256K silicon disc (Banks E4..FF)
*Bit 3 = 4M expansion
*Bit 7 = Always set if this is valid

|-
| 9b
| 1
| Fast Disc emulation mode (0=off, 1=on) (WinAPE)
|-
| 9c
| 1
| FDD motor drive state (0=off, 1=on)
|-
| 9d-a0
| 1
| FDD current physical track (note 15)
|-
| a1
| 1
| Printer Data/Strobe Register (note 1)
|-
| a2-a3
| 2
| Current frame scan line since monitor retrace (note16)
|-
| a4
| 1
| CRTC type:
*0 = HD6845S/UM6845
*1 = UM6845R
*2 = MC6845
*3 = 6845 in CPC+ ASIC
*4 = 6845 in Pre-ASIC

|-
| a9
| 1
| CRTC horizontal character counter register (note 11)
|-
| aa
| 1
| unused (0)
|-
| ab
| 1
| CRTC character-line counter register (note 2)
|-
| ac
| 1
| CRTC raster-line counter register (note 3)
|-
| ad
| 1
| CRTC vertical total adjust counter register (note 4)
|-
| ae
| 1
| CRTC horizontal sync width counter (note 5)
|-
| af
| 1
| CRTC vertical sync width counter (note 6)
|-
| b0-b1
| 1
|
{|
|-
| ''Bit''
| ''Function''
|-
| 0
| if "1" VSYNC is active, if "0" VSYNC is inactive (note 8)
|-
| 1
| if "1" HSYNC is active, if "0" HSYNC is inactive (note 9)
|-
| 2-7
| reserved
|-
| 7
| if "1" Vertical Total Adjust is active, if "0" Vertical Total Adjust is inactive (note 10)
|-
| 8-14
| Reserved (0)
|-
| 15
| if "1" use extended Interrupt Control Status Register (WinAPE)
|}

|-
| b2
| 1
| GA vsync delay counter (note 14)
|-
| b3
| 1
| GA interrupt scanline counter (note 12)
|-
| b4
| 1
| interrupt request flag (0=no interrupt requested, 1=interrupt requested) (note 13)

|-
| b5
| 1
| Interrupt Control Status Register (WinAPE) (note 17)
|-
| b6
| 1
| Plus features disabled (0=enabled, 1=disabled)
|-
| b7
| 1
| Plus PPI Emulation (0=Standard 8255 emulation, 1=Plus PPI emulation)
|-
| b8-df
| 28
| unused (0)
|-
| e0
| 20
| Emulator ID String
|}

== Notes ==

Notes:

1. This byte in the snapshot represents the last byte written to the printer I/O port (this byte does not include the automatic inversion of the strobe caused by the Amstrad hardware).

2. This register is internal to the CRTC and counts the number of character-lines. The counter counts up. This value is in the range 0-127. (This counter is compared against CRTC register 4).

3. This register is internal to the CRTC and counts the number of raster-lines. The counter counts up. This value is in the range 0-31. (This counter is compared against CRTC register 9).

4. This register is internal to the CRTC and counts the number of raster-lines during vertical adjust. The counter counts up. This value is in the range 0-31. This should be ignored if the CRTC is not "executing" vertical. adjust.(This counter is compared against CRTC register 5).

5. This register is internal to the CRTC and counts the number of characters during horizontal sync. This counter counts up. This value is in the range 0-16. This should be ignored if the CRTC is not "executing" horizontal sync. (This counter is compared against CRTC register 3).

6. This register is internal to the CRTC and counts the number of scan-lines during vertical sync. This counter counts up. This value is in the range 0-16. This should be ignored if the CRTC is not "executing" vertical sync. (This counter is compared against CRTC register 3).

7. These bytes define the internal state of the CRTC. Each bit in these bytes represents a state.

8. When VSYNC is active, the CRTC is "executing" vertical sync, and the vertical sync width counter in the snapshot is used.

9. When HSYNC is active, the CRTC is "executing" horizontal sync width counter in the snapshot is used.

10. When Vertical total adjust is active, the CRTC is "executing" vertical total adjust and the vertical total adjust counter in the snapshot is used.

11. This register is internal to the CRTC and counts the number of characters. This counter counts up. This value is in the range 0-255. (This counter is compared against CRTC register 0).

12. This counter is internal to the GA and counts the number of HSYNCs. This counter is used to generate CPC raster interrupts. This counter counts up. This value is in the range 0-51.

13. This flag is "1" if a interrupt request has been sent to the Z80 and it has not yet been acknowledged by the Z80. (A interrupt request is sent by the GA for standard CPC raster interrupts or by the ASIC for raster or dma interrupts).

14. This is a counter internal to the GA and counts the number of HSYNCs since the start of the VSYNC and it is used to reset the interrupt counter to synchronise interrupts with the VSYNC. This counter counts up. This value is between 0 and 2. If this value is 0, the counter is inactive. If this counter is 1 or 2 the counter is active.

15. This is the current cylinder for each of 4 drives.

16. In WinAPE this counter is reset if a VSYNC occurs which causes the monitor to retrace vertically. This occurs if the VSYNC signal is active and this counter is greater than a threshold set by the V-Hold (normally 295 when V-Hold is 0), or if the counter reaches the maximum value (normally 351 when V-Hold is 0).

17. Since Plus emulation requires more information than simply whether an interrupt is active, this value (as used internally by WinAPE) contains: Bit 7 - Gate Array (or PRI) interrupt. Bit 6 - DMA Channel 0 interrupt. Bit 5 - DMA Channel 1 interrupt. Bit 4 - DMA Channel 2 interrupt. It can be a combination of all or any interrupt sources. Interrupts are executed in the order raster, DMA 2, DMA 1, DMA 0.

Immediatly following the memory dump there is optional data which is seperated into chunks.

Each chunk of data has a header and this is followed by the data in the chunk. The header has the following format:

{|
|-
| ''Offset (Hex)''
| ''Count''
| ''Description''
|-
| 0
| 4
| Chunk name (note 1)
|-
| 4
| 4
| Chunk data length (note 2)
|}

Notes:

1. The chunks are defined with 4-byte character codes. (e.g. "CPC+"). In this example, the 4-byte character code would be stored in the file as 'C' then 'P' then 'C' then '+'.

2. The "Chunk data length" defines the length of data following the header and does not include the size of the header. This number is stored in little endian format.

3. If a emulator finds a chunk which it does not support then it should skip the chunk and continue with the next chunk in the file. Therefore an emulator author may add emulator specific chunks to the file and it will not prevent the snapshot from being used with other emulators that do not recognise the added chunks.

4. There is not a terminator chunk. The snapshot reader should determine if there are more chunks based on the size of data remaining to be read from the file.

The following chunks are currently defined:

=== CPC+ Chunk ===

{|
|-
| ''Offset (Hex)''
| ''Length''
| ''Addr in ASIC register-ram''
| ''Description''
|-
| 000-7FF
| 800
| 4000-4FFF
| Sprite Bitmaps (note 1)
|-
| 800-87F
| 8*16
| 6000-607F
| Sprite Attributes (see below) (note 2)
|-
| 880-8BF
| 32*2
| 6400-643F
| Palettes (note 3)
|-
| 8C0
| 1
| 6800
| Programmable Raster Interrupt (note 4)
|-
| 8C1
| 1
| 6801
| Screen split scan-line (note 4)
|-
| 8C2
| 2
| 6802-6803
| Screen split secondary screen-address (note 4)
|-
| 8C4
| 1
| 6804
| Soft scroll control register (note 4)
|-
| 8C5
| 1
| 6805
| Interrupt vector (note 4)
|-
| 8C6-8C7
| 2
| -
| unused (0)
|-
| 8C8-8CF
| 8
| 6808-680f
| Analogue input channels 0-7 (note 5)
|-
| 8D0-8DB
| 3*4
| 6C00-6C0B
| Sound DMA channel attributes 0-2 (see below) (note 6)
|-
| 8DC-8DE
| 3
| -
| unused (0)
|-
| 8DF
| 1
| 6C0F
| DMA Control/Status (note 4)
|-
| 8E0-8F4
| 3*7
| Internal
| DMA channel 0-2 internal registers (see below) (note 7)
|-
| 8F5
| 1
| Internal
| gate array A0 register value (note 8)
|-
| 8F6
| 1
| Internal
| gate array A0 lock: 0=locked, 1=unlocked (note 9)
|-
| 8F7
| 1
| Internal
| ASIC unlock sequence state (note 10)
|}

=== Notes ===

1. The sprite data is packed, with two sprite pixels per byte. Bits 7..4 define the first pixel and bits 3..0 define the second pixel.

2. The attributes for each sprite take 8 bytes. Each attribute block has the following format:

{|
|-
| ''Offset (Hex)''
| ''Length''
| ''Description''
|-
| 0
| 2
| Sprite X (see note)
|-
| 2
| 2
| Sprite Y (see note)
|-
| 4
| 1
| Sprite Magnification (see note)
|-
| 5-7
| 3
| unused (0)
|}

Note: the Sprite X, Y and magnification are in the same order as the ASIC registers

3. This is a direct copy of the palette in CPC+ ASIC Ram. There are 32 colours each with 2-bytes per colour.

4. These bytes in the snapshot represent the last value written to these ASIC registers.

5. These bytes represent the inputs to the analogue channels.

6. The attributes for each DMA channel take 4 bytes. Each attribute block has the following format:

{|
|-
| ''Offset (Hex)''
| ''Length''
| ''Description''
|-
| 0
| 2
| DMA Channel address (see note)
|-
| 2
| 1
| DMA Channel prescalar (see note)
|-
| 3
| 1
| unused (0)
|}

Note: the DMA address and prescalar are in the same order as the ASIC registers.

7 These registers are internal to the CPC+ and define the current DMA operation:

{|
|-
| ''Offset (Hex)''
| ''Length''
| ''Description''
|-
| 0
| 2
| loop counter (note a)
|-
| 2
| 2
| loop address (note b)
|-
| 4
| 2
| pause count (note c)
|-
| 6
| 1
| pause prescalar count (note d)
|}

a. This value represents the number of loops remaining. 0 = none. This count is between 0..0FFF. This counter counts down.

b. This is the Amstrad memory address to loop back to. It is a pointer to the DMA instruction after the last REPEAT instruction.

c. This value represents the pause count and the count is between 0...0FFF. (TO BE CHECKED: down counter? what exactly does it represent)

d. This value represents the pause prescalar count and the count is between 0..FF. (TO BE CHECKED: down counter? what exactly does it represent)

<br> 8. This value represents the last value written to this I/O port.

9. This value represents the lock status of the ASIC. If the ASIC is un-locked then the advanced features and ASIC registers are accessible.

10. This value represents the current unlock sequence state.

{|
|-
| ''State ID''
| ''Synchronised State''
| ''Note''
|-
| 0
| Not synchronised
| ASIC is waiting for first non-zero byte to be written, this is the first synchronisation byte required
|-
| 1
| Not synchronised
| ASIC is waiting for zero byte to be written, this is the second synchronisation byte required
|-
| 2..10
| synchronised
| ASIC is waiting for byte from unlock sequence. e.g. if "2", ASIC is waiting for &FF, the first byte of the unlock sequence. if "3" ASIC is waiting for &77, the second byte of the unlock sequence.
|}

[[Category:Programming]]

Main Page

2011-07-27T03:35:43Z

Executioner: /* Welcome to the Amstrad CPC Wiki! */

__NOTOC__
== Welcome to the Amstrad CPC Wiki! ==
<br><center>This site hopes to evolve into an encyclopaedia on all things [[Amstrad|Amstrad]] [[CPC|CPC]] related. There are now '''[[Special:Allpages|{{NUMBEROFARTICLES}} articles]]''' around the CPC available.<br><br>'''[[Special:Random|Random Page]] | [[#Become an Author!|Contribute]] | [[Help:Editing|Editing help]] | [http://www.cpcwiki.eu/forum Forum]'''<br>[[CPCWiki:Portal|CPCWiki Portal]] · [http://www.cpcwiki.eu/forum Forum] · [[Photo Gallery]] · [[About|About]] · [[Special:Statistics|Statistics]] · [[CPCWiki:General disclaimer|Disclaimer]]</center><br>
<center>[[Image:forum.png|400px|link=http://www.cpcwiki.eu/forum]] [[Image:Vs.png|400px|link=http://www.cpcwiki.eu/index.php/Speccy_Port]]</center><br>

<div style="border: 1px solid rgb(255, 201, 201); margin: 0px 0px 5px; padding: 0.5em 1em; background-color: rgb(255, 243, 243);">
<center> '''CPC Related News''' </center>
<center>
{{#ev:youtube|YJosZfm560Q|500}}<br>20/03/11: Amazing new '''Batman Forever''' demo [http://cpcwiki.eu/forum/index.php/topic,2085.new.html#new released]!!!! [UPD] Read an '''[http://www.norecess.net/interview-rhino.html interview] with Rhino'''!
</center>
<br>
*26/07/11: '''[[WinApe|WinAPE 2.0A18]]''' released, get it from '''[http://www.winape.net/downloads.jsp WinAPE downloads]''' (if it doesn't update automatically).
*23/07/11: '''[[QuickCMD|Quickcmd v2.1]]''' released!
*21/07/11: Bryce has released the '''[[MegaFlash|MegaFlash]]'''. Also the [[MegaFlashROManager]] was released by TFM.
*05/07/11: '''[http://www.cpcwiki.eu/forum/index.php?topic=2426.msg25923#msg25923 Now That’s What I Call Chip Tunes]''' - a great music disk by '''Mr.Ship'''!
*05/07/11: '''[http://roland.antoniovillena.es/ Roland]''', the online javascript emulator, now supports sound!
*05/07/11: New version of '''[http://www.cpcalive.com/cpcalive_en.html CPCAlive]''' with Z80 debugger improvement and corrections.
*28/06/11: Results and report (soon!) for the ReSeT #0 Party are '''[http://pushnpop.net/index.php?action=meetings&id=14 here]'''
*21/06/11: Major new release of '''[http://www.cpcbox.com/ CPCbox]''', now with sound!!
*09/05/11: '''[http://www.pushnpop.net/reset ReSeT #0 Party]''' is a CPC Meeting in France: 24-25-26 June 2011!
*03/05/11: '''[http://www.cpcmania.com/index2.asp?urldest=cpcdiskxp/cpcdiskxp.htm CPCDiskXP]''' 2.1 released :)
*27/04/11: A new game! This time a port of Dinamic's '''Arquimedes XXI''' by '''Devilmarkus, PulkoMandy, voXfReaX''' and '''MiguelSky''', over [http://www.amstrad.es/juegosamstrad/decargajuegos/arquimedesxxi.php here]!
*27/04/11: '''NoRecess''' published a great [http://www.norecess.net/interview-richard-wilson.html interview] with '''Richard Wilson''' of '''ParaDOS''' and '''WinApe''' fame :)
*17/04/11: '''ACID''' well and truly [http://www.octoate.de/wp/2011/04/15/another-acid-implementation-on-the-way/ ripped apart] :)
*17/04/11: '''NoRecess''' released v.2.2 of [http://www.norecess.net/hxc-floppy-emulator-manager.html HxC Floppy Emulator Manager]
*16/04/11: A very detailed interview of the Batman Forever Team published on '''[http://pushnpop.net/ Push'N'Pop]'''
*11/04/11: New game!!! '''[http://www.amstrad.es/juegosamstrad/decargajuegos/hora-bruja.php Hora Bruja]''' released! :)
*08/04/11: Another [http://www.norecess.net/1/post/2011/04/added-interview-of-longshot-logon-system.html interview] by Recess, this time with '''Longshot / Logon System'''!
*06/04/11: NoRecess added an [http://www.norecess.net/interview-face-hugger.html interview with '''Face Huggger''']!
*06/04/11: Version 19 of '''GamebaseCPC''' [http://www.cpc-power.com/gamebasecpc/index.php?page=accueil added]!
*23/03/11: '''[http://zx81.zx81.free.fr/serendipity/index.php?/archives/502-Caanoo-CAP32-Amstrad-CPC-Emulator-for-Caanoo-v1.1.2.html Caanoo-CAP32]''' for the Gamepark Caanoo updated!
*17/03/11: '''[http://www.retroreview.com/iang/UberCassette/ UberCassette]''' (wav->CDT) now supports Amstrad CPC :)
*15/02/11: [http://cpcwiki.eu/forum/index.php/topic,1982 Sub Hunter] released! Read Axelay's interview [http://www.norecess.net/interview-axelay.html here]!
*10/03/11: {FR} A fantastic [http://www.phenixinformatique.com/modules/smartsection/item.php?itemid=244 interview with '''Marion Vannier'''], head of Amstrad France!
*09/03/11: Yeah!!! '''[http://fmsdevel.wisecoding.es/blog/cpcdroid---2011-03-02 CPCDroid]''', a great emulator for '''Android''', has been released!!!
*09/03/11: Small update of [http://cngsoft.no-ip.org/cpce/index.htm CPCE] released
*13/01/11: [http://www.mojontwins.com/juegos_mojonos/uwol-2-cpc/ Uwol 2 (Quest for Money)], a new game by the Mojon Twins!!
*13/01/11: New version of the [http://www.telefonica.net/web2/emilioguerrero/ccz80/ccz80.html CCZ80 compiler]
*13/01/11: [http://www.norecess.net/sdcc2pasmo.html SDCC2Pasmo v1.0] tool released for SDCC->Pasmo assembler conversions
*13/01/11: [http://cpcparts.net CPCParts] has a real domain name now!
*12/01/11: [http://cpcwiki.eu/forum/index.php/topic,1871.0.html CPCInAJar], CPC emu in *exactly* 128kB released by Devilmarkus!

<center><gallery widths=150px>
Image:NTWICCT01.jpg|Now That's What I Call Chip Tunes
Image:Arquimedes.png|Arquimedes XXI
Image:Hora bruja.jpg|Hora Bruja
Image:BatmanForever.png|Batman Forever
Image:Subhunter2.png|SubHunter
Image:Uwol2b.png|Uwol 2
Image:xmas_2010_demo_screenshot.png|Xmas 2010 Demo
Image:MegaROM.png|MegaROM
Image:Ilogical.png|Ilogical
</gallery></center>

<div align=right>...[[OldNews|Older News]]...</div>
</div>

{| width="100%" class="FCK__ShowTableBorders"
|- valign="top"
| <div style="border: 1px solid rgb(176, 176, 176); margin: 0px 0px 5px; padding: 0.5em 1em; background-color: rgb(238, 238, 238);">

=== CPCWiki updates ===
*12/01/2011: 2010: An '''[http://cpcwiki.eu/forum/index.php/topic,1865.0.html excellent year]''' for the CPCWiki!!!
*22/09/2009: The CPCWIKI moves to new domain [http://cpcwiki.eu CPCWIKI.EU]
*14/08/2009: The CPCWIKI moves (temporarily) to new domain [http://cpc-wiki.com CPC-WIKI.COM]
*22/07/09: Wiki & Forum moved to a new server
*14/07/09: Forum updated to 2.0RC1-1, Wiki updated to 1.15.1!
*Add the CPCWiki to '''your Homepage'''. Check out [[About#Wiki-Napping|About#Wiki-Napping]] and start napping this Wiki.

</div> <div style="border: 1px solid rgb(234, 220, 197); margin: 0px 0px 5px; padding: 0.5em 1em; background-color: rgb(255, 255, 204);">

=== Become an Author! ===

We are searching for authors of the following articles:

* [[PDW|PDW]] (unknown what this article shall be about...) (Note: PDW is believed to be German group of programmers who wrote CPC Demos)

<br>
<createbox>
default=Enter name of article to create
buttonlabel=Create article!
width=40
</createbox>
<br>

#Top 5 Contributors from the last 60 days:
{{Special:ContributionScores/5/60/notools}}
<div style="text-align: right;"><small>'''All [[Special:Wantedpages|wanted articles]]''' | [[:Category:Stub|Extendable Stubs]]<br>'''[[Special:ContributionScores|List of most active contributors]]'''</small></div></div>

| width="50%" style="vertical-align: top;" | <div style="border: 1px solid rgb(228, 222, 222); margin: 0px 0px 5px; padding: 0.5em 1em; background-color: rgb(249, 249, 249);">

=== Did you know? ===

*When the 664 was being developed, Sugar was already looking (and hinting publicly!) at the 6128
*The [[472|CPC 472]] was a model released in Spain with an extra unaccessible 8 KB of RAM to circumvent a spanish tax that was charged on imported machines with up to 64 KB memory.

*With a possible total amount of '''832 x 288 pixel''' (576 interlaced) the [[CPC|CPC]] was the 8 bit homecomputer with the highest screen resolution ever.

*'''OpenOffice''' for Windows/Linux is a direct descendant of [[Star-Division|StarWriter]] for the CPC.
*The transfer speed of the [[CPC Booster|CPC Booster +]] serial interface is faster than a standard '''DSL connection'''.

*[[SymbOS|SymbOS]] can handle more than '''50 times''' bigger hard discs than MS Windows 95A.
*[[FutureOS|FutureOS]] can load 178 KB in '''9 seconds''' from floppy disc and manages up to '''4 MB''' of RAM
</div>
<div style="border: 1px solid rgb(234, 220, 197); margin: 0pt 0pt 5px; padding: 0.5em 1em; background-color: rgb(204, 255, 204);">

=== Donors ===

These people were kind enough to donate. All contributions went '''directly''' to our previous host, not our own pockets!

'''If you would like to donate us, please contact the admin-team in our forum. This will ensure the continuation of the project.'''
Thank you!

'''2011:''' [[User:Bryce|Bryce]] (€75)<br>

'''2009:''' Prodatron (€1000)<br>Nurgle (€30)<br>Serge Querné (€30)<br>Roald Strauss (€50)<br>

'''Donators from earlier years'''<br>

*Bert Post Uiterweer, [[Rex|Rex]] of [[BENG!|BENG!]], [[Robcfg|Robcfg]], [[Prodatron|Prodatron]], [[User:Gryzor|Gryzor]], [[User:Ervin|Ervin]]

Thanks so much guys!</div>
<div style="border: 1px solid rgb(234, 220, 197); margin: 0px 0px 5px; padding: 0.5em 1em; background-color: rgb(255, 204, 204);">

=== Where are CPC users from? ===
Click [http://www4.clustrmaps.com/user/7804b163 here] for the big map! Smaller map was removed to keep loading times down.

<br>

|}

Main Page

2011-07-27T03:34:17Z

Executioner: /* Welcome to the Amstrad CPC Wiki! */

__NOTOC__
== Welcome to the Amstrad CPC Wiki! ==
<br><center>This site hopes to evolve into an encyclopaedia on all things [[Amstrad|Amstrad]] [[CPC|CPC]] related. There are now '''[[Special:Allpages|{{NUMBEROFARTICLES}} articles]]''' around the CPC available.<br><br>'''[[Special:Random|Random Page]] | [[#Become an Author!|Contribute]] | [[Help:Editing|Editing help]] | [http://www.cpcwiki.eu/forum Forum]'''<br>[[CPCWiki:Portal|CPCWiki Portal]] · [http://www.cpcwiki.eu/forum Forum] · [[Photo Gallery]] · [[About|About]] · [[Special:Statistics|Statistics]] · [[CPCWiki:General disclaimer|Disclaimer]]</center><br>
<center>[[Image:forum.png|400px|link=http://www.cpcwiki.eu/forum]] [[Image:Vs.png|400px|link=http://www.cpcwiki.eu/index.php/Speccy_Port]]</center><br>

<div style="border: 1px solid rgb(255, 201, 201); margin: 0px 0px 5px; padding: 0.5em 1em; background-color: rgb(255, 243, 243);">
<center> '''CPC Related News''' </center>
<center>
{{#ev:youtube|YJosZfm560Q|500}}<br>20/03/11: Amazing new '''Batman Forever''' demo [http://cpcwiki.eu/forum/index.php/topic,2085.new.html#new released]!!!! [UPD] Read an '''[http://www.norecess.net/interview-rhino.html interview] with Rhino'''!
</center>
<br>
*26/07/11: '''[[WinApe|WinAPE 2.0A18]]''' released, get it from '''[http://www.winape.net/downloads.jsp WinAPE download]''' (if it doesn't update automatically).
*23/07/11: '''[[QuickCMD|Quickcmd v2.1]]''' released!
*21/07/11: Bryce has released the '''[[MegaFlash|MegaFlash]]'''. Also the [[MegaFlashROManager]] was released by TFM.
*05/07/11: '''[http://www.cpcwiki.eu/forum/index.php?topic=2426.msg25923#msg25923 Now That’s What I Call Chip Tunes]''' - a great music disk by '''Mr.Ship'''!
*05/07/11: '''[http://roland.antoniovillena.es/ Roland]''', the online javascript emulator, now supports sound!
*05/07/11: New version of '''[http://www.cpcalive.com/cpcalive_en.html CPCAlive]''' with Z80 debugger improvement and corrections.
*28/06/11: Results and report (soon!) for the ReSeT #0 Party are '''[http://pushnpop.net/index.php?action=meetings&id=14 here]'''
*21/06/11: Major new release of '''[http://www.cpcbox.com/ CPCbox]''', now with sound!!
*09/05/11: '''[http://www.pushnpop.net/reset ReSeT #0 Party]''' is a CPC Meeting in France: 24-25-26 June 2011!
*03/05/11: '''[http://www.cpcmania.com/index2.asp?urldest=cpcdiskxp/cpcdiskxp.htm CPCDiskXP]''' 2.1 released :)
*27/04/11: A new game! This time a port of Dinamic's '''Arquimedes XXI''' by '''Devilmarkus, PulkoMandy, voXfReaX''' and '''MiguelSky''', over [http://www.amstrad.es/juegosamstrad/decargajuegos/arquimedesxxi.php here]!
*27/04/11: '''NoRecess''' published a great [http://www.norecess.net/interview-richard-wilson.html interview] with '''Richard Wilson''' of '''ParaDOS''' and '''WinApe''' fame :)
*17/04/11: '''ACID''' well and truly [http://www.octoate.de/wp/2011/04/15/another-acid-implementation-on-the-way/ ripped apart] :)
*17/04/11: '''NoRecess''' released v.2.2 of [http://www.norecess.net/hxc-floppy-emulator-manager.html HxC Floppy Emulator Manager]
*16/04/11: A very detailed interview of the Batman Forever Team published on '''[http://pushnpop.net/ Push'N'Pop]'''
*11/04/11: New game!!! '''[http://www.amstrad.es/juegosamstrad/decargajuegos/hora-bruja.php Hora Bruja]''' released! :)
*08/04/11: Another [http://www.norecess.net/1/post/2011/04/added-interview-of-longshot-logon-system.html interview] by Recess, this time with '''Longshot / Logon System'''!
*06/04/11: NoRecess added an [http://www.norecess.net/interview-face-hugger.html interview with '''Face Huggger''']!
*06/04/11: Version 19 of '''GamebaseCPC''' [http://www.cpc-power.com/gamebasecpc/index.php?page=accueil added]!
*23/03/11: '''[http://zx81.zx81.free.fr/serendipity/index.php?/archives/502-Caanoo-CAP32-Amstrad-CPC-Emulator-for-Caanoo-v1.1.2.html Caanoo-CAP32]''' for the Gamepark Caanoo updated!
*17/03/11: '''[http://www.retroreview.com/iang/UberCassette/ UberCassette]''' (wav->CDT) now supports Amstrad CPC :)
*15/02/11: [http://cpcwiki.eu/forum/index.php/topic,1982 Sub Hunter] released! Read Axelay's interview [http://www.norecess.net/interview-axelay.html here]!
*10/03/11: {FR} A fantastic [http://www.phenixinformatique.com/modules/smartsection/item.php?itemid=244 interview with '''Marion Vannier'''], head of Amstrad France!
*09/03/11: Yeah!!! '''[http://fmsdevel.wisecoding.es/blog/cpcdroid---2011-03-02 CPCDroid]''', a great emulator for '''Android''', has been released!!!
*09/03/11: Small update of [http://cngsoft.no-ip.org/cpce/index.htm CPCE] released
*13/01/11: [http://www.mojontwins.com/juegos_mojonos/uwol-2-cpc/ Uwol 2 (Quest for Money)], a new game by the Mojon Twins!!
*13/01/11: New version of the [http://www.telefonica.net/web2/emilioguerrero/ccz80/ccz80.html CCZ80 compiler]
*13/01/11: [http://www.norecess.net/sdcc2pasmo.html SDCC2Pasmo v1.0] tool released for SDCC->Pasmo assembler conversions
*13/01/11: [http://cpcparts.net CPCParts] has a real domain name now!
*12/01/11: [http://cpcwiki.eu/forum/index.php/topic,1871.0.html CPCInAJar], CPC emu in *exactly* 128kB released by Devilmarkus!

<center><gallery widths=150px>
Image:NTWICCT01.jpg|Now That's What I Call Chip Tunes
Image:Arquimedes.png|Arquimedes XXI
Image:Hora bruja.jpg|Hora Bruja
Image:BatmanForever.png|Batman Forever
Image:Subhunter2.png|SubHunter
Image:Uwol2b.png|Uwol 2
Image:xmas_2010_demo_screenshot.png|Xmas 2010 Demo
Image:MegaROM.png|MegaROM
Image:Ilogical.png|Ilogical
</gallery></center>

<div align=right>...[[OldNews|Older News]]...</div>
</div>

{| width="100%" class="FCK__ShowTableBorders"
|- valign="top"
| <div style="border: 1px solid rgb(176, 176, 176); margin: 0px 0px 5px; padding: 0.5em 1em; background-color: rgb(238, 238, 238);">

=== CPCWiki updates ===
*12/01/2011: 2010: An '''[http://cpcwiki.eu/forum/index.php/topic,1865.0.html excellent year]''' for the CPCWiki!!!
*22/09/2009: The CPCWIKI moves to new domain [http://cpcwiki.eu CPCWIKI.EU]
*14/08/2009: The CPCWIKI moves (temporarily) to new domain [http://cpc-wiki.com CPC-WIKI.COM]
*22/07/09: Wiki & Forum moved to a new server
*14/07/09: Forum updated to 2.0RC1-1, Wiki updated to 1.15.1!
*Add the CPCWiki to '''your Homepage'''. Check out [[About#Wiki-Napping|About#Wiki-Napping]] and start napping this Wiki.

</div> <div style="border: 1px solid rgb(234, 220, 197); margin: 0px 0px 5px; padding: 0.5em 1em; background-color: rgb(255, 255, 204);">

=== Become an Author! ===

We are searching for authors of the following articles:

* [[PDW|PDW]] (unknown what this article shall be about...) (Note: PDW is believed to be German group of programmers who wrote CPC Demos)

<br>
<createbox>
default=Enter name of article to create
buttonlabel=Create article!
width=40
</createbox>
<br>

#Top 5 Contributors from the last 60 days:
{{Special:ContributionScores/5/60/notools}}
<div style="text-align: right;"><small>'''All [[Special:Wantedpages|wanted articles]]''' | [[:Category:Stub|Extendable Stubs]]<br>'''[[Special:ContributionScores|List of most active contributors]]'''</small></div></div>

| width="50%" style="vertical-align: top;" | <div style="border: 1px solid rgb(228, 222, 222); margin: 0px 0px 5px; padding: 0.5em 1em; background-color: rgb(249, 249, 249);">

=== Did you know? ===

*When the 664 was being developed, Sugar was already looking (and hinting publicly!) at the 6128
*The [[472|CPC 472]] was a model released in Spain with an extra unaccessible 8 KB of RAM to circumvent a spanish tax that was charged on imported machines with up to 64 KB memory.

*With a possible total amount of '''832 x 288 pixel''' (576 interlaced) the [[CPC|CPC]] was the 8 bit homecomputer with the highest screen resolution ever.

*'''OpenOffice''' for Windows/Linux is a direct descendant of [[Star-Division|StarWriter]] for the CPC.
*The transfer speed of the [[CPC Booster|CPC Booster +]] serial interface is faster than a standard '''DSL connection'''.

*[[SymbOS|SymbOS]] can handle more than '''50 times''' bigger hard discs than MS Windows 95A.
*[[FutureOS|FutureOS]] can load 178 KB in '''9 seconds''' from floppy disc and manages up to '''4 MB''' of RAM
</div>
<div style="border: 1px solid rgb(234, 220, 197); margin: 0pt 0pt 5px; padding: 0.5em 1em; background-color: rgb(204, 255, 204);">

=== Donors ===

These people were kind enough to donate. All contributions went '''directly''' to our previous host, not our own pockets!

'''If you would like to donate us, please contact the admin-team in our forum. This will ensure the continuation of the project.'''
Thank you!

'''2011:''' [[User:Bryce|Bryce]] (€75)<br>

'''2009:''' Prodatron (€1000)<br>Nurgle (€30)<br>Serge Querné (€30)<br>Roald Strauss (€50)<br>

'''Donators from earlier years'''<br>

*Bert Post Uiterweer, [[Rex|Rex]] of [[BENG!|BENG!]], [[Robcfg|Robcfg]], [[Prodatron|Prodatron]], [[User:Gryzor|Gryzor]], [[User:Ervin|Ervin]]

Thanks so much guys!</div>
<div style="border: 1px solid rgb(234, 220, 197); margin: 0px 0px 5px; padding: 0.5em 1em; background-color: rgb(255, 204, 204);">

=== Where are CPC users from? ===
Click [http://www4.clustrmaps.com/user/7804b163 here] for the big map! Smaller map was removed to keep loading times down.

<br>

|}

Main Page

2011-07-27T03:32:50Z

Executioner: /* Welcome to the Amstrad CPC Wiki! */

__NOTOC__
== Welcome to the Amstrad CPC Wiki! ==
<br><center>This site hopes to evolve into an encyclopaedia on all things [[Amstrad|Amstrad]] [[CPC|CPC]] related. There are now '''[[Special:Allpages|{{NUMBEROFARTICLES}} articles]]''' around the CPC available.<br><br>'''[[Special:Random|Random Page]] | [[#Become an Author!|Contribute]] | [[Help:Editing|Editing help]] | [http://www.cpcwiki.eu/forum Forum]'''<br>[[CPCWiki:Portal|CPCWiki Portal]] · [http://www.cpcwiki.eu/forum Forum] · [[Photo Gallery]] · [[About|About]] · [[Special:Statistics|Statistics]] · [[CPCWiki:General disclaimer|Disclaimer]]</center><br>
<center>[[Image:forum.png|400px|link=http://www.cpcwiki.eu/forum]] [[Image:Vs.png|400px|link=http://www.cpcwiki.eu/index.php/Speccy_Port]]</center><br>

<div style="border: 1px solid rgb(255, 201, 201); margin: 0px 0px 5px; padding: 0.5em 1em; background-color: rgb(255, 243, 243);">
<center> '''CPC Related News''' </center>
<center>
{{#ev:youtube|YJosZfm560Q|500}}<br>20/03/11: Amazing new '''Batman Forever''' demo [http://cpcwiki.eu/forum/index.php/topic,2085.new.html#new released]!!!! [UPD] Read an '''[http://www.norecess.net/interview-rhino.html interview] with Rhino'''!
</center>
<br>
*26/07/11: '''[[WinApe|WinAPE 2.0A18]]''' released, get it from '''[http://www.winape.net/download WinAPE download]''' (if it doesn't update automatically).
*23/07/11: '''[[QuickCMD|Quickcmd v2.1]]''' released!
*21/07/11: Bryce has released the '''[[MegaFlash|MegaFlash]]'''. Also the [[MegaFlashROManager]] was released by TFM.
*05/07/11: '''[http://www.cpcwiki.eu/forum/index.php?topic=2426.msg25923#msg25923 Now That’s What I Call Chip Tunes]''' - a great music disk by '''Mr.Ship'''!
*05/07/11: '''[http://roland.antoniovillena.es/ Roland]''', the online javascript emulator, now supports sound!
*05/07/11: New version of '''[http://www.cpcalive.com/cpcalive_en.html CPCAlive]''' with Z80 debugger improvement and corrections.
*28/06/11: Results and report (soon!) for the ReSeT #0 Party are '''[http://pushnpop.net/index.php?action=meetings&id=14 here]'''
*21/06/11: Major new release of '''[http://www.cpcbox.com/ CPCbox]''', now with sound!!
*09/05/11: '''[http://www.pushnpop.net/reset ReSeT #0 Party]''' is a CPC Meeting in France: 24-25-26 June 2011!
*03/05/11: '''[http://www.cpcmania.com/index2.asp?urldest=cpcdiskxp/cpcdiskxp.htm CPCDiskXP]''' 2.1 released :)
*27/04/11: A new game! This time a port of Dinamic's '''Arquimedes XXI''' by '''Devilmarkus, PulkoMandy, voXfReaX''' and '''MiguelSky''', over [http://www.amstrad.es/juegosamstrad/decargajuegos/arquimedesxxi.php here]!
*27/04/11: '''NoRecess''' published a great [http://www.norecess.net/interview-richard-wilson.html interview] with '''Richard Wilson''' of '''ParaDOS''' and '''WinApe''' fame :)
*17/04/11: '''ACID''' well and truly [http://www.octoate.de/wp/2011/04/15/another-acid-implementation-on-the-way/ ripped apart] :)
*17/04/11: '''NoRecess''' released v.2.2 of [http://www.norecess.net/hxc-floppy-emulator-manager.html HxC Floppy Emulator Manager]
*16/04/11: A very detailed interview of the Batman Forever Team published on '''[http://pushnpop.net/ Push'N'Pop]'''
*11/04/11: New game!!! '''[http://www.amstrad.es/juegosamstrad/decargajuegos/hora-bruja.php Hora Bruja]''' released! :)
*08/04/11: Another [http://www.norecess.net/1/post/2011/04/added-interview-of-longshot-logon-system.html interview] by Recess, this time with '''Longshot / Logon System'''!
*06/04/11: NoRecess added an [http://www.norecess.net/interview-face-hugger.html interview with '''Face Huggger''']!
*06/04/11: Version 19 of '''GamebaseCPC''' [http://www.cpc-power.com/gamebasecpc/index.php?page=accueil added]!
*23/03/11: '''[http://zx81.zx81.free.fr/serendipity/index.php?/archives/502-Caanoo-CAP32-Amstrad-CPC-Emulator-for-Caanoo-v1.1.2.html Caanoo-CAP32]''' for the Gamepark Caanoo updated!
*17/03/11: '''[http://www.retroreview.com/iang/UberCassette/ UberCassette]''' (wav->CDT) now supports Amstrad CPC :)
*15/02/11: [http://cpcwiki.eu/forum/index.php/topic,1982 Sub Hunter] released! Read Axelay's interview [http://www.norecess.net/interview-axelay.html here]!
*10/03/11: {FR} A fantastic [http://www.phenixinformatique.com/modules/smartsection/item.php?itemid=244 interview with '''Marion Vannier'''], head of Amstrad France!
*09/03/11: Yeah!!! '''[http://fmsdevel.wisecoding.es/blog/cpcdroid---2011-03-02 CPCDroid]''', a great emulator for '''Android''', has been released!!!
*09/03/11: Small update of [http://cngsoft.no-ip.org/cpce/index.htm CPCE] released
*13/01/11: [http://www.mojontwins.com/juegos_mojonos/uwol-2-cpc/ Uwol 2 (Quest for Money)], a new game by the Mojon Twins!!
*13/01/11: New version of the [http://www.telefonica.net/web2/emilioguerrero/ccz80/ccz80.html CCZ80 compiler]
*13/01/11: [http://www.norecess.net/sdcc2pasmo.html SDCC2Pasmo v1.0] tool released for SDCC->Pasmo assembler conversions
*13/01/11: [http://cpcparts.net CPCParts] has a real domain name now!
*12/01/11: [http://cpcwiki.eu/forum/index.php/topic,1871.0.html CPCInAJar], CPC emu in *exactly* 128kB released by Devilmarkus!

<center><gallery widths=150px>
Image:NTWICCT01.jpg|Now That's What I Call Chip Tunes
Image:Arquimedes.png|Arquimedes XXI
Image:Hora bruja.jpg|Hora Bruja
Image:BatmanForever.png|Batman Forever
Image:Subhunter2.png|SubHunter
Image:Uwol2b.png|Uwol 2
Image:xmas_2010_demo_screenshot.png|Xmas 2010 Demo
Image:MegaROM.png|MegaROM
Image:Ilogical.png|Ilogical
</gallery></center>

<div align=right>...[[OldNews|Older News]]...</div>
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*12/01/2011: 2010: An '''[http://cpcwiki.eu/forum/index.php/topic,1865.0.html excellent year]''' for the CPCWiki!!!
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=== Did you know? ===

*When the 664 was being developed, Sugar was already looking (and hinting publicly!) at the 6128
*The [[472|CPC 472]] was a model released in Spain with an extra unaccessible 8 KB of RAM to circumvent a spanish tax that was charged on imported machines with up to 64 KB memory.

*With a possible total amount of '''832 x 288 pixel''' (576 interlaced) the [[CPC|CPC]] was the 8 bit homecomputer with the highest screen resolution ever.

*'''OpenOffice''' for Windows/Linux is a direct descendant of [[Star-Division|StarWriter]] for the CPC.
*The transfer speed of the [[CPC Booster|CPC Booster +]] serial interface is faster than a standard '''DSL connection'''.

*[[SymbOS|SymbOS]] can handle more than '''50 times''' bigger hard discs than MS Windows 95A.
*[[FutureOS|FutureOS]] can load 178 KB in '''9 seconds''' from floppy disc and manages up to '''4 MB''' of RAM
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Datasheet AY-8913

2011-03-14T01:58:24Z

Executioner: /* Amplitude Control (Registers R10,R11,R12) */ fixed table format

== General Instruments - AY-3-8910, AY-3-8912, AY-3-8913 Programmable Sound Generator ==

=== FEATURES ===

* Full Software Control of Sound Generation
* Interface to Most 8-bit and 16-bit Microprocessors
* Three independantly Programmed Analog Outputs
* Two 8-bit General Purpose I/O ports (AY-3-8910)
* One 8-bit General Purpose I/O port (AY-3-8912)
* Single +5 Volt Supply

== DESCRIPTION ==

The [[AY]]-3-8910/8912/8913 Programmable Sound Generator (PSG) is a LSI Circuit which can produce a wide variety of complex sounds under software control. The AY-3-8910/8912/8913 is manufactured in the General Instrument N-Channel Ion Implant Process. Operation requires a single +5V power supply, a TTL compatible clock, and a microprocessor controller such as the General Instrument 16-bit CP1610 or one of the PIC1650 series of 8-bit microcomputers.

The PSG is easily interfaced to any bus orientation system, its flexibility makes it useful in applications such as music synthesis, sound effects generation, audible alarms, tone signalling and FSK modems. The analog sound outputs can each provide 4bits of logarithmic digital to analog conversion greatly enhancing the dynamic range of the sounds produced.

In order to perform sound effects while allowing the processor to continue its other tasks, the PSG can continue to produce sound after the initial commands have been given by the control processor. The fact that realistic sound production often involves more than one effect is satisfied by the three independantly controllable channels available in the PSG.

All of the circuit control signals are digital in nature and intended to be provided directly by a microprocessor/microcomputer. This means that one PSG can produce the full range of required sounds with no change in external circuitry. Since the frequency response of the PSG ranges from sub-audible at its lowest frequency to post-audible at its highest frequency, there are few sounds which are beyond reproduction ith only the simplest electical connections.

Since most applications of a microprocessor/PSG system would also require interfacing between the outside world and the microprocessor, this facility has been designed into the PSG. The AY-3-8910 has two general purpose 8-bit I/O ports and is supplied in a 40 lead package; the AY-3-8912 has one port and 28 leads; the AY-3-8913 has no ports and 24-leads.

== PIN CONFIGURATIONS ==

=== 40 LEAD DUAL IN LINE ===

AY-3-8910

[[Image:psg14.gif]]

=== 28 LEAD DUAL IN LINE ===

AY-3-8912

[[Image:psg12.gif]]

=== 24 LEAD DUAL IN LINE ===

AY-3-8913

[[Image:psg13.gif]]

== PIN FUNCTIONS ==

'''DA7--DA0 (input/output/high impedance) pins 30--37 (AY-3-8910) pins 21--28 (AY-3-8912) pins 4--11 (AY-3-8913)'''

'''Data/Address 7--0:'''

These 8 lines comprise the 8-bit bidirectional bus used by the microprocessor to send both data and addresses to the PSG and to recieve data from the PSG. In the data mode, DA7--DA0 correspond to Register Array bits B7--B0. In the address mode, DA3--DA0 select the register number (0--17 8) and a DA7-DA4 in conjunction with address inputs /A9 and A8 for the high order address (chip select).

'''A8 (input): pin 25 (AY-3-8910) pin 17 (AY-3-8912) pin 23 (AY-3-8913)'''

'''/A9 (input): pin 24 (AY-3-8910) pin 28 (AY-3-8912) (not provided on AY-3-8913)'''

'''/Address 9,Address 8'''

These "extra" address bits are made available to enable the positioning of the PSG (assigning a 16 word memory space) in a total 1,024 word memory area rather than in a 256 word memory area as defined by address bits DA7--DA0 alone. If the memory size does not require the use of these extra address lines they may be left unconnected as each is provided with either an on-chip pull down (/A9) or pull-up (A8) resistor. In "noisy" environments, however, it is recommended that /A9 and A8 be tied to an external ground and +5V, respectively, if they are not to be used.

'''/RESET (input): pin 23 (AY-3-8910) pin 21 (AY-3-8913) pin 16 (AY-3-8912)'''

For initialization/power on purposes, applying a logic "0" (ground) to the /Reset pin will reset all registers to "0". The /Reset pin is provided with an on-chip pull-up resistor.

'''CLOCK (signal): pin 22 (AY-3-8910) pin 20 (AY-3-8913) pin 15 (AY-3-8912)'''

This TTL-compatible input supplies the timing reference for the Tone, Noise and Envelope Generators.

'''BDIR,BC2,BC1 (inputs): pins 27,28,29 (AY-3-8910) pins 18,19,20 (AY-3-8912) pins 2,3 (No BC2 on AY-3-8913 see below)'''

'''Bus DiRection, Bus Control 2,1'''

These bus control signals are generated directly by the CP1610 series of microprocessors to control all external and internal bus operations in the PSG. When using a processor other than the Cp1610, these signals can be provided either by comparable bus signals or by simulating the signals on I/O lines of the processor. The PSG decodes these signals as illustrated in the following:

{|{{Prettytable|width: 700px; font-size: 2em;}}
|''BDIR''||''BC2''||''BC1''||''CP1610 Function''||''PSG Function''
|-
|0||0||0||NACT||INACTIVE. See 010 (IAB)
|-
|0||0||1||ADAR||LATCH ADDRESS. See 111 (INTAK)
|-
|0||1||0||IAB||INACTIVE: The PSG/CPU bus is inactive, DA7--DA0 are in high impedence state
|-
|0||1||1||DTB||READ FROM PSG. This signal causes the contents of the register which is currently addressed to appear on the PSG/CPU bus. DA7--DA0 are in output mode.
|-
|1||0||0||BAR||LATCH ADDRESS. See 111 (INTAK)
|-
|1||0||1||DW||INACTIVE. See 010 (IAB)
|-
|1||1||0||DWS||WRITE TO PSG. This signal indicates that the bus contains register data which should be latched into the currently addressed register DA7--DA0 are in input mode.
|-
|1||1||1||INTAK||LATCH ADDRESS. This signal indicates that the bus contains a register address which should be latched in the PSG. DA7--DA0 are in the input mode.
|}

While interfacing to a processor other than the CP1610 would simply require simulating the above decoding, the redundancies in the PSG function vs bus control signals can be used to advantage in that only four of the eight possible decoded bus functions are required by the PSG. This could simpify the programming of the bus control signals to the following, which only require that the processor generate two bus control signals (BDIR and BC1, with BC2 tied to +5v). This is the case with the AY-3-8913 with BC2 pulled high internally.

{|{{Prettytable|width: 700px; font-size: 2em;}}
|''BDIR''||''BC2''||''BC1''||''PSG Function''
|-
|0||1||0||INACTIVE
|-
|0||1||1||READ FROM PSG
|-
|1||1||0||WRITE TO PSG
|-
|1||1||1||LATCH ADDRESS
|}

[[Image:psg10.gif]]

'''ANALOG CHANNEL A,B,C (outputs): pins 4,3,38 (AY-3-8910) pins 5,4,1 (AY-3-8912) pins 17,15,18 (AY-3-8913)'''

Each of these signals is the output of its corresponding D/A Converter, and provides a up to 1V peak-peak signal representing the complex sound waveshape generated by the PSG.

'''IOA7--IOA0 (input/output): pins 14--21 (AY-3-8910) pins 7--14 (AY-3-8912) (not provided on AY-3-8913)'''

'''IOB7--IOB0 (input/output): pins 6--13 (AY-3-8910) (not provided on AY-3-8912) (not provided on AY-3-8913)'''

'''Input/Output A7--A0, B7--B0'''

Each of these two parallel input/output ports provides 8 bits of parallel data to/from the PSG/CPU bus from/to any external devices connected to the IOA or IOB pins. Each pin is provided with an on-chip pull-up resistor, so that when in the "input" mode, all pins will read normally high. Therefore, the recommended method for scanning external switches would be to ground the input bit.

'''TEST 1: pin 39 (AY-3-8910) pin 14 (AY-3-8913) pin 2 (AY-3-8912)'''

'''TEST 2: pin 26 (AY-3-8910) pin 12 (AY-3-8913) (not connected on AY-3-8912)'''

These pins are for General Instrument test purposes only and should be left open -- do not use as tie-points.

'''Vcc: pin 40 (AY-3-8910) pin 13 (AY-3-8913) pin 3 (AY-3-8912)'''

Nominal +5Volt power supply to PSG.

'''Vss: pin 1 (AY-3-8910) pin 19 (AY-3-8913) pin 6 (AY-3-8912)'''

Ground reference for the PSG.

'''/CHIP SELECT (Input): pin 24 (AY-3-8913 only)'''

This input signal goes low to enable the PSG to read data on the data bus or write data from the data bus to one of the internal registers. For these above operations to occur, this signal must be true in addition to the current bus address being a valid PSG address. This signal must be valid for all read and write operations. This pin has an internal pull down to Vss.

== ARCHITECTURE ==

The AY-3-8910/8912/8913 is a register oriented Programmable Sound Generator (PSG). Communication between the processor and the PSG is based on the concept of memory-mapped I/O. Control commands are issued to the PSG by writing to 16 memory-mapped registers. Each of the 16 registers within the PSG is also readable so that the microprocessor can determine, as necessary, present states or stored data values.

All functions of the PSG are controlled through the 16 registers which once programmed, generate and sustain the sounds, thus freeing the system processor for other tasks.

== REGISTER ARRAY ==

The principle element of the PSG is the array of 16 read/write control registers. These 16 registers look to the CPU as a block of memory and as such occupy a 16 word block out of 1,024 possible addresses. The 10 address bits (8 bits on the common data/address bus, and 2 seperate address bits A8 and /A9) are decoded as follows:

{|{{Prettytable|width: 700px; font-size: 2em;}}
|'''/A9*'''||'''A8'''||'''DA7'''||'''DA6'''||'''DA5'''||'''DA4'''||'''DA3'''||'''DA2'''||'''DA1'''||'''DA0'''
|-
|0||1||0||0||0||0||0||0||0||0
|}

'''THRU'''
{|{{Prettytable|width: 700px; font-size: 2em;}}
|-
|'''0'''||'''1'''||'''0'''||'''0'''||'''0'''||'''0'''||'''1'''||'''1'''||'''1'''||'''1'''
|-
|colspan=4|High Order (Chip Select)||colspan=4|Low order (Register No.)
|}
* /A9 is not provided on the AY-3-8912

The four low order address bits select one of the 16 registers (R0--R17). The six high order address bits function as "chip selects" to control the tri-state bidirectional buffers (when the high order address bits are "incorrect", the bi-directional buffers are forced to the high impedance state). High order address bits /A9, A8 are fixed in the PSG design to recognise a 01 code; high order address bits DA7-DA4 may be mask programmed to any 4-bit code by a special order factory mask modification. Unless otherwise specified, address bits DA7--DA4 are programmed to recognise only a 0000 code. A valid high order address latches the register address (the low order 4 bits) in the Register Address Latch/Decoder block. A latched address will remain valid until the receipt of a new address, enabling multiple reads and writes of the same register contents without the need for redundant re-addressing.

Conditioning of the Register Address Latch/Decoder and the Bidirectional Buffers to recognise the bus function required (inactive, latch address, write data, or read data) is accomplished by the Bus Control Decode block.

== SOUND GENERATING BLOCKS ==

The basic blocks in the PSG which produce the programmed sounds include:

* Tone Generators produce the basic square wave tone frequencies for each channel (A,B,C)

* Noise Generator produces a frequency modulated pseudo random pulse width square wave output.

* Mixers combine the outputs of the Tone Generators and the Noise Generator. One for each channel (A,B,C)

* Amplitude Control provides the D/A Converters with either a fixed or variable amplitude pattern. The fixed amplitude is under direct CPU control; the variable amplitude is accomplished by using, the output of the Envelope Generator.

* Envelope Generator produces an evelope pattern which can be used to amplitude modulate the output of each Mixer.

* D/A Converters the three D/A Converters each produce up to a 16 level output signal as determined by the Amplitude Control.

== I/O PORTS ==

Two additional blocks are shown in the PSG Block Diagram which have nothing directly to do with the production of sound -- these are the two I/O ports (A and B). Since virtually all uses of microprocessor-based sound would require interfacing between the outside world and the processor, this facility has been included in the PSG. Data to/from the CPU bus may be read/written to either of two 8-bit I/O Ports without affecting any other function of the PSG. The I/O Ports are TTL-compatible and are provided with internal pull-ups on each pin. Both Ports are available on the AY-3-8910; only I/O Port A is available on the AY-3-8912; no ports are available on the AY-3-8913.

'''PSG BLOCK DIAGRAM'''

[[Image:psg16.gif]]

== OPERATION ==

Since all functions of the PSG are controlled by the processor via a series of register loads, a detailed description of the PSG operation can best be acomplished by relating each PSG function to the control of its corresponding register. The function of creating or programming a specific sound or sound effect logically follows the control sequence listed:

{|{{Prettytable|width: 700px; font-size: 2em;}}
|'''Operation'''|'''Registers'''|'''Function'''
|-
|Tone Generator Control||R0--R5||Program tone periods.
|-
|Noise Generator Control||R6||Program noise period.
|-
|Mixer Control||R7||Enable tone and/or noise on selected channels.
|-
|Amplitude Control||R10--R12||Select "fixed" or "envelope-variable" amplitudes.
|-
|Envelope Generator Control||R13--R15||Program envelope period and select envelope pattern.
|}

=== Tone Generator Control (Registers R0,R1,R2,R3,R4,R5) ===

The frequency of each square wave generated by the three Tone Generators (one each for Channels A,B and C) is obtained in the PSG by first counting down the input clock by 16, then by furthur counting down the result by the programmed 12-bit Tone Period value. Each 12-bit value is obtained in the PSG by combining the contents of the relative Course and Fine Tune registers, as illustrated in the following:

{|{{Prettytable|width: 700px; font-size: 2em;}}
|'''Course Tone Register'''||'''Channel'''||'''Fine Tune Register'''
|-
|R1||A||R0
|-
|R3||B||R2
|-
|R5||C||R4
|}

{|{{Prettytable|width: 700px; font-size: 2em;}}
|colspan=8|'''Course Tone Register'''||colspan=8|'''Fine Tune Register'''
|-
|B7||B6||B5||B4||B3||B2||B1||B0||B7||B6||B5||B4||B3||B2||B1||B0
|-
|colspan=4|NOT USED||TP11||TP10||TP9||TP8||TP7||TP6||TP5||TP4||TP3||TP2||TP1||TP0
|-
|colspan=4| ||colspan=12|12-bit Tone Period (TP) to Tone Generator
|}

=== Noise Generator Control (Register R6) ===

The frequency of the noise source is obtained in the PSG by first counting down the input clock by 16, then by furthur counting down the result by the programmed 5-bit Noise Period value. This 5-bit value consists of the lower 5-bits (B4--B0) of register R6, as illustrated in the following:

'''Noise Period Register'''

{|{{Prettytable|width: 700px; font-size: 2em;}}
|-
|'''B7'''||'''B6'''||'''B5'''||'''B4'''||'''B3'''||'''B2'''||'''B1'''||'''B0'''
|-
|colspan=3|NOT USED||colspan=5|5-bit Noise Period (NP) to Noise Generator
|}

=== Mixer Control Enable (Register R7) ===

Register R7 is multi-function /Enable register which controls the three Noise/Tone Mixers and the two general purpose I/O Ports.

The Mixers, as previously described, combine the noise and tone frequencies for each of the three channels. The determination of combining neither/either/both noise and tone frequencies on each channel is made by the state of bits B5--B0 of R7.

The direction (input or output) of the two general purpose I/O Ports (IOA and IOB) is determined by the state of bits B7 and B6 of R7.

These functions are illustrated in the following:

'''Mixer Control-I/O-Enable Register R7'''

{|{{Prettytable|width: 700px; font-size: 2em;}}
|-
|'''B7'''||'''B6'''||'''B5'''||'''B4'''||'''B3'''||'''B2'''||'''B1'''||'''B0'''
|-
|colspan=2|/Input Enable||colspan=3|/Noise Enable||colspan=3|/Tone Enable
|-
|B||A||C||B||A||C||B||A
|}

=== Amplitude Control (Registers R10,R11,R12) ===

The amplitudes of the signals generated by each of the three D/A Converters (one each for Channels A,B and C) is determined by the contents of the lower 5-bits (B4--B0) of registers R10,R11 and R12 as illustrated in the following:

{|{{Prettytable|width: 700px; font-size: 2em;}}
|'''Amplitude Control Register'''||'''Channel'''
|-
|R10||A
|-
|R11||B
|-
|R12||C
|}

{|{{Prettytable|width: 700px; font-size: 2em;}}
|'''B7'''||'''B6'''||'''B5'''||'''B4'''||'''B3'''||'''B2'''||'''B1'''||'''B0'''
|-
|colspan=3|NOT USED||M||L3||L2||L1||L0
|-
|colspan=3| ||amplitude "mode"||colspan=4|4-bit "fixed" amplitude level
|}

=== Envelope Generator Control (Registers R13,R14 and R15) ===

To acomplish the generation of fairly complex envelope patterns, two independant methods of control are provided in the PSG: first, it is possible to vary the frequency of the envelope using registers R13 and R14; and second, the relative shape and cycle pattern of the envelope can be varied using register R15. The following paragraphis explain the details of the envelope control functions, describing first the envelope period control and then the envelope shape/cycle control.

== ENVELOPE PERIOD CONTROL (Registers R13,R14) ==

The frequency of the envelope is obtained in the PSG by first counting down the input clock by 256, then by furthur counting down the result of the programmed 16-bit Envelope Period value. This 16-bit value is obtained in the PSG by combining the contents of the Envelope Coarse and Fine Tune registers, as illustrated in the following:

{|{{Prettytable|width: 700px; font-size: 2em;}}
|colspan=8|'''Envelope Coarse Tune Register R14'''||colspan=8|'''Envelope Fine Tune Register R13'''
|-
|B7||B6||B5||B4||B3||B2||B1||B0||B7||B6||B5||B4||B3||B2||B1||B0
|-
|EP15||EP14||EP13||EP12||EP11||EP10||EP9||EP8||EP7||EP6||EP5||EP4||EP3||EP2||EP1||EP0
|-
|colspan=16|16-bit Envelope Period (EP) to Envelope Generator
|}

== ENVELOPE SHAPE/CYCLE CONTROL (Register R15) ==

The Envelope Generator furthur counts down the envelope frequency by 16, producing a 16-state per cycle envelope pattern as defined by its 4-bit counter output, E3 E2 E1 E0. The particular shape and cycle pattern of any desired envelope is accomplished by controlling the count pattern (count up/count down) of the 4-bit counter and by defining a single cycle or repeat-cycle pattern.

This envelope shape/cycle control is contained in the 4 bits (B3--B0) of register R15. Each of these 4 bits controls a function in the envelope generator, as illustrated in the following:

== Envelope Shape/Cycle Control Register (R15) ==

{|{{Prettytable|width: 700px; font-size: 2em;}}
|B7||B6||B5||B4||B3||B2||B1||B0
|-
|colspan=4|NOT USED||Hold||Alternate||Attack||Continue
|-
|colspan=4| ||colspan=4|Function (To Envelope Generator)
|}

== I/O Port Data Store (Registers R16, R17) ==

Registers R16 and R17 function as intermediate data storage registers between the PSG/CPU data bus (DA0--DA7) and the two I/O ports (IOA7--IOA0 and IOB7--IOB0). Both ports are available in the AY-3-8910; only I/O port A is available in the AY-3-8912; none are available on the AY-3-8913. Using registers R16 and R17 for the transfer of I/O data has no effect on sound generation.

== D/A Converter Operation ==

Since the primary use of the PSG is to produce sound for the highly imperfect amplitude detection mechanism of the human ear, the D/A conversion is performed in logarithmic steps with a normalized voltage range of from 0 to 1 Volt. The specific amplitude control of each of the three D/A Converters is acomplished by the three sets of 4-bit outputs of the Amplitude Control block, while the Mixer outputs provide the base signal frequency (Noise and/or Tone).

'''Fig 1. ENVELOPE SHAPE/CYCLE OPERATION'''

{|{{Prettytable|width: 700px; font-size: 2em;}}
|colspan=4|R15 Bits||rowspan=3|GRAPHICAL REPRESENTATION OF ENVELOPE GENERATOR OUTPUT (E3 E2 E1 E0)
|-
|B3||B2||B1||B0
|-
|Continue||Attack||Alternate||Hold
|-
|0||0||x||x||[[Image:psg1.gif]]
|-
|0||1||x||x||[[Image:psg3.gif]]
|-
|1||0||0||0||[[Image:psg5.gif]]
|-
|1||0||0||1||[[Image:psg1.gif]]
|-
|1||0||1||0||[[Image:psg8.gif]]
|-
|1||0||1||1||[[Image:psg4.gif]]
|-
|1||1||0||0||[[Image:psg6.gif]]
|-
|1||1||0||1||[[Image:psg2.gif]]
|-
|1||1||1||0||[[Image:psg7.gif]]
|-
|1||1||1||1||[[Image:psg3.gif]]
|-
|colspan=4| ||[[Image:psg15.gif]]
|}

'''Fig 2. DETAIL OF TWO CYCLES Of Fig 1 (ref. waveform "1010" in Fig.1)'''

[[Image:psg9.gif]]

'''Fig 3. D/A CONVERTER OUTPUT'''

'''Fig 4. SINGLE TONE WITH ENVELOPE SHAPE/CYCLE PATTERN 1010'''

'''Fig 5. MIXTURE OF THREE TONES WITH FIXED AMPLITUDE'''

== ELECTRICAL CHARACTERISTICS (AY-3-8910, AY-3-8912) ==

Maximum Ratings*

Storage Temperature ...... -55°C to +150°C

Operating Temperature ...... 0°C to 40°C

Vcc and all other input/Output Voltages with Respect to Vss ...... -0.3V to +8.0V

Exceeding these ratings could cause permanent damage to the device. This is a stress rating only and functional operation of the devices at these conditions is not implied -- operating ranges are specified in Standard Conditions. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Data labelled " typical" is presented for design guidance only and is not guaranteed.

'''Storage Conditions (unless otherwise noted):'''

Vcc = ± 5V ±5%

Vss = GND

Operating Temperature = 0°C to +40°C

{|{{Prettytable|width: 700px; font-size: 2em;}}
|'''Characteristics'''||'''Sym'''||'''Min'''||'''Typ**'''||'''Max'''||'''Units'''||'''Conditions'''
|-
|'''DC CHARACTERISTICS'''
|-
|'''All inputs'''
|-
|Low level||Vil||0||-||0.6||V
|-
|High level||Vih||2.4||-||Vcc||V
|-
|'''All Outputs (except Analog Channel Outputs'''
|-
|Low level||Vol||0||-||0.5||V||Iol = 1.6mA, 20pF
|-
|High level||Voh||2.4||-||Vcc||V||Ioh = 100uA, 20pF
|-
|Analog Channel Outputs||Vo||0||-||60||dB||Test Curcuit: Fig 6
|-
|Power Supply Current||Icc||-||45||85||mA
|-
|'''AC CHARACTERISTICS'''
|-
|'''Clock Input'''||Fig 7.
|-
|Frequency||fc||1||-||2||MHz
|-
|Rise Time||tr||-||-||50||ns
|-
|Fall Time||tf||-||-||50||ns
|-
|Duty Cycle||-||25||50||85||%
|-
|'''Bus Signals (BDIR,BC2,BC1)'''
|-
|Associative Delay Time||tao||-||-||50||ns
|-
|'''Reset'''Fig. 8
|-
|Reset Pulse Width||trw||500||-||-||ns
|-
|Reset to Bus Control Delay Time||trb||100||-||-||ns
|-
|'''A9, A8, DA7--DA0 (Address Mode)'''||Fig 9
|-
|Address Setup Time||tas||400||-||-||ns
|-
|Address Hold Time||tah||100||-||-||ns
|-
|'''DA7--DA0 (Write Mode)'''||Fig. 10
|-
|Write Data Pulse Width||tdw||500||-||10,000||ns
|-
|Write Data Setup Time||tds||50||-||-||ns
|-
|Write Data Hold Time||tdh||100||-||-||ns
|-
|'''DA7--DA0 (Read Mode)'''||Fig. 11
|-
|Read Data Access Time||tda||-||250||500||ns
|-
|'''DA7--DA0 (Inactive Mode)'''
|-
|Tristate Delay Time||tts||-||100||200||ns
|}

** Typical values are at ±25°C and nominal voltages

'''Analogue Channel Output Test Curcuit'''

[[Image:psg11.gif]]

== ELECTRICAL CHARACTERISTICS (AY-3-8913) ==

Maximum Ratings*

Storage Temperature ...... -55°C to +150°C

Operating Temperature ...... 0°C to 70°C

Vcc and all other input/Output Voltages with Respect to Vss ...... -0.3V to +8.0V

* Exceeding these ratings could cause permanent damage to the device. This is a stress rating only and functional operation of the devices at these conditions is not implied -- operating ranges are specified in Standard Conditions. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Data labelled " typical" is presented for design guidance only and is not guaranteed.

'''Storage Conditions (unless otherwise noted):'''

Vcc = ± 5V ±5%

Vss = GND

Operating Temperature = 0°C to +70°C

{|{{Prettytable|width: 700px; font-size: 2em;}}
|'''Characteristics'''||'''Min'''||'''Sym'''||'''Max'''||'''Units'''||'''Conditions'''
|-
|'''DC CHARACTERISTICS'''
|-
|'''All inputs'''
|-
|Low level||Vil||0||0.7||V
|-
|High level||Vih||2.2||Vcc||V
|-
|'''All Outputs (except Analog Channel Outputs'''
|-
|Low level||Vol||0||0.4||V||1||TTL||Load
|-
|High level||Voh||2.4||Vcc||V||+100pf
|-
|'''Analog Channel Outputs'''||Vo||0||2000||uA||Test Curcuit: Fig 6
|-
|'''Power Supply Current'''||Icc||-||85||mA
|-
|'''AC CHARACTERISTICS'''
|-
|'''Clock Input'''||Fig 7.
|-
|Frequency||fc||1||2.5||MHz
|-
|Rise Time||tr||-||50||ns
|-
|Fall Time||tf||-||50||ns
|-
|Duty Cycle||-||40||60||%
|-
|'''Bus Signals (BDIR,BC2,BC1)'''
|-
|Associative Delay Time||tao||-||50||ns
|-
|'''Reset'''||Fig. 8
|-
|Reset Pulse Width||trw||5||-||us
|-
|Reset to Bus Control Delay Time||trb||100||-||ns
|-
|'''A9, A8, DA7--DA0 (Address Mode)'''||Fig 9
|-
|Address Setup Time tas 300 - ns
|-
|Address Hold Time tah 50 - ns
|-
|DA7--DA0 (Write Mode)'''||Fig. 10
|-
|Write Data Pulse Width||tdw||1800||-||ns
|-
|Write Data Setup Time||tds||50||-||ns
|-
|Write Data Hold Time||tdh||100||-||ns
|-
|'''DA7--DA0 (Read Mode)'''||Fig. 11
|-
|Read Data Access Time||tda||-||350||ns
|-
|'''DA7--DA0 (Inactive Mode)'''
|-
|Tristate Delay Time||tts||-||400||ns
|}

'''Fig 7. CLOCK AND BUS SIGNAL TIMING'''

'''Fig 8. RESET TIMING'''

'''Fig 9. LATCH ADDRESS TIMING'''

'''Fig 10. WRITE DATA TIMING'''

'''Fig 11. READ DATA TIMING'''

==Links==

[[AY|AY's page with less specific subjects]]

[[Category:Electronic Component]] [[Category:Datasheet]][[Category:Music and sound|*]][[Category:CPC Internal Components]]

Datasheet AY-8913

2011-03-14T01:53:56Z

Executioner: /* Tone Generator Control (Registers R0,R1,R2,R3,R4,R5) */ Fixed table format

== General Instruments - AY-3-8910, AY-3-8912, AY-3-8913 Programmable Sound Generator ==

=== FEATURES ===

* Full Software Control of Sound Generation
* Interface to Most 8-bit and 16-bit Microprocessors
* Three independantly Programmed Analog Outputs
* Two 8-bit General Purpose I/O ports (AY-3-8910)
* One 8-bit General Purpose I/O port (AY-3-8912)
* Single +5 Volt Supply

== DESCRIPTION ==

The [[AY]]-3-8910/8912/8913 Programmable Sound Generator (PSG) is a LSI Circuit which can produce a wide variety of complex sounds under software control. The AY-3-8910/8912/8913 is manufactured in the General Instrument N-Channel Ion Implant Process. Operation requires a single +5V power supply, a TTL compatible clock, and a microprocessor controller such as the General Instrument 16-bit CP1610 or one of the PIC1650 series of 8-bit microcomputers.

The PSG is easily interfaced to any bus orientation system, its flexibility makes it useful in applications such as music synthesis, sound effects generation, audible alarms, tone signalling and FSK modems. The analog sound outputs can each provide 4bits of logarithmic digital to analog conversion greatly enhancing the dynamic range of the sounds produced.

In order to perform sound effects while allowing the processor to continue its other tasks, the PSG can continue to produce sound after the initial commands have been given by the control processor. The fact that realistic sound production often involves more than one effect is satisfied by the three independantly controllable channels available in the PSG.

All of the circuit control signals are digital in nature and intended to be provided directly by a microprocessor/microcomputer. This means that one PSG can produce the full range of required sounds with no change in external circuitry. Since the frequency response of the PSG ranges from sub-audible at its lowest frequency to post-audible at its highest frequency, there are few sounds which are beyond reproduction ith only the simplest electical connections.

Since most applications of a microprocessor/PSG system would also require interfacing between the outside world and the microprocessor, this facility has been designed into the PSG. The AY-3-8910 has two general purpose 8-bit I/O ports and is supplied in a 40 lead package; the AY-3-8912 has one port and 28 leads; the AY-3-8913 has no ports and 24-leads.

== PIN CONFIGURATIONS ==

=== 40 LEAD DUAL IN LINE ===

AY-3-8910

[[Image:psg14.gif]]

=== 28 LEAD DUAL IN LINE ===

AY-3-8912

[[Image:psg12.gif]]

=== 24 LEAD DUAL IN LINE ===

AY-3-8913

[[Image:psg13.gif]]

== PIN FUNCTIONS ==

'''DA7--DA0 (input/output/high impedance) pins 30--37 (AY-3-8910) pins 21--28 (AY-3-8912) pins 4--11 (AY-3-8913)'''

'''Data/Address 7--0:'''

These 8 lines comprise the 8-bit bidirectional bus used by the microprocessor to send both data and addresses to the PSG and to recieve data from the PSG. In the data mode, DA7--DA0 correspond to Register Array bits B7--B0. In the address mode, DA3--DA0 select the register number (0--17 8) and a DA7-DA4 in conjunction with address inputs /A9 and A8 for the high order address (chip select).

'''A8 (input): pin 25 (AY-3-8910) pin 17 (AY-3-8912) pin 23 (AY-3-8913)'''

'''/A9 (input): pin 24 (AY-3-8910) pin 28 (AY-3-8912) (not provided on AY-3-8913)'''

'''/Address 9,Address 8'''

These "extra" address bits are made available to enable the positioning of the PSG (assigning a 16 word memory space) in a total 1,024 word memory area rather than in a 256 word memory area as defined by address bits DA7--DA0 alone. If the memory size does not require the use of these extra address lines they may be left unconnected as each is provided with either an on-chip pull down (/A9) or pull-up (A8) resistor. In "noisy" environments, however, it is recommended that /A9 and A8 be tied to an external ground and +5V, respectively, if they are not to be used.

'''/RESET (input): pin 23 (AY-3-8910) pin 21 (AY-3-8913) pin 16 (AY-3-8912)'''

For initialization/power on purposes, applying a logic "0" (ground) to the /Reset pin will reset all registers to "0". The /Reset pin is provided with an on-chip pull-up resistor.

'''CLOCK (signal): pin 22 (AY-3-8910) pin 20 (AY-3-8913) pin 15 (AY-3-8912)'''

This TTL-compatible input supplies the timing reference for the Tone, Noise and Envelope Generators.

'''BDIR,BC2,BC1 (inputs): pins 27,28,29 (AY-3-8910) pins 18,19,20 (AY-3-8912) pins 2,3 (No BC2 on AY-3-8913 see below)'''

'''Bus DiRection, Bus Control 2,1'''

These bus control signals are generated directly by the CP1610 series of microprocessors to control all external and internal bus operations in the PSG. When using a processor other than the Cp1610, these signals can be provided either by comparable bus signals or by simulating the signals on I/O lines of the processor. The PSG decodes these signals as illustrated in the following:

{|{{Prettytable|width: 700px; font-size: 2em;}}
|''BDIR''||''BC2''||''BC1''||''CP1610 Function''||''PSG Function''
|-
|0||0||0||NACT||INACTIVE. See 010 (IAB)
|-
|0||0||1||ADAR||LATCH ADDRESS. See 111 (INTAK)
|-
|0||1||0||IAB||INACTIVE: The PSG/CPU bus is inactive, DA7--DA0 are in high impedence state
|-
|0||1||1||DTB||READ FROM PSG. This signal causes the contents of the register which is currently addressed to appear on the PSG/CPU bus. DA7--DA0 are in output mode.
|-
|1||0||0||BAR||LATCH ADDRESS. See 111 (INTAK)
|-
|1||0||1||DW||INACTIVE. See 010 (IAB)
|-
|1||1||0||DWS||WRITE TO PSG. This signal indicates that the bus contains register data which should be latched into the currently addressed register DA7--DA0 are in input mode.
|-
|1||1||1||INTAK||LATCH ADDRESS. This signal indicates that the bus contains a register address which should be latched in the PSG. DA7--DA0 are in the input mode.
|}

While interfacing to a processor other than the CP1610 would simply require simulating the above decoding, the redundancies in the PSG function vs bus control signals can be used to advantage in that only four of the eight possible decoded bus functions are required by the PSG. This could simpify the programming of the bus control signals to the following, which only require that the processor generate two bus control signals (BDIR and BC1, with BC2 tied to +5v). This is the case with the AY-3-8913 with BC2 pulled high internally.

{|{{Prettytable|width: 700px; font-size: 2em;}}
|''BDIR''||''BC2''||''BC1''||''PSG Function''
|-
|0||1||0||INACTIVE
|-
|0||1||1||READ FROM PSG
|-
|1||1||0||WRITE TO PSG
|-
|1||1||1||LATCH ADDRESS
|}

[[Image:psg10.gif]]

'''ANALOG CHANNEL A,B,C (outputs): pins 4,3,38 (AY-3-8910) pins 5,4,1 (AY-3-8912) pins 17,15,18 (AY-3-8913)'''

Each of these signals is the output of its corresponding D/A Converter, and provides a up to 1V peak-peak signal representing the complex sound waveshape generated by the PSG.

'''IOA7--IOA0 (input/output): pins 14--21 (AY-3-8910) pins 7--14 (AY-3-8912) (not provided on AY-3-8913)'''

'''IOB7--IOB0 (input/output): pins 6--13 (AY-3-8910) (not provided on AY-3-8912) (not provided on AY-3-8913)'''

'''Input/Output A7--A0, B7--B0'''

Each of these two parallel input/output ports provides 8 bits of parallel data to/from the PSG/CPU bus from/to any external devices connected to the IOA or IOB pins. Each pin is provided with an on-chip pull-up resistor, so that when in the "input" mode, all pins will read normally high. Therefore, the recommended method for scanning external switches would be to ground the input bit.

'''TEST 1: pin 39 (AY-3-8910) pin 14 (AY-3-8913) pin 2 (AY-3-8912)'''

'''TEST 2: pin 26 (AY-3-8910) pin 12 (AY-3-8913) (not connected on AY-3-8912)'''

These pins are for General Instrument test purposes only and should be left open -- do not use as tie-points.

'''Vcc: pin 40 (AY-3-8910) pin 13 (AY-3-8913) pin 3 (AY-3-8912)'''

Nominal +5Volt power supply to PSG.

'''Vss: pin 1 (AY-3-8910) pin 19 (AY-3-8913) pin 6 (AY-3-8912)'''

Ground reference for the PSG.

'''/CHIP SELECT (Input): pin 24 (AY-3-8913 only)'''

This input signal goes low to enable the PSG to read data on the data bus or write data from the data bus to one of the internal registers. For these above operations to occur, this signal must be true in addition to the current bus address being a valid PSG address. This signal must be valid for all read and write operations. This pin has an internal pull down to Vss.

== ARCHITECTURE ==

The AY-3-8910/8912/8913 is a register oriented Programmable Sound Generator (PSG). Communication between the processor and the PSG is based on the concept of memory-mapped I/O. Control commands are issued to the PSG by writing to 16 memory-mapped registers. Each of the 16 registers within the PSG is also readable so that the microprocessor can determine, as necessary, present states or stored data values.

All functions of the PSG are controlled through the 16 registers which once programmed, generate and sustain the sounds, thus freeing the system processor for other tasks.

== REGISTER ARRAY ==

The principle element of the PSG is the array of 16 read/write control registers. These 16 registers look to the CPU as a block of memory and as such occupy a 16 word block out of 1,024 possible addresses. The 10 address bits (8 bits on the common data/address bus, and 2 seperate address bits A8 and /A9) are decoded as follows:

{|{{Prettytable|width: 700px; font-size: 2em;}}
|'''/A9*'''||'''A8'''||'''DA7'''||'''DA6'''||'''DA5'''||'''DA4'''||'''DA3'''||'''DA2'''||'''DA1'''||'''DA0'''
|-
|0||1||0||0||0||0||0||0||0||0
|}

'''THRU'''
{|{{Prettytable|width: 700px; font-size: 2em;}}
|-
|'''0'''||'''1'''||'''0'''||'''0'''||'''0'''||'''0'''||'''1'''||'''1'''||'''1'''||'''1'''
|-
|colspan=4|High Order (Chip Select)||colspan=4|Low order (Register No.)
|}
* /A9 is not provided on the AY-3-8912

The four low order address bits select one of the 16 registers (R0--R17). The six high order address bits function as "chip selects" to control the tri-state bidirectional buffers (when the high order address bits are "incorrect", the bi-directional buffers are forced to the high impedance state). High order address bits /A9, A8 are fixed in the PSG design to recognise a 01 code; high order address bits DA7-DA4 may be mask programmed to any 4-bit code by a special order factory mask modification. Unless otherwise specified, address bits DA7--DA4 are programmed to recognise only a 0000 code. A valid high order address latches the register address (the low order 4 bits) in the Register Address Latch/Decoder block. A latched address will remain valid until the receipt of a new address, enabling multiple reads and writes of the same register contents without the need for redundant re-addressing.

Conditioning of the Register Address Latch/Decoder and the Bidirectional Buffers to recognise the bus function required (inactive, latch address, write data, or read data) is accomplished by the Bus Control Decode block.

== SOUND GENERATING BLOCKS ==

The basic blocks in the PSG which produce the programmed sounds include:

* Tone Generators produce the basic square wave tone frequencies for each channel (A,B,C)

* Noise Generator produces a frequency modulated pseudo random pulse width square wave output.

* Mixers combine the outputs of the Tone Generators and the Noise Generator. One for each channel (A,B,C)

* Amplitude Control provides the D/A Converters with either a fixed or variable amplitude pattern. The fixed amplitude is under direct CPU control; the variable amplitude is accomplished by using, the output of the Envelope Generator.

* Envelope Generator produces an evelope pattern which can be used to amplitude modulate the output of each Mixer.

* D/A Converters the three D/A Converters each produce up to a 16 level output signal as determined by the Amplitude Control.

== I/O PORTS ==

Two additional blocks are shown in the PSG Block Diagram which have nothing directly to do with the production of sound -- these are the two I/O ports (A and B). Since virtually all uses of microprocessor-based sound would require interfacing between the outside world and the processor, this facility has been included in the PSG. Data to/from the CPU bus may be read/written to either of two 8-bit I/O Ports without affecting any other function of the PSG. The I/O Ports are TTL-compatible and are provided with internal pull-ups on each pin. Both Ports are available on the AY-3-8910; only I/O Port A is available on the AY-3-8912; no ports are available on the AY-3-8913.

'''PSG BLOCK DIAGRAM'''

[[Image:psg16.gif]]

== OPERATION ==

Since all functions of the PSG are controlled by the processor via a series of register loads, a detailed description of the PSG operation can best be acomplished by relating each PSG function to the control of its corresponding register. The function of creating or programming a specific sound or sound effect logically follows the control sequence listed:

{|{{Prettytable|width: 700px; font-size: 2em;}}
|'''Operation'''|'''Registers'''|'''Function'''
|-
|Tone Generator Control||R0--R5||Program tone periods.
|-
|Noise Generator Control||R6||Program noise period.
|-
|Mixer Control||R7||Enable tone and/or noise on selected channels.
|-
|Amplitude Control||R10--R12||Select "fixed" or "envelope-variable" amplitudes.
|-
|Envelope Generator Control||R13--R15||Program envelope period and select envelope pattern.
|}

=== Tone Generator Control (Registers R0,R1,R2,R3,R4,R5) ===

The frequency of each square wave generated by the three Tone Generators (one each for Channels A,B and C) is obtained in the PSG by first counting down the input clock by 16, then by furthur counting down the result by the programmed 12-bit Tone Period value. Each 12-bit value is obtained in the PSG by combining the contents of the relative Course and Fine Tune registers, as illustrated in the following:

{|{{Prettytable|width: 700px; font-size: 2em;}}
|'''Course Tone Register'''||'''Channel'''||'''Fine Tune Register'''
|-
|R1||A||R0
|-
|R3||B||R2
|-
|R5||C||R4
|}

{|{{Prettytable|width: 700px; font-size: 2em;}}
|colspan=8|'''Course Tone Register'''||colspan=8|'''Fine Tune Register'''
|-
|B7||B6||B5||B4||B3||B2||B1||B0||B7||B6||B5||B4||B3||B2||B1||B0
|-
|colspan=4|NOT USED||TP11||TP10||TP9||TP8||TP7||TP6||TP5||TP4||TP3||TP2||TP1||TP0
|-
|colspan=4| ||colspan=12|12-bit Tone Period (TP) to Tone Generator
|}

=== Noise Generator Control (Register R6) ===

The frequency of the noise source is obtained in the PSG by first counting down the input clock by 16, then by furthur counting down the result by the programmed 5-bit Noise Period value. This 5-bit value consists of the lower 5-bits (B4--B0) of register R6, as illustrated in the following:

'''Noise Period Register'''

{|{{Prettytable|width: 700px; font-size: 2em;}}
|-
|'''B7'''||'''B6'''||'''B5'''||'''B4'''||'''B3'''||'''B2'''||'''B1'''||'''B0'''
|-
|colspan=3|NOT USED||colspan=5|5-bit Noise Period (NP) to Noise Generator
|}

=== Mixer Control Enable (Register R7) ===

Register R7 is multi-function /Enable register which controls the three Noise/Tone Mixers and the two general purpose I/O Ports.

The Mixers, as previously described, combine the noise and tone frequencies for each of the three channels. The determination of combining neither/either/both noise and tone frequencies on each channel is made by the state of bits B5--B0 of R7.

The direction (input or output) of the two general purpose I/O Ports (IOA and IOB) is determined by the state of bits B7 and B6 of R7.

These functions are illustrated in the following:

'''Mixer Control-I/O-Enable Register R7'''

{|{{Prettytable|width: 700px; font-size: 2em;}}
|-
|'''B7'''||'''B6'''||'''B5'''||'''B4'''||'''B3'''||'''B2'''||'''B1'''||'''B0'''
|-
|colspan=2|/Input Enable||colspan=3|/Noise Enable||colspan=3|/Tone Enable
|-
|B||A||C||B||A||C||B||A
|}

=== Amplitude Control (Registers R10,R11,R12) ===

The amplitudes of the signals generated by each of the three D/A Converters (one each for Channels A,B and C) is determined by the contents of the lower 5-bits (B4--B0) of registers R10,R11 and R12 as illustrated in the following:

{|{{Prettytable|width: 700px; font-size: 2em;}}
|'''Amplitude Control Register'''||'''Channel'''
|-
|R10||A
|-
|R11||B
|-
|R12||C
|}

{|{{Prettytable|width: 700px; font-size: 2em;}}
|'''B7'''||'''B6'''||'''B5'''||'''B4'''||'''B3'''||'''B2'''||'''B1'''||'''B0'''
|-
|colspan=3|NOT USED||M||L3||L2||L1||L0
|-
|colspan=3| ||amplitude "mode"||cospan=4|4-bit "fixed" amplitude level
|}

=== Envelope Generator Control (Registers R13,R14 and R15) ===

To acomplish the generation of fairly complex envelope patterns, two independant methods of control are provided in the PSG: first, it is possible to vary the frequency of the envelope using registers R13 and R14; and second, the relative shape and cycle pattern of the envelope can be varied using register R15. The following paragraphis explain the details of the envelope control functions, describing first the envelope period control and then the envelope shape/cycle control.

== ENVELOPE PERIOD CONTROL (Registers R13,R14) ==

The frequency of the envelope is obtained in the PSG by first counting down the input clock by 256, then by furthur counting down the result of the programmed 16-bit Envelope Period value. This 16-bit value is obtained in the PSG by combining the contents of the Envelope Coarse and Fine Tune registers, as illustrated in the following:

{|{{Prettytable|width: 700px; font-size: 2em;}}
|colspan=8|'''Envelope Coarse Tune Register R14'''||colspan=8|'''Envelope Fine Tune Register R13'''
|-
|B7||B6||B5||B4||B3||B2||B1||B0||B7||B6||B5||B4||B3||B2||B1||B0
|-
|EP15||EP14||EP13||EP12||EP11||EP10||EP9||EP8||EP7||EP6||EP5||EP4||EP3||EP2||EP1||EP0
|-
|colspan=16|16-bit Envelope Period (EP) to Envelope Generator
|}

== ENVELOPE SHAPE/CYCLE CONTROL (Register R15) ==

The Envelope Generator furthur counts down the envelope frequency by 16, producing a 16-state per cycle envelope pattern as defined by its 4-bit counter output, E3 E2 E1 E0. The particular shape and cycle pattern of any desired envelope is accomplished by controlling the count pattern (count up/count down) of the 4-bit counter and by defining a single cycle or repeat-cycle pattern.

This envelope shape/cycle control is contained in the 4 bits (B3--B0) of register R15. Each of these 4 bits controls a function in the envelope generator, as illustrated in the following:

== Envelope Shape/Cycle Control Register (R15) ==

{|{{Prettytable|width: 700px; font-size: 2em;}}
|B7||B6||B5||B4||B3||B2||B1||B0
|-
|colspan=4|NOT USED||Hold||Alternate||Attack||Continue
|-
|colspan=4| ||colspan=4|Function (To Envelope Generator)
|}

== I/O Port Data Store (Registers R16, R17) ==

Registers R16 and R17 function as intermediate data storage registers between the PSG/CPU data bus (DA0--DA7) and the two I/O ports (IOA7--IOA0 and IOB7--IOB0). Both ports are available in the AY-3-8910; only I/O port A is available in the AY-3-8912; none are available on the AY-3-8913. Using registers R16 and R17 for the transfer of I/O data has no effect on sound generation.

== D/A Converter Operation ==

Since the primary use of the PSG is to produce sound for the highly imperfect amplitude detection mechanism of the human ear, the D/A conversion is performed in logarithmic steps with a normalized voltage range of from 0 to 1 Volt. The specific amplitude control of each of the three D/A Converters is acomplished by the three sets of 4-bit outputs of the Amplitude Control block, while the Mixer outputs provide the base signal frequency (Noise and/or Tone).

'''Fig 1. ENVELOPE SHAPE/CYCLE OPERATION'''

{|{{Prettytable|width: 700px; font-size: 2em;}}
|colspan=4|R15 Bits||rowspan=3|GRAPHICAL REPRESENTATION OF ENVELOPE GENERATOR OUTPUT (E3 E2 E1 E0)
|-
|B3||B2||B1||B0
|-
|Continue||Attack||Alternate||Hold
|-
|0||0||x||x||[[Image:psg1.gif]]
|-
|0||1||x||x||[[Image:psg3.gif]]
|-
|1||0||0||0||[[Image:psg5.gif]]
|-
|1||0||0||1||[[Image:psg1.gif]]
|-
|1||0||1||0||[[Image:psg8.gif]]
|-
|1||0||1||1||[[Image:psg4.gif]]
|-
|1||1||0||0||[[Image:psg6.gif]]
|-
|1||1||0||1||[[Image:psg2.gif]]
|-
|1||1||1||0||[[Image:psg7.gif]]
|-
|1||1||1||1||[[Image:psg3.gif]]
|-
|colspan=4| ||[[Image:psg15.gif]]
|}

'''Fig 2. DETAIL OF TWO CYCLES Of Fig 1 (ref. waveform "1010" in Fig.1)'''

[[Image:psg9.gif]]

'''Fig 3. D/A CONVERTER OUTPUT'''

'''Fig 4. SINGLE TONE WITH ENVELOPE SHAPE/CYCLE PATTERN 1010'''

'''Fig 5. MIXTURE OF THREE TONES WITH FIXED AMPLITUDE'''

== ELECTRICAL CHARACTERISTICS (AY-3-8910, AY-3-8912) ==

Maximum Ratings*

Storage Temperature ...... -55°C to +150°C

Operating Temperature ...... 0°C to 40°C

Vcc and all other input/Output Voltages with Respect to Vss ...... -0.3V to +8.0V

Exceeding these ratings could cause permanent damage to the device. This is a stress rating only and functional operation of the devices at these conditions is not implied -- operating ranges are specified in Standard Conditions. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Data labelled " typical" is presented for design guidance only and is not guaranteed.

'''Storage Conditions (unless otherwise noted):'''

Vcc = ± 5V ±5%

Vss = GND

Operating Temperature = 0°C to +40°C

{|{{Prettytable|width: 700px; font-size: 2em;}}
|'''Characteristics'''||'''Sym'''||'''Min'''||'''Typ**'''||'''Max'''||'''Units'''||'''Conditions'''
|-
|'''DC CHARACTERISTICS'''
|-
|'''All inputs'''
|-
|Low level||Vil||0||-||0.6||V
|-
|High level||Vih||2.4||-||Vcc||V
|-
|'''All Outputs (except Analog Channel Outputs'''
|-
|Low level||Vol||0||-||0.5||V||Iol = 1.6mA, 20pF
|-
|High level||Voh||2.4||-||Vcc||V||Ioh = 100uA, 20pF
|-
|Analog Channel Outputs||Vo||0||-||60||dB||Test Curcuit: Fig 6
|-
|Power Supply Current||Icc||-||45||85||mA
|-
|'''AC CHARACTERISTICS'''
|-
|'''Clock Input'''||Fig 7.
|-
|Frequency||fc||1||-||2||MHz
|-
|Rise Time||tr||-||-||50||ns
|-
|Fall Time||tf||-||-||50||ns
|-
|Duty Cycle||-||25||50||85||%
|-
|'''Bus Signals (BDIR,BC2,BC1)'''
|-
|Associative Delay Time||tao||-||-||50||ns
|-
|'''Reset'''Fig. 8
|-
|Reset Pulse Width||trw||500||-||-||ns
|-
|Reset to Bus Control Delay Time||trb||100||-||-||ns
|-
|'''A9, A8, DA7--DA0 (Address Mode)'''||Fig 9
|-
|Address Setup Time||tas||400||-||-||ns
|-
|Address Hold Time||tah||100||-||-||ns
|-
|'''DA7--DA0 (Write Mode)'''||Fig. 10
|-
|Write Data Pulse Width||tdw||500||-||10,000||ns
|-
|Write Data Setup Time||tds||50||-||-||ns
|-
|Write Data Hold Time||tdh||100||-||-||ns
|-
|'''DA7--DA0 (Read Mode)'''||Fig. 11
|-
|Read Data Access Time||tda||-||250||500||ns
|-
|'''DA7--DA0 (Inactive Mode)'''
|-
|Tristate Delay Time||tts||-||100||200||ns
|}

** Typical values are at ±25°C and nominal voltages

'''Analogue Channel Output Test Curcuit'''

[[Image:psg11.gif]]

== ELECTRICAL CHARACTERISTICS (AY-3-8913) ==

Maximum Ratings*

Storage Temperature ...... -55°C to +150°C

Operating Temperature ...... 0°C to 70°C

Vcc and all other input/Output Voltages with Respect to Vss ...... -0.3V to +8.0V

* Exceeding these ratings could cause permanent damage to the device. This is a stress rating only and functional operation of the devices at these conditions is not implied -- operating ranges are specified in Standard Conditions. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Data labelled " typical" is presented for design guidance only and is not guaranteed.

'''Storage Conditions (unless otherwise noted):'''

Vcc = ± 5V ±5%

Vss = GND

Operating Temperature = 0°C to +70°C

{|{{Prettytable|width: 700px; font-size: 2em;}}
|'''Characteristics'''||'''Min'''||'''Sym'''||'''Max'''||'''Units'''||'''Conditions'''
|-
|'''DC CHARACTERISTICS'''
|-
|'''All inputs'''
|-
|Low level||Vil||0||0.7||V
|-
|High level||Vih||2.2||Vcc||V
|-
|'''All Outputs (except Analog Channel Outputs'''
|-
|Low level||Vol||0||0.4||V||1||TTL||Load
|-
|High level||Voh||2.4||Vcc||V||+100pf
|-
|'''Analog Channel Outputs'''||Vo||0||2000||uA||Test Curcuit: Fig 6
|-
|'''Power Supply Current'''||Icc||-||85||mA
|-
|'''AC CHARACTERISTICS'''
|-
|'''Clock Input'''||Fig 7.
|-
|Frequency||fc||1||2.5||MHz
|-
|Rise Time||tr||-||50||ns
|-
|Fall Time||tf||-||50||ns
|-
|Duty Cycle||-||40||60||%
|-
|'''Bus Signals (BDIR,BC2,BC1)'''
|-
|Associative Delay Time||tao||-||50||ns
|-
|'''Reset'''||Fig. 8
|-
|Reset Pulse Width||trw||5||-||us
|-
|Reset to Bus Control Delay Time||trb||100||-||ns
|-
|'''A9, A8, DA7--DA0 (Address Mode)'''||Fig 9
|-
|Address Setup Time tas 300 - ns
|-
|Address Hold Time tah 50 - ns
|-
|DA7--DA0 (Write Mode)'''||Fig. 10
|-
|Write Data Pulse Width||tdw||1800||-||ns
|-
|Write Data Setup Time||tds||50||-||ns
|-
|Write Data Hold Time||tdh||100||-||ns
|-
|'''DA7--DA0 (Read Mode)'''||Fig. 11
|-
|Read Data Access Time||tda||-||350||ns
|-
|'''DA7--DA0 (Inactive Mode)'''
|-
|Tristate Delay Time||tts||-||400||ns
|}

'''Fig 7. CLOCK AND BUS SIGNAL TIMING'''

'''Fig 8. RESET TIMING'''

'''Fig 9. LATCH ADDRESS TIMING'''

'''Fig 10. WRITE DATA TIMING'''

'''Fig 11. READ DATA TIMING'''

==Links==

[[AY|AY's page with less specific subjects]]

[[Category:Electronic Component]] [[Category:Datasheet]][[Category:Music and sound|*]][[Category:CPC Internal Components]]

Datasheet AY-8913

2011-03-14T01:51:15Z

Executioner: /* Noise Generator Control (Register R6) */ Removed R6 from table itself

== General Instruments - AY-3-8910, AY-3-8912, AY-3-8913 Programmable Sound Generator ==

=== FEATURES ===

* Full Software Control of Sound Generation
* Interface to Most 8-bit and 16-bit Microprocessors
* Three independantly Programmed Analog Outputs
* Two 8-bit General Purpose I/O ports (AY-3-8910)
* One 8-bit General Purpose I/O port (AY-3-8912)
* Single +5 Volt Supply

== DESCRIPTION ==

The [[AY]]-3-8910/8912/8913 Programmable Sound Generator (PSG) is a LSI Circuit which can produce a wide variety of complex sounds under software control. The AY-3-8910/8912/8913 is manufactured in the General Instrument N-Channel Ion Implant Process. Operation requires a single +5V power supply, a TTL compatible clock, and a microprocessor controller such as the General Instrument 16-bit CP1610 or one of the PIC1650 series of 8-bit microcomputers.

The PSG is easily interfaced to any bus orientation system, its flexibility makes it useful in applications such as music synthesis, sound effects generation, audible alarms, tone signalling and FSK modems. The analog sound outputs can each provide 4bits of logarithmic digital to analog conversion greatly enhancing the dynamic range of the sounds produced.

In order to perform sound effects while allowing the processor to continue its other tasks, the PSG can continue to produce sound after the initial commands have been given by the control processor. The fact that realistic sound production often involves more than one effect is satisfied by the three independantly controllable channels available in the PSG.

All of the circuit control signals are digital in nature and intended to be provided directly by a microprocessor/microcomputer. This means that one PSG can produce the full range of required sounds with no change in external circuitry. Since the frequency response of the PSG ranges from sub-audible at its lowest frequency to post-audible at its highest frequency, there are few sounds which are beyond reproduction ith only the simplest electical connections.

Since most applications of a microprocessor/PSG system would also require interfacing between the outside world and the microprocessor, this facility has been designed into the PSG. The AY-3-8910 has two general purpose 8-bit I/O ports and is supplied in a 40 lead package; the AY-3-8912 has one port and 28 leads; the AY-3-8913 has no ports and 24-leads.

== PIN CONFIGURATIONS ==

=== 40 LEAD DUAL IN LINE ===

AY-3-8910

[[Image:psg14.gif]]

=== 28 LEAD DUAL IN LINE ===

AY-3-8912

[[Image:psg12.gif]]

=== 24 LEAD DUAL IN LINE ===

AY-3-8913

[[Image:psg13.gif]]

== PIN FUNCTIONS ==

'''DA7--DA0 (input/output/high impedance) pins 30--37 (AY-3-8910) pins 21--28 (AY-3-8912) pins 4--11 (AY-3-8913)'''

'''Data/Address 7--0:'''

These 8 lines comprise the 8-bit bidirectional bus used by the microprocessor to send both data and addresses to the PSG and to recieve data from the PSG. In the data mode, DA7--DA0 correspond to Register Array bits B7--B0. In the address mode, DA3--DA0 select the register number (0--17 8) and a DA7-DA4 in conjunction with address inputs /A9 and A8 for the high order address (chip select).

'''A8 (input): pin 25 (AY-3-8910) pin 17 (AY-3-8912) pin 23 (AY-3-8913)'''

'''/A9 (input): pin 24 (AY-3-8910) pin 28 (AY-3-8912) (not provided on AY-3-8913)'''

'''/Address 9,Address 8'''

These "extra" address bits are made available to enable the positioning of the PSG (assigning a 16 word memory space) in a total 1,024 word memory area rather than in a 256 word memory area as defined by address bits DA7--DA0 alone. If the memory size does not require the use of these extra address lines they may be left unconnected as each is provided with either an on-chip pull down (/A9) or pull-up (A8) resistor. In "noisy" environments, however, it is recommended that /A9 and A8 be tied to an external ground and +5V, respectively, if they are not to be used.

'''/RESET (input): pin 23 (AY-3-8910) pin 21 (AY-3-8913) pin 16 (AY-3-8912)'''

For initialization/power on purposes, applying a logic "0" (ground) to the /Reset pin will reset all registers to "0". The /Reset pin is provided with an on-chip pull-up resistor.

'''CLOCK (signal): pin 22 (AY-3-8910) pin 20 (AY-3-8913) pin 15 (AY-3-8912)'''

This TTL-compatible input supplies the timing reference for the Tone, Noise and Envelope Generators.

'''BDIR,BC2,BC1 (inputs): pins 27,28,29 (AY-3-8910) pins 18,19,20 (AY-3-8912) pins 2,3 (No BC2 on AY-3-8913 see below)'''

'''Bus DiRection, Bus Control 2,1'''

These bus control signals are generated directly by the CP1610 series of microprocessors to control all external and internal bus operations in the PSG. When using a processor other than the Cp1610, these signals can be provided either by comparable bus signals or by simulating the signals on I/O lines of the processor. The PSG decodes these signals as illustrated in the following:

{|{{Prettytable|width: 700px; font-size: 2em;}}
|''BDIR''||''BC2''||''BC1''||''CP1610 Function''||''PSG Function''
|-
|0||0||0||NACT||INACTIVE. See 010 (IAB)
|-
|0||0||1||ADAR||LATCH ADDRESS. See 111 (INTAK)
|-
|0||1||0||IAB||INACTIVE: The PSG/CPU bus is inactive, DA7--DA0 are in high impedence state
|-
|0||1||1||DTB||READ FROM PSG. This signal causes the contents of the register which is currently addressed to appear on the PSG/CPU bus. DA7--DA0 are in output mode.
|-
|1||0||0||BAR||LATCH ADDRESS. See 111 (INTAK)
|-
|1||0||1||DW||INACTIVE. See 010 (IAB)
|-
|1||1||0||DWS||WRITE TO PSG. This signal indicates that the bus contains register data which should be latched into the currently addressed register DA7--DA0 are in input mode.
|-
|1||1||1||INTAK||LATCH ADDRESS. This signal indicates that the bus contains a register address which should be latched in the PSG. DA7--DA0 are in the input mode.
|}

While interfacing to a processor other than the CP1610 would simply require simulating the above decoding, the redundancies in the PSG function vs bus control signals can be used to advantage in that only four of the eight possible decoded bus functions are required by the PSG. This could simpify the programming of the bus control signals to the following, which only require that the processor generate two bus control signals (BDIR and BC1, with BC2 tied to +5v). This is the case with the AY-3-8913 with BC2 pulled high internally.

{|{{Prettytable|width: 700px; font-size: 2em;}}
|''BDIR''||''BC2''||''BC1''||''PSG Function''
|-
|0||1||0||INACTIVE
|-
|0||1||1||READ FROM PSG
|-
|1||1||0||WRITE TO PSG
|-
|1||1||1||LATCH ADDRESS
|}

[[Image:psg10.gif]]

'''ANALOG CHANNEL A,B,C (outputs): pins 4,3,38 (AY-3-8910) pins 5,4,1 (AY-3-8912) pins 17,15,18 (AY-3-8913)'''

Each of these signals is the output of its corresponding D/A Converter, and provides a up to 1V peak-peak signal representing the complex sound waveshape generated by the PSG.

'''IOA7--IOA0 (input/output): pins 14--21 (AY-3-8910) pins 7--14 (AY-3-8912) (not provided on AY-3-8913)'''

'''IOB7--IOB0 (input/output): pins 6--13 (AY-3-8910) (not provided on AY-3-8912) (not provided on AY-3-8913)'''

'''Input/Output A7--A0, B7--B0'''

Each of these two parallel input/output ports provides 8 bits of parallel data to/from the PSG/CPU bus from/to any external devices connected to the IOA or IOB pins. Each pin is provided with an on-chip pull-up resistor, so that when in the "input" mode, all pins will read normally high. Therefore, the recommended method for scanning external switches would be to ground the input bit.

'''TEST 1: pin 39 (AY-3-8910) pin 14 (AY-3-8913) pin 2 (AY-3-8912)'''

'''TEST 2: pin 26 (AY-3-8910) pin 12 (AY-3-8913) (not connected on AY-3-8912)'''

These pins are for General Instrument test purposes only and should be left open -- do not use as tie-points.

'''Vcc: pin 40 (AY-3-8910) pin 13 (AY-3-8913) pin 3 (AY-3-8912)'''

Nominal +5Volt power supply to PSG.

'''Vss: pin 1 (AY-3-8910) pin 19 (AY-3-8913) pin 6 (AY-3-8912)'''

Ground reference for the PSG.

'''/CHIP SELECT (Input): pin 24 (AY-3-8913 only)'''

This input signal goes low to enable the PSG to read data on the data bus or write data from the data bus to one of the internal registers. For these above operations to occur, this signal must be true in addition to the current bus address being a valid PSG address. This signal must be valid for all read and write operations. This pin has an internal pull down to Vss.

== ARCHITECTURE ==

The AY-3-8910/8912/8913 is a register oriented Programmable Sound Generator (PSG). Communication between the processor and the PSG is based on the concept of memory-mapped I/O. Control commands are issued to the PSG by writing to 16 memory-mapped registers. Each of the 16 registers within the PSG is also readable so that the microprocessor can determine, as necessary, present states or stored data values.

All functions of the PSG are controlled through the 16 registers which once programmed, generate and sustain the sounds, thus freeing the system processor for other tasks.

== REGISTER ARRAY ==

The principle element of the PSG is the array of 16 read/write control registers. These 16 registers look to the CPU as a block of memory and as such occupy a 16 word block out of 1,024 possible addresses. The 10 address bits (8 bits on the common data/address bus, and 2 seperate address bits A8 and /A9) are decoded as follows:

{|{{Prettytable|width: 700px; font-size: 2em;}}
|'''/A9*'''||'''A8'''||'''DA7'''||'''DA6'''||'''DA5'''||'''DA4'''||'''DA3'''||'''DA2'''||'''DA1'''||'''DA0'''
|-
|0||1||0||0||0||0||0||0||0||0
|}

'''THRU'''
{|{{Prettytable|width: 700px; font-size: 2em;}}
|-
|'''0'''||'''1'''||'''0'''||'''0'''||'''0'''||'''0'''||'''1'''||'''1'''||'''1'''||'''1'''
|-
|colspan=4|High Order (Chip Select)||colspan=4|Low order (Register No.)
|}
* /A9 is not provided on the AY-3-8912

The four low order address bits select one of the 16 registers (R0--R17). The six high order address bits function as "chip selects" to control the tri-state bidirectional buffers (when the high order address bits are "incorrect", the bi-directional buffers are forced to the high impedance state). High order address bits /A9, A8 are fixed in the PSG design to recognise a 01 code; high order address bits DA7-DA4 may be mask programmed to any 4-bit code by a special order factory mask modification. Unless otherwise specified, address bits DA7--DA4 are programmed to recognise only a 0000 code. A valid high order address latches the register address (the low order 4 bits) in the Register Address Latch/Decoder block. A latched address will remain valid until the receipt of a new address, enabling multiple reads and writes of the same register contents without the need for redundant re-addressing.

Conditioning of the Register Address Latch/Decoder and the Bidirectional Buffers to recognise the bus function required (inactive, latch address, write data, or read data) is accomplished by the Bus Control Decode block.

== SOUND GENERATING BLOCKS ==

The basic blocks in the PSG which produce the programmed sounds include:

* Tone Generators produce the basic square wave tone frequencies for each channel (A,B,C)

* Noise Generator produces a frequency modulated pseudo random pulse width square wave output.

* Mixers combine the outputs of the Tone Generators and the Noise Generator. One for each channel (A,B,C)

* Amplitude Control provides the D/A Converters with either a fixed or variable amplitude pattern. The fixed amplitude is under direct CPU control; the variable amplitude is accomplished by using, the output of the Envelope Generator.

* Envelope Generator produces an evelope pattern which can be used to amplitude modulate the output of each Mixer.

* D/A Converters the three D/A Converters each produce up to a 16 level output signal as determined by the Amplitude Control.

== I/O PORTS ==

Two additional blocks are shown in the PSG Block Diagram which have nothing directly to do with the production of sound -- these are the two I/O ports (A and B). Since virtually all uses of microprocessor-based sound would require interfacing between the outside world and the processor, this facility has been included in the PSG. Data to/from the CPU bus may be read/written to either of two 8-bit I/O Ports without affecting any other function of the PSG. The I/O Ports are TTL-compatible and are provided with internal pull-ups on each pin. Both Ports are available on the AY-3-8910; only I/O Port A is available on the AY-3-8912; no ports are available on the AY-3-8913.

'''PSG BLOCK DIAGRAM'''

[[Image:psg16.gif]]

== OPERATION ==

Since all functions of the PSG are controlled by the processor via a series of register loads, a detailed description of the PSG operation can best be acomplished by relating each PSG function to the control of its corresponding register. The function of creating or programming a specific sound or sound effect logically follows the control sequence listed:

{|{{Prettytable|width: 700px; font-size: 2em;}}
|'''Operation'''|'''Registers'''|'''Function'''
|-
|Tone Generator Control||R0--R5||Program tone periods.
|-
|Noise Generator Control||R6||Program noise period.
|-
|Mixer Control||R7||Enable tone and/or noise on selected channels.
|-
|Amplitude Control||R10--R12||Select "fixed" or "envelope-variable" amplitudes.
|-
|Envelope Generator Control||R13--R15||Program envelope period and select envelope pattern.
|}

=== Tone Generator Control (Registers R0,R1,R2,R3,R4,R5) ===

The frequency of each square wave generated by the three Tone Generators (one each for Channels A,B and C) is obtained in the PSG by first counting down the input clock by 16, then by furthur counting down the result by the programmed 12-bit Tone Period value. Each 12-bit value is obtained in the PSG by combining the contents of the relative Course and Fine Tune registers, as illustrated in the following:

{|{{Prettytable|width: 700px; font-size: 2em;}}
|'''Course Tone Register'''||'''Channel'''||'''Fine Tune Register'''
|-
|R1||A||R0
|-
|R3||B||R2
|-
|R5||C||R4
|}

{|{{Prettytable|width: 700px; font-size: 2em;}}
|colspan=8|'''Course Tone Register'''||colspan=8|'''Fine Tune Register'''
|-
|B7||B6||B5||B4||B3||B2||B1||B0||B7||B6||B5||B4||B3||B2||B1||B0
|-
|colspan=4|NOT USED||TP11||TP10||TP9||TP8||TP7||TP6||TP5||TP4||TP3||TP2||TP1||TP0
|-
|12-bit Tone Period (TP) to Tone Generator
|}

=== Noise Generator Control (Register R6) ===

The frequency of the noise source is obtained in the PSG by first counting down the input clock by 16, then by furthur counting down the result by the programmed 5-bit Noise Period value. This 5-bit value consists of the lower 5-bits (B4--B0) of register R6, as illustrated in the following:

'''Noise Period Register'''

{|{{Prettytable|width: 700px; font-size: 2em;}}
|-
|'''B7'''||'''B6'''||'''B5'''||'''B4'''||'''B3'''||'''B2'''||'''B1'''||'''B0'''
|-
|colspan=3|NOT USED||colspan=5|5-bit Noise Period (NP) to Noise Generator
|}

=== Mixer Control Enable (Register R7) ===

Register R7 is multi-function /Enable register which controls the three Noise/Tone Mixers and the two general purpose I/O Ports.

The Mixers, as previously described, combine the noise and tone frequencies for each of the three channels. The determination of combining neither/either/both noise and tone frequencies on each channel is made by the state of bits B5--B0 of R7.

The direction (input or output) of the two general purpose I/O Ports (IOA and IOB) is determined by the state of bits B7 and B6 of R7.

These functions are illustrated in the following:

'''Mixer Control-I/O-Enable Register R7'''

{|{{Prettytable|width: 700px; font-size: 2em;}}
|-
|'''B7'''||'''B6'''||'''B5'''||'''B4'''||'''B3'''||'''B2'''||'''B1'''||'''B0'''
|-
|colspan=2|/Input Enable||colspan=3|/Noise Enable||colspan=3|/Tone Enable
|-
|B||A||C||B||A||C||B||A
|}

=== Amplitude Control (Registers R10,R11,R12) ===

The amplitudes of the signals generated by each of the three D/A Converters (one each for Channels A,B and C) is determined by the contents of the lower 5-bits (B4--B0) of registers R10,R11 and R12 as illustrated in the following:

{|{{Prettytable|width: 700px; font-size: 2em;}}
|'''Amplitude Control Register'''||'''Channel'''
|-
|R10||A
|-
|R11||B
|-
|R12||C
|}

{|{{Prettytable|width: 700px; font-size: 2em;}}
|'''B7'''||'''B6'''||'''B5'''||'''B4'''||'''B3'''||'''B2'''||'''B1'''||'''B0'''
|-
|colspan=3|NOT USED||M||L3||L2||L1||L0
|-
|colspan=3| ||amplitude "mode"||cospan=4|4-bit "fixed" amplitude level
|}

=== Envelope Generator Control (Registers R13,R14 and R15) ===

To acomplish the generation of fairly complex envelope patterns, two independant methods of control are provided in the PSG: first, it is possible to vary the frequency of the envelope using registers R13 and R14; and second, the relative shape and cycle pattern of the envelope can be varied using register R15. The following paragraphis explain the details of the envelope control functions, describing first the envelope period control and then the envelope shape/cycle control.

== ENVELOPE PERIOD CONTROL (Registers R13,R14) ==

The frequency of the envelope is obtained in the PSG by first counting down the input clock by 256, then by furthur counting down the result of the programmed 16-bit Envelope Period value. This 16-bit value is obtained in the PSG by combining the contents of the Envelope Coarse and Fine Tune registers, as illustrated in the following:

{|{{Prettytable|width: 700px; font-size: 2em;}}
|colspan=8|'''Envelope Coarse Tune Register R14'''||colspan=8|'''Envelope Fine Tune Register R13'''
|-
|B7||B6||B5||B4||B3||B2||B1||B0||B7||B6||B5||B4||B3||B2||B1||B0
|-
|EP15||EP14||EP13||EP12||EP11||EP10||EP9||EP8||EP7||EP6||EP5||EP4||EP3||EP2||EP1||EP0
|-
|colspan=16|16-bit Envelope Period (EP) to Envelope Generator
|}

== ENVELOPE SHAPE/CYCLE CONTROL (Register R15) ==

The Envelope Generator furthur counts down the envelope frequency by 16, producing a 16-state per cycle envelope pattern as defined by its 4-bit counter output, E3 E2 E1 E0. The particular shape and cycle pattern of any desired envelope is accomplished by controlling the count pattern (count up/count down) of the 4-bit counter and by defining a single cycle or repeat-cycle pattern.

This envelope shape/cycle control is contained in the 4 bits (B3--B0) of register R15. Each of these 4 bits controls a function in the envelope generator, as illustrated in the following:

== Envelope Shape/Cycle Control Register (R15) ==

{|{{Prettytable|width: 700px; font-size: 2em;}}
|B7||B6||B5||B4||B3||B2||B1||B0
|-
|colspan=4|NOT USED||Hold||Alternate||Attack||Continue
|-
|colspan=4| ||colspan=4|Function (To Envelope Generator)
|}

== I/O Port Data Store (Registers R16, R17) ==

Registers R16 and R17 function as intermediate data storage registers between the PSG/CPU data bus (DA0--DA7) and the two I/O ports (IOA7--IOA0 and IOB7--IOB0). Both ports are available in the AY-3-8910; only I/O port A is available in the AY-3-8912; none are available on the AY-3-8913. Using registers R16 and R17 for the transfer of I/O data has no effect on sound generation.

== D/A Converter Operation ==

Since the primary use of the PSG is to produce sound for the highly imperfect amplitude detection mechanism of the human ear, the D/A conversion is performed in logarithmic steps with a normalized voltage range of from 0 to 1 Volt. The specific amplitude control of each of the three D/A Converters is acomplished by the three sets of 4-bit outputs of the Amplitude Control block, while the Mixer outputs provide the base signal frequency (Noise and/or Tone).

'''Fig 1. ENVELOPE SHAPE/CYCLE OPERATION'''

{|{{Prettytable|width: 700px; font-size: 2em;}}
|colspan=4|R15 Bits||rowspan=3|GRAPHICAL REPRESENTATION OF ENVELOPE GENERATOR OUTPUT (E3 E2 E1 E0)
|-
|B3||B2||B1||B0
|-
|Continue||Attack||Alternate||Hold
|-
|0||0||x||x||[[Image:psg1.gif]]
|-
|0||1||x||x||[[Image:psg3.gif]]
|-
|1||0||0||0||[[Image:psg5.gif]]
|-
|1||0||0||1||[[Image:psg1.gif]]
|-
|1||0||1||0||[[Image:psg8.gif]]
|-
|1||0||1||1||[[Image:psg4.gif]]
|-
|1||1||0||0||[[Image:psg6.gif]]
|-
|1||1||0||1||[[Image:psg2.gif]]
|-
|1||1||1||0||[[Image:psg7.gif]]
|-
|1||1||1||1||[[Image:psg3.gif]]
|-
|colspan=4| ||[[Image:psg15.gif]]
|}

'''Fig 2. DETAIL OF TWO CYCLES Of Fig 1 (ref. waveform "1010" in Fig.1)'''

[[Image:psg9.gif]]

'''Fig 3. D/A CONVERTER OUTPUT'''

'''Fig 4. SINGLE TONE WITH ENVELOPE SHAPE/CYCLE PATTERN 1010'''

'''Fig 5. MIXTURE OF THREE TONES WITH FIXED AMPLITUDE'''

== ELECTRICAL CHARACTERISTICS (AY-3-8910, AY-3-8912) ==

Maximum Ratings*

Storage Temperature ...... -55°C to +150°C

Operating Temperature ...... 0°C to 40°C

Vcc and all other input/Output Voltages with Respect to Vss ...... -0.3V to +8.0V

Exceeding these ratings could cause permanent damage to the device. This is a stress rating only and functional operation of the devices at these conditions is not implied -- operating ranges are specified in Standard Conditions. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Data labelled " typical" is presented for design guidance only and is not guaranteed.

'''Storage Conditions (unless otherwise noted):'''

Vcc = ± 5V ±5%

Vss = GND

Operating Temperature = 0°C to +40°C

{|{{Prettytable|width: 700px; font-size: 2em;}}
|'''Characteristics'''||'''Sym'''||'''Min'''||'''Typ**'''||'''Max'''||'''Units'''||'''Conditions'''
|-
|'''DC CHARACTERISTICS'''
|-
|'''All inputs'''
|-
|Low level||Vil||0||-||0.6||V
|-
|High level||Vih||2.4||-||Vcc||V
|-
|'''All Outputs (except Analog Channel Outputs'''
|-
|Low level||Vol||0||-||0.5||V||Iol = 1.6mA, 20pF
|-
|High level||Voh||2.4||-||Vcc||V||Ioh = 100uA, 20pF
|-
|Analog Channel Outputs||Vo||0||-||60||dB||Test Curcuit: Fig 6
|-
|Power Supply Current||Icc||-||45||85||mA
|-
|'''AC CHARACTERISTICS'''
|-
|'''Clock Input'''||Fig 7.
|-
|Frequency||fc||1||-||2||MHz
|-
|Rise Time||tr||-||-||50||ns
|-
|Fall Time||tf||-||-||50||ns
|-
|Duty Cycle||-||25||50||85||%
|-
|'''Bus Signals (BDIR,BC2,BC1)'''
|-
|Associative Delay Time||tao||-||-||50||ns
|-
|'''Reset'''Fig. 8
|-
|Reset Pulse Width||trw||500||-||-||ns
|-
|Reset to Bus Control Delay Time||trb||100||-||-||ns
|-
|'''A9, A8, DA7--DA0 (Address Mode)'''||Fig 9
|-
|Address Setup Time||tas||400||-||-||ns
|-
|Address Hold Time||tah||100||-||-||ns
|-
|'''DA7--DA0 (Write Mode)'''||Fig. 10
|-
|Write Data Pulse Width||tdw||500||-||10,000||ns
|-
|Write Data Setup Time||tds||50||-||-||ns
|-
|Write Data Hold Time||tdh||100||-||-||ns
|-
|'''DA7--DA0 (Read Mode)'''||Fig. 11
|-
|Read Data Access Time||tda||-||250||500||ns
|-
|'''DA7--DA0 (Inactive Mode)'''
|-
|Tristate Delay Time||tts||-||100||200||ns
|}

** Typical values are at ±25°C and nominal voltages

'''Analogue Channel Output Test Curcuit'''

[[Image:psg11.gif]]

== ELECTRICAL CHARACTERISTICS (AY-3-8913) ==

Maximum Ratings*

Storage Temperature ...... -55°C to +150°C

Operating Temperature ...... 0°C to 70°C

Vcc and all other input/Output Voltages with Respect to Vss ...... -0.3V to +8.0V

* Exceeding these ratings could cause permanent damage to the device. This is a stress rating only and functional operation of the devices at these conditions is not implied -- operating ranges are specified in Standard Conditions. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Data labelled " typical" is presented for design guidance only and is not guaranteed.

'''Storage Conditions (unless otherwise noted):'''

Vcc = ± 5V ±5%

Vss = GND

Operating Temperature = 0°C to +70°C

{|{{Prettytable|width: 700px; font-size: 2em;}}
|'''Characteristics'''||'''Min'''||'''Sym'''||'''Max'''||'''Units'''||'''Conditions'''
|-
|'''DC CHARACTERISTICS'''
|-
|'''All inputs'''
|-
|Low level||Vil||0||0.7||V
|-
|High level||Vih||2.2||Vcc||V
|-
|'''All Outputs (except Analog Channel Outputs'''
|-
|Low level||Vol||0||0.4||V||1||TTL||Load
|-
|High level||Voh||2.4||Vcc||V||+100pf
|-
|'''Analog Channel Outputs'''||Vo||0||2000||uA||Test Curcuit: Fig 6
|-
|'''Power Supply Current'''||Icc||-||85||mA
|-
|'''AC CHARACTERISTICS'''
|-
|'''Clock Input'''||Fig 7.
|-
|Frequency||fc||1||2.5||MHz
|-
|Rise Time||tr||-||50||ns
|-
|Fall Time||tf||-||50||ns
|-
|Duty Cycle||-||40||60||%
|-
|'''Bus Signals (BDIR,BC2,BC1)'''
|-
|Associative Delay Time||tao||-||50||ns
|-
|'''Reset'''||Fig. 8
|-
|Reset Pulse Width||trw||5||-||us
|-
|Reset to Bus Control Delay Time||trb||100||-||ns
|-
|'''A9, A8, DA7--DA0 (Address Mode)'''||Fig 9
|-
|Address Setup Time tas 300 - ns
|-
|Address Hold Time tah 50 - ns
|-
|DA7--DA0 (Write Mode)'''||Fig. 10
|-
|Write Data Pulse Width||tdw||1800||-||ns
|-
|Write Data Setup Time||tds||50||-||ns
|-
|Write Data Hold Time||tdh||100||-||ns
|-
|'''DA7--DA0 (Read Mode)'''||Fig. 11
|-
|Read Data Access Time||tda||-||350||ns
|-
|'''DA7--DA0 (Inactive Mode)'''
|-
|Tristate Delay Time||tts||-||400||ns
|}

'''Fig 7. CLOCK AND BUS SIGNAL TIMING'''

'''Fig 8. RESET TIMING'''

'''Fig 9. LATCH ADDRESS TIMING'''

'''Fig 10. WRITE DATA TIMING'''

'''Fig 11. READ DATA TIMING'''

==Links==

[[AY|AY's page with less specific subjects]]

[[Category:Electronic Component]] [[Category:Datasheet]][[Category:Music and sound|*]][[Category:CPC Internal Components]]

ParaDOS

2010-04-07T00:49:17Z

Executioner: /* Manual */

The ultimate [[DOS]] for 3½" drives, coded by [[Executioner|Richard Wilson]] and initially marketed by [[Quantum Computing]].

ParaDOS was a complete replacement for the standard 16k [[AMSDOS]] ROM.

The first 8k was a patched version of the standard AMSDOS code, with the second 8k used for the large-format patch code and a user-friendly disc utility (accessed by the |DRIVE command without any parameters).

Among the functions of the utility were fast file copying and batch erasing.

ParaDOS largely supplanted [[ROMDOS]] as the OS of choice among CPC users.

Unlike ROMDOS, ParaDOS made no check for the presence of an AMSDOS ROM on sign-on.

This enabled it to be used in ROM 7 as a direct replacement for AMSDOS, improving compatibility with programs which unthinkingly initialised ROM 7 alone.

This, however, also cast some doubts on the propriety of its intellectual property stance.

It is likely that ParaDOS would have been questioned more rigorously had it not been introduced towards the end of the CPC's commercial life.

== Systems Cartridges with Parados ==

* [[Media:English System + Parados.rar|English System + Parados.rar]]
* [[Media:French System + Parados.rar|French System + Parados.rar]]
* [[Media:Spanish System + Parados.rar|Spanish System + Parados.rar]]

== Manual ==

* [[Media:parados.pdf|ParaDOS Manual]] (pdf)
* [[Media:Pdos-ddb.txt|ParaDOS DDB and DPB documentation]] (txt)

== Links ==

From the Winape web of Richard Wilson on the others downloads section you can download :

- ParaDOS ROM
- ParaDOS Source

http://www.winape.net/downloads.jsp

[[category:Operating System]] [[category:Expansion ROM]] [[category:Manual]]

ParaDOS

2010-04-07T00:48:43Z

Executioner: /* Manual */

The ultimate [[DOS]] for 3½" drives, coded by [[Executioner|Richard Wilson]] and initially marketed by [[Quantum Computing]].

ParaDOS was a complete replacement for the standard 16k [[AMSDOS]] ROM.

The first 8k was a patched version of the standard AMSDOS code, with the second 8k used for the large-format patch code and a user-friendly disc utility (accessed by the |DRIVE command without any parameters).

Among the functions of the utility were fast file copying and batch erasing.

ParaDOS largely supplanted [[ROMDOS]] as the OS of choice among CPC users.

Unlike ROMDOS, ParaDOS made no check for the presence of an AMSDOS ROM on sign-on.

This enabled it to be used in ROM 7 as a direct replacement for AMSDOS, improving compatibility with programs which unthinkingly initialised ROM 7 alone.

This, however, also cast some doubts on the propriety of its intellectual property stance.

It is likely that ParaDOS would have been questioned more rigorously had it not been introduced towards the end of the CPC's commercial life.

== Systems Cartridges with Parados ==

* [[Media:English System + Parados.rar|English System + Parados.rar]]
* [[Media:French System + Parados.rar|French System + Parados.rar]]
* [[Media:Spanish System + Parados.rar|Spanish System + Parados.rar]]

== Manual ==

* [[Media:parados.pdf|ParaDOS Manual]] (pdf)
* [[Media:Pdos-ddb.txt|ParaDOS DDB and DPB documentation]]

== Links ==

From the Winape web of Richard Wilson on the others downloads section you can download :

- ParaDOS ROM
- ParaDOS Source

http://www.winape.net/downloads.jsp

[[category:Operating System]] [[category:Expansion ROM]] [[category:Manual]]

ParaDOS

2010-04-07T00:48:02Z

Executioner: /* Manual */

The ultimate [[DOS]] for 3½" drives, coded by [[Executioner|Richard Wilson]] and initially marketed by [[Quantum Computing]].

ParaDOS was a complete replacement for the standard 16k [[AMSDOS]] ROM.

The first 8k was a patched version of the standard AMSDOS code, with the second 8k used for the large-format patch code and a user-friendly disc utility (accessed by the |DRIVE command without any parameters).

Among the functions of the utility were fast file copying and batch erasing.

ParaDOS largely supplanted [[ROMDOS]] as the OS of choice among CPC users.

Unlike ROMDOS, ParaDOS made no check for the presence of an AMSDOS ROM on sign-on.

This enabled it to be used in ROM 7 as a direct replacement for AMSDOS, improving compatibility with programs which unthinkingly initialised ROM 7 alone.

This, however, also cast some doubts on the propriety of its intellectual property stance.

It is likely that ParaDOS would have been questioned more rigorously had it not been introduced towards the end of the CPC's commercial life.

== Systems Cartridges with Parados ==

* [[Media:English System + Parados.rar|English System + Parados.rar]]
* [[Media:French System + Parados.rar|French System + Parados.rar]]
* [[Media:Spanish System + Parados.rar|Spanish System + Parados.rar]]

== Manual ==

* [[Media:parados.pdf|ParaDOS Manual]] (pdf)
* [[File:Pdos-ddb.txt|ParaDOS DDB and DPB documentation]]

== Links ==

From the Winape web of Richard Wilson on the others downloads section you can download :

- ParaDOS ROM
- ParaDOS Source

http://www.winape.net/downloads.jsp

[[category:Operating System]] [[category:Expansion ROM]] [[category:Manual]]

File:Pdos-ddb.txt

2010-04-07T00:46:15Z

Executioner: Information on ParaDOS Drive Definition and Drive Parameter bytes.

Information on ParaDOS Drive Definition and Drive Parameter bytes.

List of file formats

2009-09-28T00:50:06Z

Executioner: /* CPC file extensions */

== CPC file extensions ==

{| class="FCK__ShowTableBorders"
|-
| ''Extension''
| ''Explanations''
| ''Programs that use this extenstion''
|-
| $$$
| Temporary Amsdos file
| [[Amsdos|amsdos]]
|-
| 128
| Soundtrakker 128KB music file
| [[Soundtrakker|Soundtrakker]]
|-
| 64K
| FutureOS Main-memory program
| [[FutureOS|FutureOS]]
|-
| ACE
| Packed Windows archive
| [[ACE|ACE]]
|-
| ARC
| Xexor ARC File format
| [[Format:Xexor_ARC_file_format|Xexor ARC Format]]
|-
| ASC
| ASCII text
|
|-
| ASM
| Assembler source code
| ASM.COM
|-
| AYC
| Derivate or converted YM music file
|
|-
| BAK
| Backup file
|
|-
| BAS
| Basic program
| [[AMSDOS|AMSDOS]]
|-
| BAT
| Batch-File
|
|-
| BIN
| binary file[[AMSDOS|]]
| [[AMSDOS|AMSDOS]]
|-
| CCP
| Key definition for CP/M Plus
| [[CP/M 3.0|CP/M 3.0]]
|-
| COM
| Executable CP/M or [[SymbOS|SymbOS]]-SymShell program
| [[CP/M|CP/M]], [[SymShell|SymShell]]
|-
| CUT
| AMX Pagemaker Clipart
| [[AMX Pagemaker|AMX Pagemaker]]
|-
| DD
| Device driver for GSX (CP/M Plus)
| [[CP/M 3.0|CP/M 3.0]]
|-
| DSK
| Disc image
| DSK-CPC
|-
| DEU
| DEU German text
|
|-
| ENG
| English text
|
|-
| EXE
| EXE Executable file, SymbOS
| [[SymbOS|SymbOS]]
|-
| FLD
| Map file of a game
| [[GSEd|GSEd]]
|-
| FNT
| Font of AMX Pagemaker
| [[AMX Pagemaker|AMX Pagemaker]]
|-
| FRA
| French text
|
|-
| GES
| Set of Graphic-elements
| [[GSEd|GSEd]]
|-
| H
| C variable definitions
| Small C i.e.
|-
| HED
| Header/Icon definition for FutureOS
| [[FutureOS|FutureOS]]
|-
| HGB
| FutureOS Background Picture
| [[FutureOS|FutureOS]]
|-
| HLP
| Help file
| CP/M and others
|-
| INF
| AMX Pagemaker site
| [[AMX Pagemaker|AMX Pagemaker]]
|-
| INS
| Soundtrakker Instrument file
| [[Soundtrakker|Soundtrakker]]
|-
| MAC
| Makroassembler source code
| MAC.COM
|-
| MAX
| Maxam Source Code
| [[Maxam|Maxam]]
|-
| MDL
| Digitracker Module
| [[Digitracker|Digitracker]]
|-
| MOD
| Crown Protracker Module or Amiga MO$D File
|
|-
| MP3
| MP3 Sound file
| [[FuturePlayer|FuturePlayer]], [[SymbOS|SymbOS]](?)
|-
| OBJ
| Object Code
|
|-
| OVL
| Overlay parts of WordStar o.e.
|
|-
| PA1
| AMX Pagemaker site (Teil 1)
| [[AMX Pagemaker|AMX Pagemaker]]
|-
| PA2
| AMX Pagemaker site (Teil 2)
| [[AMX Pagemaker|AMX Pagemaker]]
|-
| PA3
| AMX Pagemaker site (Teil 3)
| [[AMX Pagemaker|AMX Pagemaker]]
|-
| PA4
| AMX Pagemaker site (Teil 4)
| [[AMX Pagemaker|AMX Pagemaker]]
|-
| PAL
| OCP Art Studio Palette
| [[The OCP Art Studio|The OCP Art Studio]]
|-
| PAS
| (Turbo-)Pascal source code
| Turbo Pascal
|-
| PRV
| AMX Pagemaker site (Preview)
| AMX Pagemaker
|-
| PRL
| page relocatable file
|
|-
| RAR
| Packed Windows Archive
|
|-
| ROM
| Rom-File (16K)
| diff. (Pseudo-)/(EP)ROM Manager
|-
| PT3
| Spectrum Protracker 3 Music
| [[SymAmp|SymAmp]]
|-
| SAV
| SymbOS screen saver
| [[SymbOS|SymbOS]]
|-
| SCR
| OCP Art Studio Screen
| [[The OCP Art Studio|The OCP Art Studio]]
|-
| SGX
| SymbOS graphic
| [[SymbOS|SymbOS]]
|-
| SKM
| compilated [[Starkos|Starkos]] Module
| [[SymAmp|SymAmp]]
|-
| SKR
| Set of Scripts
|
|-
| SKS
| STarKos Module
| [[STarKos|STarKos]]
|-
| SMC
| Executable C Program for FutureOS
| [[FutureOS|FutureOS]]
|-
| SNA
| Emulator Snapshot 64/128KB
|
|-
| SND
| Soundtrakker 64KB Music
| [[Soundtrakker|Soundtrakker]]
|-
| SPR
| Set of Sprites
|
|-
| ST2
| Compilated [[Soundtrakker|Soundtrakker]] 128 Module
| [[SymAmp|SymAmp]]
|-
| SUB
| Submit/Batch file (CP/M)
| [[CP/M|CP/M]]
|-
| TAP
| Emulator tape image
|
|-
| TXT
| ASCII text
|
|-
| VID
| [[SymbOS|SymbOS]] video
| [[SymPlay|SymPlay]]
|-
| WIN
| OCP Art Studio Clip
| [[The OCP Art Studio|The OCP Art Studio]]
|-
| WP
| Key definition for WordStar
| [[WordStar|WordStar]]
|-
| X16
| FutureOS Expansion RAM program
| [[FutureOS|FutureOS]]
|-
| YM
| YM Music file
| YM-Player and others
|}

List of file formats

2009-09-28T00:49:19Z

Executioner: /* CPC file extensions */

== CPC file extensions ==

{| class="FCK__ShowTableBorders"
|-
| ''Extension''
| ''Explanations''
| ''Programs that use this extenstion''
|-
| $$$
| Temporary Amsdos file
| [[Amsdos|amsdos]]
|-
| 128
| Soundtrakker 128KB music file
| [[Soundtrakker|Soundtrakker]]
|-
| 64K
| FutureOS Main-memory program
| [[FutureOS|FutureOS]]
|-
| ACE
| Packed Windows archive
| [[ACE|ACE]]
|-
| ARC
| Xexor ARC File format
| [[Format:Xexor ARC File Format|Xexor ARC Format]]
|-
| ASC
| ASCII text
|
|-
| ASM
| Assembler source code
| ASM.COM
|-
| AYC
| Derivate or converted YM music file
|
|-
| BAK
| Backup file
|
|-
| BAS
| Basic program
| [[AMSDOS|AMSDOS]]
|-
| BAT
| Batch-File
|
|-
| BIN
| binary file[[AMSDOS|]]
| [[AMSDOS|AMSDOS]]
|-
| CCP
| Key definition for CP/M Plus
| [[CP/M 3.0|CP/M 3.0]]
|-
| COM
| Executable CP/M or [[SymbOS|SymbOS]]-SymShell program
| [[CP/M|CP/M]], [[SymShell|SymShell]]
|-
| CUT
| AMX Pagemaker Clipart
| [[AMX Pagemaker|AMX Pagemaker]]
|-
| DD
| Device driver for GSX (CP/M Plus)
| [[CP/M 3.0|CP/M 3.0]]
|-
| DSK
| Disc image
| DSK-CPC
|-
| DEU
| DEU German text
|
|-
| ENG
| English text
|
|-
| EXE
| EXE Executable file, SymbOS
| [[SymbOS|SymbOS]]
|-
| FLD
| Map file of a game
| [[GSEd|GSEd]]
|-
| FNT
| Font of AMX Pagemaker
| [[AMX Pagemaker|AMX Pagemaker]]
|-
| FRA
| French text
|
|-
| GES
| Set of Graphic-elements
| [[GSEd|GSEd]]
|-
| H
| C variable definitions
| Small C i.e.
|-
| HED
| Header/Icon definition for FutureOS
| [[FutureOS|FutureOS]]
|-
| HGB
| FutureOS Background Picture
| [[FutureOS|FutureOS]]
|-
| HLP
| Help file
| CP/M and others
|-
| INF
| AMX Pagemaker site
| [[AMX Pagemaker|AMX Pagemaker]]
|-
| INS
| Soundtrakker Instrument file
| [[Soundtrakker|Soundtrakker]]
|-
| MAC
| Makroassembler source code
| MAC.COM
|-
| MAX
| Maxam Source Code
| [[Maxam|Maxam]]
|-
| MDL
| Digitracker Module
| [[Digitracker|Digitracker]]
|-
| MOD
| Crown Protracker Module or Amiga MO$D File
|
|-
| MP3
| MP3 Sound file
| [[FuturePlayer|FuturePlayer]], [[SymbOS|SymbOS]](?)
|-
| OBJ
| Object Code
|
|-
| OVL
| Overlay parts of WordStar o.e.
|
|-
| PA1
| AMX Pagemaker site (Teil 1)
| [[AMX Pagemaker|AMX Pagemaker]]
|-
| PA2
| AMX Pagemaker site (Teil 2)
| [[AMX Pagemaker|AMX Pagemaker]]
|-
| PA3
| AMX Pagemaker site (Teil 3)
| [[AMX Pagemaker|AMX Pagemaker]]
|-
| PA4
| AMX Pagemaker site (Teil 4)
| [[AMX Pagemaker|AMX Pagemaker]]
|-
| PAL
| OCP Art Studio Palette
| [[The OCP Art Studio|The OCP Art Studio]]
|-
| PAS
| (Turbo-)Pascal source code
| Turbo Pascal
|-
| PRV
| AMX Pagemaker site (Preview)
| AMX Pagemaker
|-
| PRL
| page relocatable file
|
|-
| RAR
| Packed Windows Archive
|
|-
| ROM
| Rom-File (16K)
| diff. (Pseudo-)/(EP)ROM Manager
|-
| PT3
| Spectrum Protracker 3 Music
| [[SymAmp|SymAmp]]
|-
| SAV
| SymbOS screen saver
| [[SymbOS|SymbOS]]
|-
| SCR
| OCP Art Studio Screen
| [[The OCP Art Studio|The OCP Art Studio]]
|-
| SGX
| SymbOS graphic
| [[SymbOS|SymbOS]]
|-
| SKM
| compilated [[Starkos|Starkos]] Module
| [[SymAmp|SymAmp]]
|-
| SKR
| Set of Scripts
|
|-
| SKS
| STarKos Module
| [[STarKos|STarKos]]
|-
| SMC
| Executable C Program for FutureOS
| [[FutureOS|FutureOS]]
|-
| SNA
| Emulator Snapshot 64/128KB
|
|-
| SND
| Soundtrakker 64KB Music
| [[Soundtrakker|Soundtrakker]]
|-
| SPR
| Set of Sprites
|
|-
| ST2
| Compilated [[Soundtrakker|Soundtrakker]] 128 Module
| [[SymAmp|SymAmp]]
|-
| SUB
| Submit/Batch file (CP/M)
| [[CP/M|CP/M]]
|-
| TAP
| Emulator tape image
|
|-
| TXT
| ASCII text
|
|-
| VID
| [[SymbOS|SymbOS]] video
| [[SymPlay|SymPlay]]
|-
| WIN
| OCP Art Studio Clip
| [[The OCP Art Studio|The OCP Art Studio]]
|-
| WP
| Key definition for WordStar
| [[WordStar|WordStar]]
|-
| X16
| FutureOS Expansion RAM program
| [[FutureOS|FutureOS]]
|-
| YM
| YM Music file
| YM-Player and others
|}

List of file formats

2009-09-28T00:48:48Z

Executioner: /* CPC file extensions */

== CPC file extensions ==

{| class="FCK__ShowTableBorders"
|-
| ''Extension''
| ''Explanations''
| ''Programs that use this extenstion''
|-
| $$$
| Temporary Amsdos file
| [[Amsdos|amsdos]]
|-
| 128
| Soundtrakker 128KB music file
| [[Soundtrakker|Soundtrakker]]
|-
| 64K
| FutureOS Main-memory program
| [[FutureOS|FutureOS]]
|-
| ACE
| Packed Windows archive
| [[ACE|ACE]]
|-
| ARC
| Xexor ARC File format
| [[ARC|Format:Xexor ARC File Format]]
|-
| ASC
| ASCII text
|
|-
| ASM
| Assembler source code
| ASM.COM
|-
| AYC
| Derivate or converted YM music file
|
|-
| BAK
| Backup file
|
|-
| BAS
| Basic program
| [[AMSDOS|AMSDOS]]
|-
| BAT
| Batch-File
|
|-
| BIN
| binary file[[AMSDOS|]]
| [[AMSDOS|AMSDOS]]
|-
| CCP
| Key definition for CP/M Plus
| [[CP/M 3.0|CP/M 3.0]]
|-
| COM
| Executable CP/M or [[SymbOS|SymbOS]]-SymShell program
| [[CP/M|CP/M]], [[SymShell|SymShell]]
|-
| CUT
| AMX Pagemaker Clipart
| [[AMX Pagemaker|AMX Pagemaker]]
|-
| DD
| Device driver for GSX (CP/M Plus)
| [[CP/M 3.0|CP/M 3.0]]
|-
| DSK
| Disc image
| DSK-CPC
|-
| DEU
| DEU German text
|
|-
| ENG
| English text
|
|-
| EXE
| EXE Executable file, SymbOS
| [[SymbOS|SymbOS]]
|-
| FLD
| Map file of a game
| [[GSEd|GSEd]]
|-
| FNT
| Font of AMX Pagemaker
| [[AMX Pagemaker|AMX Pagemaker]]
|-
| FRA
| French text
|
|-
| GES
| Set of Graphic-elements
| [[GSEd|GSEd]]
|-
| H
| C variable definitions
| Small C i.e.
|-
| HED
| Header/Icon definition for FutureOS
| [[FutureOS|FutureOS]]
|-
| HGB
| FutureOS Background Picture
| [[FutureOS|FutureOS]]
|-
| HLP
| Help file
| CP/M and others
|-
| INF
| AMX Pagemaker site
| [[AMX Pagemaker|AMX Pagemaker]]
|-
| INS
| Soundtrakker Instrument file
| [[Soundtrakker|Soundtrakker]]
|-
| MAC
| Makroassembler source code
| MAC.COM
|-
| MAX
| Maxam Source Code
| [[Maxam|Maxam]]
|-
| MDL
| Digitracker Module
| [[Digitracker|Digitracker]]
|-
| MOD
| Crown Protracker Module or Amiga MO$D File
|
|-
| MP3
| MP3 Sound file
| [[FuturePlayer|FuturePlayer]], [[SymbOS|SymbOS]](?)
|-
| OBJ
| Object Code
|
|-
| OVL
| Overlay parts of WordStar o.e.
|
|-
| PA1
| AMX Pagemaker site (Teil 1)
| [[AMX Pagemaker|AMX Pagemaker]]
|-
| PA2
| AMX Pagemaker site (Teil 2)
| [[AMX Pagemaker|AMX Pagemaker]]
|-
| PA3
| AMX Pagemaker site (Teil 3)
| [[AMX Pagemaker|AMX Pagemaker]]
|-
| PA4
| AMX Pagemaker site (Teil 4)
| [[AMX Pagemaker|AMX Pagemaker]]
|-
| PAL
| OCP Art Studio Palette
| [[The OCP Art Studio|The OCP Art Studio]]
|-
| PAS
| (Turbo-)Pascal source code
| Turbo Pascal
|-
| PRV
| AMX Pagemaker site (Preview)
| AMX Pagemaker
|-
| PRL
| page relocatable file
|
|-
| RAR
| Packed Windows Archive
|
|-
| ROM
| Rom-File (16K)
| diff. (Pseudo-)/(EP)ROM Manager
|-
| PT3
| Spectrum Protracker 3 Music
| [[SymAmp|SymAmp]]
|-
| SAV
| SymbOS screen saver
| [[SymbOS|SymbOS]]
|-
| SCR
| OCP Art Studio Screen
| [[The OCP Art Studio|The OCP Art Studio]]
|-
| SGX
| SymbOS graphic
| [[SymbOS|SymbOS]]
|-
| SKM
| compilated [[Starkos|Starkos]] Module
| [[SymAmp|SymAmp]]
|-
| SKR
| Set of Scripts
|
|-
| SKS
| STarKos Module
| [[STarKos|STarKos]]
|-
| SMC
| Executable C Program for FutureOS
| [[FutureOS|FutureOS]]
|-
| SNA
| Emulator Snapshot 64/128KB
|
|-
| SND
| Soundtrakker 64KB Music
| [[Soundtrakker|Soundtrakker]]
|-
| SPR
| Set of Sprites
|
|-
| ST2
| Compilated [[Soundtrakker|Soundtrakker]] 128 Module
| [[SymAmp|SymAmp]]
|-
| SUB
| Submit/Batch file (CP/M)
| [[CP/M|CP/M]]
|-
| TAP
| Emulator tape image
|
|-
| TXT
| ASCII text
|
|-
| VID
| [[SymbOS|SymbOS]] video
| [[SymPlay|SymPlay]]
|-
| WIN
| OCP Art Studio Clip
| [[The OCP Art Studio|The OCP Art Studio]]
|-
| WP
| Key definition for WordStar
| [[WordStar|WordStar]]
|-
| X16
| FutureOS Expansion RAM program
| [[FutureOS|FutureOS]]
|-
| YM
| YM Music file
| YM-Player and others
|}

Format:Xexor ARC file format

2009-09-28T00:43:10Z

Executioner: /* Structure of the "ARC" file */

<div style="border: 1px solid rgb(228, 222, 222); margin: 0px 0px 5px; padding: 0.5em 1em; background-color: rgb(249, 249, 249);"><center>'''''This article originally came from Kevin Thackers' archive at [http://www.cpctech.org.uk http://www.cpctech.org.uk].'''''</center></div>

= The Xexor ARC file format =

Xexor is a powerful disc utility written by Richard Wilson for the Amstrad CPC/CPC+.

This document describes the structure of the "ARC" file written by the "ARCHIVE" command of this utility program and his Winape emulator.

The syntax of the archive command is:

<nowiki>|ARCHIVE <filename> <track range> </nowiki>

An example of it's usage is:

<nowiki>|ARCHIVE "disc.arc" 1-13</nowiki>

This will create a file called "disc.arc" which will contain the data from tracks 1 to 13 inclusive.

== Structure of the "ARC" file ==

The "ARC" file is a binary file and will have an AMSDOS header.

In addition, "ARC" files written by the Winape emulator have a different header.

If you are reading an "ARC" file into an emulator be aware that there may be an AMSDOS header, and that the file may have been created by Winape.

The ARC file data starts with a header which describes the start and end range of tracks stored in the file:

ARC files written by Winape have the following header:

{| border="1"
|-
! Length
! Description
|-
| 2
| 'XA' identifier
|-
| 1
| Drive Definition Byte
|-
| 1
| First track
|-
| 1
| Last track
|}

The drive definition byte is as follows:

{| border="1"
|-
! Bit
! Description
|-
| 3
| Double-stepped if set
|-
| 2
| Head when not double-sided
|-
| 1
| Unused
|-
| 0
| Double-sided when set
|}

If the image is double-sided, alternate heads are stored for each cylinder.

ARC files written by older versions of Xexor have the following header (ie. XA and DDB missing):

{| border="1"
|-
! Length
! Description
|-
| 1
| First track
|-
| 1
| Last track
|}

Following this is the data for each track, starting with the first track, in ascending numeric order. All tracks between the first track and last track are stored in the file. No tracks may be omitted.

The length of data for each track varies and is dependant on the number of sectors in the track. Each track has the same header layout which gives the number of tracks, and the IDs of these sectors.

The data for each sector is stored in the order given by the sector IDs.

i.e. if there are 9 sectors per track and the sector IDS are listed as &C1,&C2,&C3, &C4,&C5,&C6,&C7,&C8 and &C9, then the data for sector &C1 will be first, and this will be followed by the data for sector &C2 and so on until sector &C9.

The data for each sector is compressed seperatly using a run-length encoding method.

Track data:

{| border="1"
|-
! Length
! Description
|-
| 1
| Number of sectors
|-
| 4*Number of sectors
| Sector ID information (see below)
|-
|  ?
| Sector data (see below)
|}

Sector ID information:

{| border="1"
|-
! Length
! Description
|-
| 1
| C from ID field
|-
| 1
| H from ID field
|-
| 1
| R from ID field
|-
| 1
| N from ID field
|}

Sector data:

{| border="1"
|-
! Length
! Description
|-
| 2
| Sector Size and Flags
|-
| ?
| Compressed sector data
|}

The Sector Size and Flags are stored as a word (LSB first), containing the stored data length (when not empty), compression flag, and deleted data address mark.

The top 3 bits of the Size are flags, with the bottom 13 bits containing the size of the stored data (when not empty).

A sector which does not have a deleted data address mark and contains only E5 bytes is considered empty. In this case, the top 3 bits will be 100 and the size is ignored. WinAPE stores this as #8009, but it could be any value from #0000 to #1FFF or #8000 to #9FFF.

For all other sectors:

{| border="1"
|-
! Bit
! Description
|-
| 15
| RLE compressed if set (see below)
|-
| 14
| Sector has Deleted Data Address Mark if set (DDAM)
|-
| 13
| Sector data is present if set (not empty)
|}

Sector data is also assumed to be present if bit 14 is set, regardless of bit 13.

== Compression scheme ==

The compression method is "run length encoding".

"run length encoding" is a simple compression algorithm which can compress sequences of the same repeated byte.

The compressed will contain single data bytes and run-length packets.

A "marker" byte of &E5 is used to identify a run-length packet. (&E5 is the byte used to fill empty sectors when a disc is formatted to the standard SYSTEM, DATA and IBM formats).

Run-length packets:

{| border="1"
|-
! Byte sequence
! Result
|-
| &E5,&00
| Output a single &E5 byte
|-
| &E5,<count>,<data>
| Output the byte <data> <count> times. e.g. &E5,&03,&25 -> &25,&25,&25
|-
| <value>
| <value> must not be &E5. Output <value> once
|}

Format:Xexor ARC file format

2009-09-28T00:42:11Z

Executioner: /* Structure of the "ARC" file */ Added Drive Definition Byte information

<div style="border: 1px solid rgb(228, 222, 222); margin: 0px 0px 5px; padding: 0.5em 1em; background-color: rgb(249, 249, 249);"><center>'''''This article originally came from Kevin Thackers' archive at [http://www.cpctech.org.uk http://www.cpctech.org.uk].'''''</center></div>

= The Xexor ARC file format =

Xexor is a powerful disc utility written by Richard Wilson for the Amstrad CPC/CPC+.

This document describes the structure of the "ARC" file written by the "ARCHIVE" command of this utility program and his Winape emulator.

The syntax of the archive command is:

<nowiki>|ARCHIVE <filename> <track range> </nowiki>

An example of it's usage is:

<nowiki>|ARCHIVE "disc.arc" 1-13</nowiki>

This will create a file called "disc.arc" which will contain the data from tracks 1 to 13 inclusive.

== Structure of the "ARC" file ==

The "ARC" file is a binary file and will have an AMSDOS header.

In addition, "ARC" files written by the Winape emulator have a different header.

If you are reading an "ARC" file into an emulator be aware that there may be an AMSDOS header, and that the file may have been created by Winape.

The ARC file data starts with a header which describes the start and end range of tracks stored in the file:

ARC files written by Winape have the following header:

{| border="1"
|-
! Length
! Description
|-
| 2
| 'XA' identifier
|-
| 1
| Drive Definition Byte
|-
| 1
| First track
|-
| 1
| Last track
|}

The drive definition byte is as follows:

{| border="1"
|-
! Bit
! Description
|-
| 3
| Double-stepped if set
|-
| 2
| Head when not double-sided
|-
| 1
| Unused
|-
| 0
| Double-sided when set
|}

If the image is double-sided, alternate heads are stored for each cylinder.

ARC files written by older versions of Xexor have the following header (ie. XA missing):

{| border="1"
|-
! Length
! Description
|-
| 1
| First track
|-
| 1
| Last track
|}

Following this is the data for each track, starting with the first track, in ascending numeric order. All tracks between the first track and last track are stored in the file. No tracks may be omitted.

The length of data for each track varies and is dependant on the number of sectors in the track. Each track has the same header layout which gives the number of tracks, and the IDs of these sectors.

The data for each sector is stored in the order given by the sector IDs.

i.e. if there are 9 sectors per track and the sector IDS are listed as &C1,&C2,&C3, &C4,&C5,&C6,&C7,&C8 and &C9, then the data for sector &C1 will be first, and this will be followed by the data for sector &C2 and so on until sector &C9.

The data for each sector is compressed seperatly using a run-length encoding method.

Track data:

{| border="1"
|-
! Length
! Description
|-
| 1
| Number of sectors
|-
| 4*Number of sectors
| Sector ID information (see below)
|-
|  ?
| Sector data (see below)
|}

Sector ID information:

{| border="1"
|-
! Length
! Description
|-
| 1
| C from ID field
|-
| 1
| H from ID field
|-
| 1
| R from ID field
|-
| 1
| N from ID field
|}

Sector data:

{| border="1"
|-
! Length
! Description
|-
| 2
| Sector Size and Flags
|-
| ?
| Compressed sector data
|}

The Sector Size and Flags are stored as a word (LSB first), containing the stored data length (when not empty), compression flag, and deleted data address mark.

The top 3 bits of the Size are flags, with the bottom 13 bits containing the size of the stored data (when not empty).

A sector which does not have a deleted data address mark and contains only E5 bytes is considered empty. In this case, the top 3 bits will be 100 and the size is ignored. WinAPE stores this as #8009, but it could be any value from #0000 to #1FFF or #8000 to #9FFF.

For all other sectors:

{| border="1"
|-
! Bit
! Description
|-
| 15
| RLE compressed if set (see below)
|-
| 14
| Sector has Deleted Data Address Mark if set (DDAM)
|-
| 13
| Sector data is present if set (not empty)
|}

Sector data is also assumed to be present if bit 14 is set, regardless of bit 13.

== Compression scheme ==

The compression method is "run length encoding".

"run length encoding" is a simple compression algorithm which can compress sequences of the same repeated byte.

The compressed will contain single data bytes and run-length packets.

A "marker" byte of &E5 is used to identify a run-length packet. (&E5 is the byte used to fill empty sectors when a disc is formatted to the standard SYSTEM, DATA and IBM formats).

Run-length packets:

{| border="1"
|-
! Byte sequence
! Result
|-
| &E5,&00
| Output a single &E5 byte
|-
| &E5,<count>,<data>
| Output the byte <data> <count> times. e.g. &E5,&03,&25 -> &25,&25,&25
|-
| <value>
| <value> must not be &E5. Output <value> once
|}

Format:Xexor ARC file format

2009-09-28T00:33:27Z

Executioner: /* Structure of the "ARC" file */

<div style="border: 1px solid rgb(228, 222, 222); margin: 0px 0px 5px; padding: 0.5em 1em; background-color: rgb(249, 249, 249);"><center>'''''This article originally came from Kevin Thackers' archive at [http://www.cpctech.org.uk http://www.cpctech.org.uk].'''''</center></div>

= The Xexor ARC file format =

Xexor is a powerful disc utility written by Richard Wilson for the Amstrad CPC/CPC+.

This document describes the structure of the "ARC" file written by the "ARCHIVE" command of this utility program and his Winape emulator.

The syntax of the archive command is:

<nowiki>|ARCHIVE <filename> <track range> </nowiki>

An example of it's usage is:

<nowiki>|ARCHIVE "disc.arc" 1-13</nowiki>

This will create a file called "disc.arc" which will contain the data from tracks 1 to 13 inclusive.

== Structure of the "ARC" file ==

The "ARC" file is a binary file and will have an AMSDOS header.

In addition, "ARC" files written by the Winape emulator have a different header.

If you are reading an "ARC" file into an emulator be aware that there may be an AMSDOS header, and that the file may have been created by Winape.

The ARC file data starts with a header which describes the start and end range of tracks stored in the file:

ARC files written by Winape have the following header:

{| border="1"
|-
! Length
! Description
|-
| 2
| 'XA' identifier
|-
| 1
| 0
|-
| 1
| First track
|-
| 1
| Last track
|}

ARC files written by Xexor have the following header:

{| border="1"
|-
! Length
! Description
|-
| 1
| First track
|-
| 1
| Last track
|}

Following this is the data for each track, starting with the first track, in ascending numeric order. All tracks between the first track and last track are stored in the file. No tracks may be omitted.

The length of data for each track varies and is dependant on the number of sectors in the track. Each track has the same header layout which gives the number of tracks, and the IDs of these sectors.

The data for each sector is stored in the order given by the sector IDs.

i.e. if there are 9 sectors per track and the sector IDS are listed as &C1,&C2,&C3, &C4,&C5,&C6,&C7,&C8 and &C9, then the data for sector &C1 will be first, and this will be followed by the data for sector &C2 and so on until sector &C9.

The data for each sector is compressed seperatly using a run-length encoding method.

Track data:

{| border="1"
|-
! Length
! Description
|-
| 1
| Number of sectors
|-
| 4*Number of sectors
| Sector ID information (see below)
|-
|  ?
| Sector data (see below)
|}

Sector ID information:

{| border="1"
|-
! Length
! Description
|-
| 1
| C from ID field
|-
| 1
| H from ID field
|-
| 1
| R from ID field
|-
| 1
| N from ID field
|}

Sector data:

{| border="1"
|-
! Length
! Description
|-
| 2
| Sector Size and Flags
|-
| ?
| Compressed sector data
|}

The Sector Size and Flags are stored as a word (LSB first), containing the stored data length (when not empty), compression flag, and deleted data address mark.

The top 3 bits of the Size are flags, with the bottom 13 bits containing the size of the stored data (when not empty).

A sector which does not have a deleted data address mark and contains only E5 bytes is considered empty. In this case, the top 3 bits will be 100 and the size is ignored. WinAPE stores this as #8009, but it could be any value from #0000 to #1FFF or #8000 to #9FFF.

For all other sectors:

{| border="1"
|-
! Bit
! Description
|-
| 15
| RLE compressed if set (see below)
|-
| 14
| Sector has Deleted Data Address Mark if set (DDAM)
|-
| 13
| Sector data is present if set (not empty)
|}

Sector data is also assumed to be present if bit 14 is set, regardless of bit 13.

== Compression scheme ==

The compression method is "run length encoding".

"run length encoding" is a simple compression algorithm which can compress sequences of the same repeated byte.

The compressed will contain single data bytes and run-length packets.

A "marker" byte of &E5 is used to identify a run-length packet. (&E5 is the byte used to fill empty sectors when a disc is formatted to the standard SYSTEM, DATA and IBM formats).

Run-length packets:

{| border="1"
|-
! Byte sequence
! Result
|-
| &E5,&00
| Output a single &E5 byte
|-
| &E5,<count>,<data>
| Output the byte <data> <count> times. e.g. &E5,&03,&25 -> &25,&25,&25
|-
| <value>
| <value> must not be &E5. Output <value> once
|}

Format:Xexor ARC file format

2009-09-28T00:32:17Z

Executioner: /* Structure of the "ARC" file */ Clarified Sector Size and Flags

<div style="border: 1px solid rgb(228, 222, 222); margin: 0px 0px 5px; padding: 0.5em 1em; background-color: rgb(249, 249, 249);"><center>'''''This article originally came from Kevin Thackers' archive at [http://www.cpctech.org.uk http://www.cpctech.org.uk].'''''</center></div>

= The Xexor ARC file format =

Xexor is a powerful disc utility written by Richard Wilson for the Amstrad CPC/CPC+.

This document describes the structure of the "ARC" file written by the "ARCHIVE" command of this utility program and his Winape emulator.

The syntax of the archive command is:

<nowiki>|ARCHIVE <filename> <track range> </nowiki>

An example of it's usage is:

<nowiki>|ARCHIVE "disc.arc" 1-13</nowiki>

This will create a file called "disc.arc" which will contain the data from tracks 1 to 13 inclusive.

== Structure of the "ARC" file ==

The "ARC" file is a binary file and will have an AMSDOS header.

In addition, "ARC" files written by the Winape emulator have a different header.

If you are reading an "ARC" file into an emulator be aware that there may be an AMSDOS header, and that the file may have been created by Winape.

The ARC file data starts with a header which describes the start and end range of tracks stored in the file:

ARC files written by Winape have the following header:

{| border="1"
|-
! Length
! Description
|-
| 2
| 'XA' identifier
|-
| 1
| 0
|-
| 1
| First track
|-
| 1
| Last track
|}

ARC files written by Xexor have the following header:

{| border="1"
|-
! Length
! Description
|-
| 1
| First track
|-
| 1
| Last track
|}

Following this is the data for each track, starting with the first track, in ascending numeric order. All tracks between the first track and last track are stored in the file. No tracks may be omitted.

The length of data for each track varies and is dependant on the number of sectors in the track. Each track has the same header layout which gives the number of tracks, and the IDs of these sectors.

The data for each sector is stored in the order given by the sector IDs.

i.e. if there are 9 sectors per track and the sector IDS are listed as &C1,&C2,&C3, &C4,&C5,&C6,&C7,&C8 and &C9, then the data for sector &C1 will be first, and this will be followed by the data for sector &C2 and so on until sector &C9.

The data for each sector is compressed seperatly using a run-length encoding method.

Track data:

{| border="1"
|-
! Length
! Description
|-
| 1
| Number of sectors
|-
| 4*Number of sectors
| Sector ID information (see below)
|-
|  ?
| Sector data (see below)
|}

Sector ID information:

{| border="1"
|-
! Length
! Description
|-
| 1
| C from ID field
|-
| 1
| H from ID field
|-
| 1
| R from ID field
|-
| 1
| N from ID field
|}

Sector data:

{| border="1"
|-
! Length
! Description
|-
| 2
| Sector Size and Flags
|-
| ?
| Compressed sector data
|}

The Sector Size and Flags are stored as a word (LSB first), containing the stored data length (when not empty), compression flag, and deleted data address mark.

The top 3 bits of the Size are flags, with the bottom 13 bits containing the size of the stored data (when not empty).

A sector which does not have a deleted data address mark and contains only E5 bytes is considered empty. In this case, the top 3 bits will be 100 and the size is ignored. WinAPE stores this as #8009, but it could be any value from #0000 to #1FFF or #8000 to #9FFF.

For all other sectors:

{| border="1"
|-
! Bit
! Description
|-
| 15
| RLE compressed if set (see below)
|-
| 14
| Sector has Deleted Data Address Mark (DDAM)
|-
| 13
| Sector data is present (not empty)
|}

== Compression scheme ==

The compression method is "run length encoding".

"run length encoding" is a simple compression algorithm which can compress sequences of the same repeated byte.

The compressed will contain single data bytes and run-length packets.

A "marker" byte of &E5 is used to identify a run-length packet. (&E5 is the byte used to fill empty sectors when a disc is formatted to the standard SYSTEM, DATA and IBM formats).

Run-length packets:

{| border="1"
|-
! Byte sequence
! Result
|-
| &E5,&00
| Output a single &E5 byte
|-
| &E5,<count>,<data>
| Output the byte <data> <count> times. e.g. &E5,&03,&25 -> &25,&25,&25
|-
| <value>
| <value> must not be &E5. Output <value> once
|}

SYMBiFACE II:Realtime clock

2009-09-24T01:48:51Z

Executioner: /* Status registers */

This is the documentation about the '''realtime clock''' of the [[SYMBiFACE II]] expansion card.

== Ports ==
* #FD15 (write only) register select
* #FD14 (read/write) read from or write into selected register

== Registers ==

<pre>
Number Content Values
#00 actual second 00-59 (bcd or binary)
#01 alarm second 00-59 (bcd or binary)
#02 actual minute 00-59 (bcd or binary)
#03 alarm minute 00-59 (bcd or binary)
#04 actual hour 00-23 (bcd or binary)
#05 alarm hour 00-23 (bcd or binary)
#06 day of the week ??
#07 day of the month 01-31 (bcd or binary)
#08 month 01-12 (bcd or binary)
#09 year 00-99 (bcd or binary)
#0A status A see below
#0B status B see below
#0C status C see below
#0D status D see below
#32 millenium 19 or 20 (bcd or binary)
#?? memory all other registers can be freely used as persistent memory
</pre>

== Status registers ==

* '''Status A'''
<pre>
bit0-3 [not used] interrupt frequency
bit4-6 time frequency (must be 010; if not, set it to this value, otherwise the RTC will not work correctly)
bit7 1 = time is being updated at the moment, so don't read it!
</pre>

* '''Status B'''
<pre>
bit0 1 = take summer time into account
bit1 0 = 12 hours time format, 1 = 24 hours time format
bit2 0 = all values in BCD format, 1 = all values in binary format
bit3 1 = [not used] activate rectangle generator
bit4 1 = [not used] generate interrupt after time update
bit5 1 = [not used] generate interrupt if alarm
bit6 1 = [not used] generate periodic interrupt (see status A, bit0-3)
bit7 1 = stop time update; set this, during you update the time and reset it after the update!
</pre>

* '''Status C'''
<pre>
bit4 1 = [not used] interrupt has been generated because of time update (see status B, bit4)
bit5 1 = [not used] interrupt has been generated because of alarm (see status B, bit5)
bit6 1 = [not used] interrupt has been generated because of periodic (see status B, bit6)
</pre>

* '''Status D'''
<pre>
bit7 0 = battery is nearly empty, please charge or replace
</pre>

== See also ==

* [[Programming:SYMBiFACE_II|SYMBiFACE II documentations]]

[[Category:Programming]]

Programming:Integer Multiplication

2008-04-04T04:31:06Z

Executioner: Stupid editor - disabled now

== Classic 8bit * 8bit Unsigned ==

'''Input:''' H = ''Multiplier'', E = ''Multiplicand'', L = 0, D = 0

'''Output:''' HL = ''Product''

<pre>
sla h ; optimised 1st iteration
jr nc,$+3
ld l,e

add hl,hl ; unroll 7 times
jr nc,$+3 ; ...
add hl,de ; ...
</pre>

== Classic 16bit * 8bit Unsigned ==

'''Input:''' A = ''Multiplier'', DE = ''Multiplicand'', HL = 0, C = 0

'''Output:''' A:HL = ''Product''

<pre>
add a,a ; optimised 1st iteration
jr nc,$+4
ld h,d
ld l,e

add hl,hl ; unroll 7 times
rla ; ...
jr nc,$+4 ; ...
add hl,de ; ...
adc a,c ; ...
</pre>

== Fast 8bit * 8bit Unsigned (using log / antilog tables) ==

The original routine was written by Jeff Frohwein for the Nintendo Gameboy. You can find it on [http://www.devrs.com/gb/files/logmult.txt Devrs.com].

Because of the usage of log / antilog tables this routine is less accurate, but very fast. It takes advantage of the fact that if you take the log of two numbers, add the results and then take the antilog of the total you have done the equivalent of multiplying the two numbers:

<pre>
x^a * x^b = x^(a+b)

a * b = x^(logx(a) + logx(b))
</pre>

'''Input:''' B = ''Multiplier'', C = ''Multiplicant''

'''Output:''' DE = ''Product''

<pre>

FastMult:
ld l,c
ld h,&82
ld d,(hl) ; d = 32 * log_2(c)

ld l,b
ld a,(hl) ; a = 32 * log_2(b)

add a,d
ld l,a
ld a,0
adc a,0
ld h,a ; hl = d + a

add hl,hl
set 2,h ; hl = hl + $0400
set 7,h ; hl = hl + &8000

ld e,(hl)
inc hl
ld d,(hl) ; de = 2^((hl)/32)

ret

; 32*Log_2(x) Table
;
; FOR A=0 TO 255
; C=4
; B=2
; FOR Z=1 TO 10
; IF (2^C) > A THEN C=C-B ELSE C=C+B
; B=B/2
; NEXT Z
; PRINT INT(C*32);",";
; NEXT A
ORG &8200

logtable:
db 0 , 0 , 32 , 50 , 64 , 74 , 82 , 89 , 96 , 101 , 106 , 110 , 114 , 118 , 121
db 125 , 128 , 130 , 133 , 135 , 138 , 140 , 142 , 144 , 146 , 148 , 150 , 152
db 153 , 155 , 157 , 158 , 160 , 161 , 162 , 164 , 165 , 166 , 167 , 169 , 170
db 171 , 172 , 173 , 174 , 175 , 176 , 177 , 178 , 179 , 180 , 181 , 182 , 183
db 184 , 185 , 185 , 186 , 187 , 188 , 189 , 189 , 190 , 191 , 192 , 192 , 193
db 194 , 194 , 195 , 196 , 196 , 197 , 198 , 198 , 199 , 199 , 200 , 201 , 201
db 202 , 202 , 203 , 204 , 204 , 205 , 205 , 206 , 206 , 207 , 207 , 208 , 208
db 209 , 209 , 210 , 210 , 211 , 211 , 212 , 212 , 213 , 213 , 213 , 214 , 214
db 215 , 215 , 216 , 216 , 217 , 217 , 217 , 218 , 218 , 219 , 219 , 219 , 220
db 220 , 221 , 221 , 221 , 222 , 222 , 222 , 223 , 223 , 224 , 224 , 224 , 225
db 225 , 225 , 226 , 226 , 226 , 227 , 227 , 227 , 228 , 228 , 228 , 229 , 229
db 229 , 230 , 230 , 230 , 231 , 231 , 231 , 231 , 232 , 232 , 232 , 233 , 233
db 233 , 234 , 234 , 234 , 234 , 235 , 235 , 235 , 236 , 236 , 236 , 236 , 237
db 237 , 237 , 237 , 238 , 238 , 238 , 238 , 239 , 239 , 239 , 239 , 240 , 240
db 240 , 241 , 241 , 241 , 241 , 241 , 242 , 242 , 242 , 242 , 243 , 243 , 243
db 243 , 244 , 244 , 244 , 244 , 245 , 245 , 245 , 245 , 245 , 246 , 246 , 246
db 246 , 247 , 247 , 247 , 247 , 247 , 248 , 248 , 248 , 248 , 249 , 249 , 249
db 249 , 249 , 250 , 250 , 250 , 250 , 250 , 251 , 251 , 251 , 251 , 251 , 252
db 252 , 252 , 252 , 252 , 253 , 253 , 253 , 253 , 253 , 253 , 254 , 254 , 254
db 254 , 254 , 255 , 255 , 255 , 255 , 255

; AntiLog 2^(x/32) Table
;
; FOR A=0 to 510
; PRINT INT(2^(A/32)+.5);",";
; NEXT A
ORG &8400

antilog:
dw 1 , 1 , 1 , 1 , 1 , 1 , 1 , 1 , 1 , 1 , 1 , 1 , 1 , 1 , 1 , 1 , 1 , 1 , 1 , 2
dw 2 , 2 , 2 , 2 , 2 , 2 , 2 , 2 , 2 , 2 , 2 , 2 , 2 , 2 , 2 , 2 , 2 , 2 , 2 , 2
dw 2 , 2 , 2 , 3 , 3 , 3 , 3 , 3 , 3 , 3 , 3 , 3 , 3 , 3 , 3 , 3 , 3 , 3 , 4 , 4
dw 4 , 4 , 4 , 4 , 4 , 4 , 4 , 4 , 4 , 4 , 5 , 5 , 5 , 5 , 5 , 5 , 5 , 5 , 5 , 6
dw 6 , 6 , 6 , 6 , 6 , 6 , 6 , 7 , 7 , 7 , 7 , 7 , 7 , 7 , 8 , 8 , 8 , 8 , 8 , 9
dw 9 , 9 , 9 , 9 , 10 , 10 , 10 , 10 , 10 , 11 , 11 , 11 , 11 , 12 , 12 , 12 , 12
dw 13 , 13 , 13 , 13 , 14 , 14 , 14 , 15 , 15 , 15 , 16 , 16 , 16 , 17 , 17 , 17
dw 18 , 18 , 19 , 19 , 19 , 20 , 20 , 21 , 21 , 22 , 22 , 23 , 23 , 24 , 24 , 25
dw 25 , 26 , 26 , 27 , 27 , 28 , 29 , 29 , 30 , 31 , 31 , 32 , 33 , 33 , 34 , 35
dw 36 , 36 , 37 , 38 , 39 , 40 , 41 , 41 , 42 , 43 , 44 , 45 , 46 , 47 , 48 , 49
dw 50 , 52 , 53 , 54 , 55 , 56 , 57 , 59 , 60 , 61 , 63 , 64 , 65 , 67 , 68 , 70
dw 71 , 73 , 74 , 76 , 78 , 79 , 81 , 83 , 85 , 87 , 89 , 91 , 92 , 95 , 97 , 99
dw 101 , 103 , 105 , 108 , 110 , 112 , 115 , 117 , 120 , 123 , 125 , 128 , 131
dw 134 , 137 , 140 , 143 , 146 , 149 , 152 , 156 , 159 , 162 , 166 , 170 , 173
dw 177 , 181 , 185 , 189 , 193 , 197 , 202 , 206 , 211 , 215 , 220 , 225 , 230
dw 235 , 240 , 245 , 251 , 256 , 262 , 267 , 273 , 279 , 285 , 292 , 298 , 304
dw 311 , 318 , 325 , 332 , 339 , 347 , 354 , 362 , 370 , 378 , 386 , 395 , 403
dw 412 , 421 , 431 , 440 , 450 , 459 , 470 , 480 , 490 , 501 , 512 , 523 , 535
dw 546 , 558 , 571 , 583 , 596 , 609 , 622 , 636 , 650 , 664 , 679 , 693 , 709
dw 724 , 740 , 756 , 773 , 790 , 807 , 825 , 843 , 861 , 880 , 899 , 919 , 939
dw 960 , 981 , 1002 , 1024 , 1046 , 1069 , 1093 , 1117 , 1141 , 1166 , 1192
dw 1218 , 1244 , 1272 , 1300 , 1328 , 1357 , 1387 , 1417 , 1448 , 1480 , 1512
dw 1545 , 1579 , 1614 , 1649 , 1685 , 1722 , 1760 , 1798 , 1838 , 1878 , 1919
dw 1961 , 2004 , 2048 , 2093 , 2139 , 2186 , 2233 , 2282 , 2332 , 2383 , 2435
dw 2489 , 2543 , 2599 , 2656 , 2714 , 2774 , 2834 , 2896 , 2960 , 3025 , 3091
dw 3158 , 3228 , 3298 , 3371 , 3444 , 3520 , 3597 , 3676 , 3756 , 3838 , 3922
dw 4008 , 4096 , 4186 , 4277 , 4371 , 4467 , 4565 , 4664 , 4767 , 4871 , 4978
dw 5087 , 5198 , 5312 , 5428 , 5547 , 5668 , 5793 , 5919 , 6049 , 6182 , 6317
dw 6455 , 6597 , 6741 , 6889 , 7039 , 7194 , 7351 , 7512 , 7677 , 7845 , 8016
dw 8192 , 8371 , 8555 , 8742 , 8933 , 9129 , 9329 , 9533 , 9742 , 9955 , 10173
dw 10396 , 10624 , 10856 , 11094 , 11337 , 11585 , 11839 , 12098 , 12363 , 12634
dw 12910 , 13193 , 13482 , 13777 , 14079 , 14387 , 14702 , 15024 , 15353 , 15689
dw 16033 , 16384 , 16743 , 17109 , 17484 , 17867 , 18258 , 18658 , 19066 , 19484
dw 19911 , 20347 , 20792 , 21247 , 21713 , 22188 , 22674 , 23170 , 23678 , 24196
dw 24726 , 25268 , 25821 , 26386 , 26964 , 27554 , 28158 , 28774 , 29404 , 30048
dw 30706 , 31379 , 32066 , 32768 , 33485 , 34219 , 34968 , 35734 , 36516 , 37316
dw 38133 , 38968 , 39821 , 40693 , 41584 , 42495 , 43425 , 44376 , 45348 , 46341
dw 47356 , 48393 , 49452 , 50535 , 51642 , 52772 , 53928 , 55109 , 56316 , 57549
dw 58809 , 60097 , 61413 , 62757
</pre>

== Faster, accurate 8bit * 8bit Unsigned ==

I'm currently working on a new routine, based on a routine by Kirk Meyer [http://www.ticalc.org/pub/86/asm/source/routines/vfmult.asm] which uses nibble multiplication tables.

I have a working, tested version which uses 16K of tables and can perform multiplication in 20μs.

The code to produce the tables is below:

<pre>
.maketabs
ld hl,hltab1
.makelp1
ld a,l
rla
and #1e
add restab / 256
ld (hl),a
inc l
jr nz,makelp1
inc h
.makelp2
ld a,l
rra:rra:rra
and #1e
jr z,usez
add restab2 - restab / 256 - 2
.usez
add restab / 256
ld (hl),a
inc l
jr nz,makelp2
inc h ; restab
.makelp3
ld a,(hl)
inc h
ld d,(hl)
inc h
add l
ld (hl),a
inc h
ld a,0
adc d
ld (hl),a
dec h:dec h:dec h
inc l
jr nz,makelp3
inc h
inc h
ld a,h
cp restab2 / 256 - 2
jr nz,makelp3
ld b,h
ld c,l
inc b
inc b
ld h,restab / 256 + 2
.makelp4
ld e,(hl)
inc h
ld d,(hl)
dec h
ex de,hl
add hl,hl:add hl,hl:add hl,hl:add hl,hl
ex de,hl
ld a,e
ld (bc),a
inc b
ld a,d
ld (bc),a
dec b
inc l
inc c
jr nz,makelp4
inc h
inc h
inc b
inc b
ld a,h
cp restab2 / 256
jr nz,makelp4
ret

ds -$ and #ff
.hltab1
ds 256
.hltab2
ds 256
.restab
ds 512 * 16
.restab2
ds 512 * 15
</pre>

The code to perform the multiplication (DE = L * C):

<pre>
ld h,hltab1 / 256 ; 2
ld b,(hl) ; 4
inc h ; 5
ld h,(hl) ; 7
ld l,c ; 8
ld a,(bc) ; 10
add (hl) ; 12
ld e,a ; 13
inc b ; 14
inc h ; 15
ld a,(bc) ; 17
adc (hl) ; 19
ld d,a ; 20
</pre>

16K is a lot of memory to use for tables, but I'm working on a way to reduce this to 8K while maintaining similar performance (around 26μs). The idea is rather than using tables for the low and high nibbles, use tables for alternate bits. So there would be 16 tables for the values #00, #01, #04, #05, #10, #11, #14, #15, #40, #41, #44, #45, #50, #51, #54, #55. The values can be shifted by 1 (rather than 4) to give values for the alternate bits using a simple ADD HL,HL.

This routine should be easy to adapt to a 16bit * 8bit unsigned multiplication or even a 16bit * 16bit, using simple additions.

[[User:Executioner|Executioner]] 03:58, 8 May 2007 (CEST)

Ok, here is the new 8K routine, first the routine to build the tables:

<pre>
.maketabs
ld hl,hltab1
.makelp5
ld a,l
ld bc,0
rla:rl b:rla:rl c
rla:rl b:rla:rl c
rla:rl b:rla:rl c
rla:rl b:rla:rl c
ld a,b
add a
add restab / 256
ld (hl),a
inc h
ld a,c
add a
add restab / 256
ld (hl),a
dec h
inc l
jr nz,makelp5
ld h,restab / 256 + 2
.makelp6
ld (hl),l
inc l
jr nz,makelp6
inc h:inc h
ld b,2
.makelp8
push bc
xor a
rr b:rra:rrca
rr b:rra:rrca
rr b:rra:rrca
rr b:rra:rrca
.makelp7
push hl
push af
call mulLbyA
ex de,hl
pop af
pop hl
ld (hl),e
inc h
ld (hl),d
dec h
inc l
jr nz,makelp7
inc h:inc h
pop bc
inc b
bit 4,b
jr z,makelp8
ret

.mulLbyA ; MAX times ; MIN times
ld e,l ; 1 ; 1
ld d,0 ; 3 ; 3
add a ; 4 ; 4
ld h,a ; 5 ; 5
jr c,ncad0 ; 8 ; 8
ld l,d
.ncad0
add hl,hl ; 11 ; 11
jr nc,ncad1 ; 13 ; 14
add hl,de ; 16
.ncad1
add hl,hl ; 19 ; 17
jr nc,ncad2 ; 21 ; 20
add hl,de ; 24
.ncad2
add hl,hl ; 27 ; 23
jr nc,ncad3 ; 29 ; 26
add hl,de ; 32
.ncad3
add hl,hl ; 35 ; 29
jr nc,ncad4 ; 37 ; 32
add hl,de ; 40
.ncad4
add hl,hl ; 43 ; 35
jr nc,ncad5 ; 45 ; 38
add hl,de ; 48
.ncad5
add hl,hl ; 51 ; 41
jr nc,ncad6 ; 53 ; 44
add hl,de ; 56
.ncad6
add hl,hl ; 59 ; 47
ld a,h ; 60 ; 48
ret nc ; 61 ; 50?
add hl,de ; 64
ld a,h ; 65
ret

ds -$ and #ff

.hltab1
ds 256
.hltab2
ds 256
.restab
ds 512 * 16
</pre>

And the routine to do the multiplication:

<pre>
.umultCL ; Using 8 bit only (25us - DE = L * C)
ld h,hltab2 / 256 ; 2
ld b,(hl) ; 4
dec h ; 5
ld h,(hl) ; 7
ld l,c ; 8
ld a,(hl) ; 10
add a ; 11
inc h ; 12
ld d,(hl) ; 14
rl d ; 16
ld h,b ; 17
add (hl) ; 19
ld e,a ; 20
inc h ; 21
ld a,(hl) ; 23
adc d ; 24
ld d,a ; 25
ret
</pre>

== Very fast 8bit * 8bit Unsigned with only 1K of tables ==

Here's a new routine I've developed which uses the formula ab = ((a + b)<sup>2</sup> - (a - b)<sup>2</sup>) / 4. It's based on a routine for the 6502 by Stephen Judd in a C= Hacking article. Because of differences between the way the 6502 does register indexing it was quite difficult to actually get this working, but it's a great compromise between speed and space since it only uses 1K of tables (as opposed to the 16K or 8K table routines above), and can still manage to do the job in a maximum of 28 microseconds.

<br>Firstly, once again, we need some code to generate the tables. These tables contain values for

<br>x<sup>2</sup>/4 for 9 bit values of x, with the LSB when bit 8 is zero first followed by the MSB.
<pre>.gen_sq4
xor a
ld de,umul_tab + #1ff
ld (de),a
dec d
ld (de),a
ld h,d
ld l,e
inc e
ld c,e
ld b,2

.sq4_lp
ld a,b
cp 2
ld a,e
rra
add (hl)
ld (de),a
inc h
inc d
ld a,(hl)
adc c
ld (de),a
dec d
ld h,d
inc l
inc e
jr nz,sq4_lp
inc d
inc d
djnz sq4_lp
ret

align #100
.umul_tab ds #400

</pre>
Now for the actual multiply routine:

'''Input:''' A = ''Multiplier'', L = ''Multiplicand''

'''Output:''' DE = ''Product''
<pre>
ld h,umul_tab_lo / #100 ; 2
ld b,h ; 3
add l ; 4
ld c,a ; 5
jr nc,@noovf ; 7
inc b ; 8
inc b ; 9
.@noovf
sub l ; 10
sub l ; 11
jr nc,@noneg ; 13
neg ; 15
.@noneg
ld l,a ; 16
ld a,(bc) ; 18
sub (hl) ; 20
ld e,a ; 21
inc b ; 22
inc h ; 23
ld a,(bc) ; 25
sbc (hl) ; 27
ld d,a ; 28

</pre>
This code could easily be converted to a macro as it's only 24 bytes. I've tried to optimise it further but with no luck!

[[User:Executioner|Executioner]] 06:25, 4 April 2008 (CEST)

== 16bit * 16bit Unsigned ==

'''Input:''' BC = ''Multiplier'', DE = ''Multiplicand''

'''Output:''' A,HL = ''Product''
<pre>ld ix,0
ld hl,0
.mul24b1:
ld a,c
or b
jr z,mul24b3
srl b
rr c
jr nc,mul24b2
add ix,de
ld a,h
adc l
ld h,a
.mul24b2:
sla e
rl d
rl l
jr mul24b1:
.mul24b3:
ld a,h
db #dd:ld e,l
db #dd:ld d,h
ex de,hl
ret</pre>

== Web links ==

* [http://map.tni.nl/articles/mult_div_shifts.php Multiplications and divisions on the MSX Assembly Page]
* [http://www.mccw.hetlab.tk/92/Multiplication/en.html "Multiplication on a Z80" ( MSX Computer & Club Webmagazine)]

[[Category:Programming]]

Programming:Integer Multiplication

2008-04-04T04:25:48Z

Executioner: Added new 8bit*bit routine

== Classic 8bit * 8bit Unsigned ==

'''Input:''' H = ''Multiplier'', E = ''Multiplicand'', L = 0, D = 0

'''Output:''' HL = ''Product''

<pre>
sla h ; optimised 1st iteration
jr nc,$+3
ld l,e

add hl,hl ; unroll 7 times
jr nc,$+3 ; ...
add hl,de ; ...
</pre>

== Classic 16bit * 8bit Unsigned ==

'''Input:''' A = ''Multiplier'', DE = ''Multiplicand'', HL = 0, C = 0

'''Output:''' A:HL = ''Product''

<pre>
add a,a ; optimised 1st iteration
jr nc,$+4
ld h,d
ld l,e

add hl,hl ; unroll 7 times
rla ; ...
jr nc,$+4 ; ...
add hl,de ; ...
adc a,c ; ...
</pre>

== Fast 8bit * 8bit Unsigned (using log / antilog tables) ==

The original routine was written by Jeff Frohwein for the Nintendo Gameboy. You can find it on [http://www.devrs.com/gb/files/logmult.txt Devrs.com].

Because of the usage of log / antilog tables this routine is less accurate, but very fast. It takes advantage of the fact that if you take the log of two numbers, add the results and then take the antilog of the total you have done the equivalent of multiplying the two numbers:

<pre>
x^a * x^b = x^(a+b)

a * b = x^(logx(a) + logx(b))
</pre>

'''Input:''' B = ''Multiplier'', C = ''Multiplicant''

'''Output:''' DE = ''Product''

<pre>

FastMult:
ld l,c
ld h,&82
ld d,(hl) ; d = 32 * log_2(c)

ld l,b
ld a,(hl) ; a = 32 * log_2(b)

add a,d
ld l,a
ld a,0
adc a,0
ld h,a ; hl = d + a

add hl,hl
set 2,h ; hl = hl + $0400
set 7,h ; hl = hl + &8000

ld e,(hl)
inc hl
ld d,(hl) ; de = 2^((hl)/32)

ret

; 32*Log_2(x) Table
;
; FOR A=0 TO 255
; C=4
; B=2
; FOR Z=1 TO 10
; IF (2^C) > A THEN C=C-B ELSE C=C+B
; B=B/2
; NEXT Z
; PRINT INT(C*32);",";
; NEXT A
ORG &8200

logtable:
db 0 , 0 , 32 , 50 , 64 , 74 , 82 , 89 , 96 , 101 , 106 , 110 , 114 , 118 , 121
db 125 , 128 , 130 , 133 , 135 , 138 , 140 , 142 , 144 , 146 , 148 , 150 , 152
db 153 , 155 , 157 , 158 , 160 , 161 , 162 , 164 , 165 , 166 , 167 , 169 , 170
db 171 , 172 , 173 , 174 , 175 , 176 , 177 , 178 , 179 , 180 , 181 , 182 , 183
db 184 , 185 , 185 , 186 , 187 , 188 , 189 , 189 , 190 , 191 , 192 , 192 , 193
db 194 , 194 , 195 , 196 , 196 , 197 , 198 , 198 , 199 , 199 , 200 , 201 , 201
db 202 , 202 , 203 , 204 , 204 , 205 , 205 , 206 , 206 , 207 , 207 , 208 , 208
db 209 , 209 , 210 , 210 , 211 , 211 , 212 , 212 , 213 , 213 , 213 , 214 , 214
db 215 , 215 , 216 , 216 , 217 , 217 , 217 , 218 , 218 , 219 , 219 , 219 , 220
db 220 , 221 , 221 , 221 , 222 , 222 , 222 , 223 , 223 , 224 , 224 , 224 , 225
db 225 , 225 , 226 , 226 , 226 , 227 , 227 , 227 , 228 , 228 , 228 , 229 , 229
db 229 , 230 , 230 , 230 , 231 , 231 , 231 , 231 , 232 , 232 , 232 , 233 , 233
db 233 , 234 , 234 , 234 , 234 , 235 , 235 , 235 , 236 , 236 , 236 , 236 , 237
db 237 , 237 , 237 , 238 , 238 , 238 , 238 , 239 , 239 , 239 , 239 , 240 , 240
db 240 , 241 , 241 , 241 , 241 , 241 , 242 , 242 , 242 , 242 , 243 , 243 , 243
db 243 , 244 , 244 , 244 , 244 , 245 , 245 , 245 , 245 , 245 , 246 , 246 , 246
db 246 , 247 , 247 , 247 , 247 , 247 , 248 , 248 , 248 , 248 , 249 , 249 , 249
db 249 , 249 , 250 , 250 , 250 , 250 , 250 , 251 , 251 , 251 , 251 , 251 , 252
db 252 , 252 , 252 , 252 , 253 , 253 , 253 , 253 , 253 , 253 , 254 , 254 , 254
db 254 , 254 , 255 , 255 , 255 , 255 , 255

; AntiLog 2^(x/32) Table
;
; FOR A=0 to 510
; PRINT INT(2^(A/32)+.5);",";
; NEXT A
ORG &8400

antilog:
dw 1 , 1 , 1 , 1 , 1 , 1 , 1 , 1 , 1 , 1 , 1 , 1 , 1 , 1 , 1 , 1 , 1 , 1 , 1 , 2
dw 2 , 2 , 2 , 2 , 2 , 2 , 2 , 2 , 2 , 2 , 2 , 2 , 2 , 2 , 2 , 2 , 2 , 2 , 2 , 2
dw 2 , 2 , 2 , 3 , 3 , 3 , 3 , 3 , 3 , 3 , 3 , 3 , 3 , 3 , 3 , 3 , 3 , 3 , 4 , 4
dw 4 , 4 , 4 , 4 , 4 , 4 , 4 , 4 , 4 , 4 , 5 , 5 , 5 , 5 , 5 , 5 , 5 , 5 , 5 , 6
dw 6 , 6 , 6 , 6 , 6 , 6 , 6 , 7 , 7 , 7 , 7 , 7 , 7 , 7 , 8 , 8 , 8 , 8 , 8 , 9
dw 9 , 9 , 9 , 9 , 10 , 10 , 10 , 10 , 10 , 11 , 11 , 11 , 11 , 12 , 12 , 12 , 12
dw 13 , 13 , 13 , 13 , 14 , 14 , 14 , 15 , 15 , 15 , 16 , 16 , 16 , 17 , 17 , 17
dw 18 , 18 , 19 , 19 , 19 , 20 , 20 , 21 , 21 , 22 , 22 , 23 , 23 , 24 , 24 , 25
dw 25 , 26 , 26 , 27 , 27 , 28 , 29 , 29 , 30 , 31 , 31 , 32 , 33 , 33 , 34 , 35
dw 36 , 36 , 37 , 38 , 39 , 40 , 41 , 41 , 42 , 43 , 44 , 45 , 46 , 47 , 48 , 49
dw 50 , 52 , 53 , 54 , 55 , 56 , 57 , 59 , 60 , 61 , 63 , 64 , 65 , 67 , 68 , 70
dw 71 , 73 , 74 , 76 , 78 , 79 , 81 , 83 , 85 , 87 , 89 , 91 , 92 , 95 , 97 , 99
dw 101 , 103 , 105 , 108 , 110 , 112 , 115 , 117 , 120 , 123 , 125 , 128 , 131
dw 134 , 137 , 140 , 143 , 146 , 149 , 152 , 156 , 159 , 162 , 166 , 170 , 173
dw 177 , 181 , 185 , 189 , 193 , 197 , 202 , 206 , 211 , 215 , 220 , 225 , 230
dw 235 , 240 , 245 , 251 , 256 , 262 , 267 , 273 , 279 , 285 , 292 , 298 , 304
dw 311 , 318 , 325 , 332 , 339 , 347 , 354 , 362 , 370 , 378 , 386 , 395 , 403
dw 412 , 421 , 431 , 440 , 450 , 459 , 470 , 480 , 490 , 501 , 512 , 523 , 535
dw 546 , 558 , 571 , 583 , 596 , 609 , 622 , 636 , 650 , 664 , 679 , 693 , 709
dw 724 , 740 , 756 , 773 , 790 , 807 , 825 , 843 , 861 , 880 , 899 , 919 , 939
dw 960 , 981 , 1002 , 1024 , 1046 , 1069 , 1093 , 1117 , 1141 , 1166 , 1192
dw 1218 , 1244 , 1272 , 1300 , 1328 , 1357 , 1387 , 1417 , 1448 , 1480 , 1512
dw 1545 , 1579 , 1614 , 1649 , 1685 , 1722 , 1760 , 1798 , 1838 , 1878 , 1919
dw 1961 , 2004 , 2048 , 2093 , 2139 , 2186 , 2233 , 2282 , 2332 , 2383 , 2435
dw 2489 , 2543 , 2599 , 2656 , 2714 , 2774 , 2834 , 2896 , 2960 , 3025 , 3091
dw 3158 , 3228 , 3298 , 3371 , 3444 , 3520 , 3597 , 3676 , 3756 , 3838 , 3922
dw 4008 , 4096 , 4186 , 4277 , 4371 , 4467 , 4565 , 4664 , 4767 , 4871 , 4978
dw 5087 , 5198 , 5312 , 5428 , 5547 , 5668 , 5793 , 5919 , 6049 , 6182 , 6317
dw 6455 , 6597 , 6741 , 6889 , 7039 , 7194 , 7351 , 7512 , 7677 , 7845 , 8016
dw 8192 , 8371 , 8555 , 8742 , 8933 , 9129 , 9329 , 9533 , 9742 , 9955 , 10173
dw 10396 , 10624 , 10856 , 11094 , 11337 , 11585 , 11839 , 12098 , 12363 , 12634
dw 12910 , 13193 , 13482 , 13777 , 14079 , 14387 , 14702 , 15024 , 15353 , 15689
dw 16033 , 16384 , 16743 , 17109 , 17484 , 17867 , 18258 , 18658 , 19066 , 19484
dw 19911 , 20347 , 20792 , 21247 , 21713 , 22188 , 22674 , 23170 , 23678 , 24196
dw 24726 , 25268 , 25821 , 26386 , 26964 , 27554 , 28158 , 28774 , 29404 , 30048
dw 30706 , 31379 , 32066 , 32768 , 33485 , 34219 , 34968 , 35734 , 36516 , 37316
dw 38133 , 38968 , 39821 , 40693 , 41584 , 42495 , 43425 , 44376 , 45348 , 46341
dw 47356 , 48393 , 49452 , 50535 , 51642 , 52772 , 53928 , 55109 , 56316 , 57549
dw 58809 , 60097 , 61413 , 62757
</pre>

== Faster, accurate 8bit * 8bit Unsigned ==

I'm currently working on a new routine, based on a routine by Kirk Meyer [http://www.ticalc.org/pub/86/asm/source/routines/vfmult.asm] which uses nibble multiplication tables.

I have a working, tested version which uses 16K of tables and can perform multiplication in 20μs.

The code to produce the tables is below:

<pre>
.maketabs
ld hl,hltab1
.makelp1
ld a,l
rla
and #1e
add restab / 256
ld (hl),a
inc l
jr nz,makelp1
inc h
.makelp2
ld a,l
rra:rra:rra
and #1e
jr z,usez
add restab2 - restab / 256 - 2
.usez
add restab / 256
ld (hl),a
inc l
jr nz,makelp2
inc h ; restab
.makelp3
ld a,(hl)
inc h
ld d,(hl)
inc h
add l
ld (hl),a
inc h
ld a,0
adc d
ld (hl),a
dec h:dec h:dec h
inc l
jr nz,makelp3
inc h
inc h
ld a,h
cp restab2 / 256 - 2
jr nz,makelp3
ld b,h
ld c,l
inc b
inc b
ld h,restab / 256 + 2
.makelp4
ld e,(hl)
inc h
ld d,(hl)
dec h
ex de,hl
add hl,hl:add hl,hl:add hl,hl:add hl,hl
ex de,hl
ld a,e
ld (bc),a
inc b
ld a,d
ld (bc),a
dec b
inc l
inc c
jr nz,makelp4
inc h
inc h
inc b
inc b
ld a,h
cp restab2 / 256
jr nz,makelp4
ret

ds -$ and #ff
.hltab1
ds 256
.hltab2
ds 256
.restab
ds 512 * 16
.restab2
ds 512 * 15
</pre>

The code to perform the multiplication (DE = L * C):

<pre>
ld h,hltab1 / 256 ; 2
ld b,(hl) ; 4
inc h ; 5
ld h,(hl) ; 7
ld l,c ; 8
ld a,(bc) ; 10
add (hl) ; 12
ld e,a ; 13
inc b ; 14
inc h ; 15
ld a,(bc) ; 17
adc (hl) ; 19
ld d,a ; 20
</pre>

16K is a lot of memory to use for tables, but I'm working on a way to reduce this to 8K while maintaining similar performance (around 26μs). The idea is rather than using tables for the low and high nibbles, use tables for alternate bits. So there would be 16 tables for the values #00, #01, #04, #05, #10, #11, #14, #15, #40, #41, #44, #45, #50, #51, #54, #55. The values can be shifted by 1 (rather than 4) to give values for the alternate bits using a simple ADD HL,HL.

This routine should be easy to adapt to a 16bit * 8bit unsigned multiplication or even a 16bit * 16bit, using simple additions.

[[User:Executioner|Executioner]] 03:58, 8 May 2007 (CEST)

Ok, here is the new 8K routine, first the routine to build the tables:

<pre>
.maketabs
ld hl,hltab1
.makelp5
ld a,l
ld bc,0
rla:rl b:rla:rl c
rla:rl b:rla:rl c
rla:rl b:rla:rl c
rla:rl b:rla:rl c
ld a,b
add a
add restab / 256
ld (hl),a
inc h
ld a,c
add a
add restab / 256
ld (hl),a
dec h
inc l
jr nz,makelp5
ld h,restab / 256 + 2
.makelp6
ld (hl),l
inc l
jr nz,makelp6
inc h:inc h
ld b,2
.makelp8
push bc
xor a
rr b:rra:rrca
rr b:rra:rrca
rr b:rra:rrca
rr b:rra:rrca
.makelp7
push hl
push af
call mulLbyA
ex de,hl
pop af
pop hl
ld (hl),e
inc h
ld (hl),d
dec h
inc l
jr nz,makelp7
inc h:inc h
pop bc
inc b
bit 4,b
jr z,makelp8
ret

.mulLbyA ; MAX times ; MIN times
ld e,l ; 1 ; 1
ld d,0 ; 3 ; 3
add a ; 4 ; 4
ld h,a ; 5 ; 5
jr c,ncad0 ; 8 ; 8
ld l,d
.ncad0
add hl,hl ; 11 ; 11
jr nc,ncad1 ; 13 ; 14
add hl,de ; 16
.ncad1
add hl,hl ; 19 ; 17
jr nc,ncad2 ; 21 ; 20
add hl,de ; 24
.ncad2
add hl,hl ; 27 ; 23
jr nc,ncad3 ; 29 ; 26
add hl,de ; 32
.ncad3
add hl,hl ; 35 ; 29
jr nc,ncad4 ; 37 ; 32
add hl,de ; 40
.ncad4
add hl,hl ; 43 ; 35
jr nc,ncad5 ; 45 ; 38
add hl,de ; 48
.ncad5
add hl,hl ; 51 ; 41
jr nc,ncad6 ; 53 ; 44
add hl,de ; 56
.ncad6
add hl,hl ; 59 ; 47
ld a,h ; 60 ; 48
ret nc ; 61 ; 50?
add hl,de ; 64
ld a,h ; 65
ret

ds -$ and #ff

.hltab1
ds 256
.hltab2
ds 256
.restab
ds 512 * 16
</pre>

And the routine to do the multiplication:

<pre>
.umultCL ; Using 8 bit only (25us - DE = L * C)
ld h,hltab2 / 256 ; 2
ld b,(hl) ; 4
dec h ; 5
ld h,(hl) ; 7
ld l,c ; 8
ld a,(hl) ; 10
add a ; 11
inc h ; 12
ld d,(hl) ; 14
rl d ; 16
ld h,b ; 17
add (hl) ; 19
ld e,a ; 20
inc h ; 21
ld a,(hl) ; 23
adc d ; 24
ld d,a ; 25
ret
</pre>

== Very fast 8bit * 8bit Unsigned with only 1K of tables ==

Here's a new routine I've developed which uses the formula ab = ((a + b)<sup>2</sup> - (a - b)<sup>2</sup>) / 4. It's based on a routine for the 6502 by Stephen Judd in a C= Hacking article. Because of differences between the way the 6502 does register indexing it was quite difficult to actually get this working, but it's a great compromise between speed and space since it only uses 1K of tables (as opposed to the 16K or 8K table routines above), and can still manage to do the job in a maximum of 28 microseconds.

<br>Firstly, once again, we need some code to generate the tables. These tables contain values for

<br>x<sup>2</sup>/4 for 9 bit values of x, with the LSB when bit 8 is zero first followed by the MSB.
<pre>.gen_sq4
xor a
ld de,umul_tab_lo + #1ff
ld (de),a
dec d
ld (de),a
ld h,d
ld l,e
inc e
ld c,e
ld b,2

.sq4_lp
ld a,b
cp 2
ld a,e
rra
add (hl)
ld (de),a
inc h
inc d
ld a,(hl)
adc c
ld (de),a
dec d
ld h,d
inc l
inc e
jr nz,sq4_lp
inc d
inc d
djnz sq4_lp
ret

align #100
.umul_tab ds #400</pre>
Now for the actual multiply routine:

'''Input:''' A = ''Multiplier'', L = ''Multiplicand''

'''Output:''' DE = ''Product''
<pre>ld h,umul_tab / #100 ; 2
ld b,h ; 3
add l ; 4
ld c,a ; 5
jr nc,@noovf ; 7
inc b ; 8
inc b ; 9
.@noovf
sub l ; 10
sub l ; 11
jr nc,@noneg ; 13
neg ; 15
.@noneg
ld l,a ; 16
ld a,(bc) ; 18
sub (hl) ; 20
ld e,a ; 21
inc b ; 22
inc h ; 23
ld a,(bc) ; 25
sbc (hl) ; 27
ld d,a ; 28</pre>
This code could easily be converted to a macro as it's only 24 bytes. I've tried to optimise it further but with no luck!

[[User:Executioner|Executioner]] 06:25, 4 April 2008 (CEST)

== 16bit * 16bit Unsigned ==

'''Input:''' BC = ''Multiplier'', DE = ''Multiplicand''

'''Output:''' A,HL = ''Product''
<pre>ld ix,0
ld hl,0
.mul24b1:
ld a,c
or b
jr z,mul24b3
srl b
rr c
jr nc,mul24b2
add ix,de
ld a,h
adc l
ld h,a
.mul24b2:
sla e
rl d
rl l
jr mul24b1:
.mul24b3:
ld a,h
db #dd:ld e,l
db #dd:ld d,h
ex de,hl
ret</pre>

== Web links ==

* [http://map.tni.nl/articles/mult_div_shifts.php Multiplications and divisions on the MSX Assembly Page]
* [http://www.mccw.hetlab.tk/92/Multiplication/en.html "Multiplication on a Z80" ( MSX Computer & Club Webmagazine)]

[[Category:Programming]]

Executioner

2008-03-14T02:58:56Z

Executioner:

'''Executioner''' is a coder from Australia. His most popular productions are [[ParaDOS]] and [[WinApe]].

==Productions==

===Emulators===
* [[CPCEMU (RWCPC)|CPCEMU]] - I wrote this and called it CPCEMU before I'd heard of CPCEMU by [[Marco Vieth]]. Now commonly known as [[CPCEMU (RWCPC)|RWCPC]]
* [[WinApe]]
* [[JEMU]]

===Serious Software===
* [[Xexor]] - Disc editor and copy utility
* [[ParaDOS]] - Extended DOS, replacement for AMSDOS with built-in utilities
* [[Electro Forth]] - A complete Forth implementation I developed for fun
* [[ZACK]] - Unfinished game creator software. Everything got finished except the sound/FX and completed game loader/multi-load code.

=== Games ===

* [[Electro Invaders]]
* [[Kiloroid]] - An ''Asteroids'' clone written in 1K for the [http://www.cling.gu.se/~cl3polof/minigame/ 2002 Minigame Competition]
* [[KTris]] - A ''Tetris'' clone written in 1K for the [http://starbase.globalpc.net/minigame/ 2003 Minigame Competition]
* [[4KRoids]] - A 4K version of ''Kiloroid''; unfinished, but playable
* [[Pacman]] - A ''Pacman'' clone, based on Acornsoft's ''Snapper''
* [[Cobra Mission]] - Sample game with [[ZACK]]
* [[Frogger]] - A conversion of Konami's coin-op game; only works on [[Plus|Plus machines]]
* [[Deathchase]] - A CPC conversion of the ZX Spectrum game by Mervyn Estcourt

===Other===
* The River Scroll demo

[[Category:CPC scene members]]

Main Page

2008-03-14T02:54:39Z

Executioner:

__NOTOC__
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<div align="center">
== Welcome to the Amstrad CPC Wiki! ==
This site hopes to evolve into an encyclopaedia on all things [[Amstrad]] [[CPC]] related. There are now '''[[Special:Allpages|{{NUMBEROFARTICLES}} articles]]''' around the CPC available. Feel free to [[Help:Editing|contribute]] or post your suggestions in the [http://www.cpcwiki.eu/forum Forum]!

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* 19/12/2007: [[X-Mas 2007]] Another X-mas demos released by [[Hermol]]!
* 14/12/2007: New [http://cpcgamescd.amstrad.es CPCGamesCD] out
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2007-10-29T11:52:07Z

Executioner: Removed </div> text

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This site hopes to evolve into an encyclopaedia on all things [[Amstrad]] [[CPC]] related. There are now '''[[Special:Allpages|{{NUMBEROFARTICLES}} articles]]''' around the CPC available. Feel free to [[Help:Editing|contribute]] or post your suggestions in the [http://www.cpcwiki.eu/forum Forum]!<br><br>

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=== CPC related news ===

The last CPC related news.

* 29/10/2007: [http://www.winape.net WinAPE] 2.0 Alpha 15 released. Configuration Profiles, Improved Sprite emulation, assembler and debugger improvements. Stacks of minor enhancements and bug fixes.
* 18/10/2007: * 04/08/2007: [http://cpcrulez.free.fr/coding_src_freeOCP.htm FreeOCP] v0.015b released
* 18/10/2007: [http://cpcrulez.free.fr/Scene_Demos/index.php?list=H Hate Beats] : new Amstrad CPC Plus demo released by [http://ukonx.free.fr Ukonx]
* 06/10/2007: NEW game for Amstrad CPC available for download : [http://cpcrulez.free.fr/GamesDL_free/index.php?list=D Delirium Tremens] by Antonio Elic , Bernardin Katic et Alen Blazevic. D
* 04/10/2007: an invitro for [http://www.secretum-meeting.pixnet.fr/ Castellum Secretum 2] meeting has just been released and is available [http://www.amstradcpc.info here].
* 01/10/2007: [http://zx81.zx81.free.fr/ GP2XCap32 and PSPCap32] released, with major improvements (close to fullspeed, sound is now played in 16 bits and stereo, new speed limiter function and much more)
* 30/09/2007: [http://www.secretum-meeting.pixnet.fr/ Castellum Secretum 2] meeting will be held in Segré, France, from 26 to 28th october.
* 17/09/2007: [http://cpce.emuunlim.com CPCE 1.84] released, with assorted bug fixes and enhancements. A hotfix was released on 23/09/2007.
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=== Did you know? ===

* With a possible total amount of '''768 x 270 pixel''' (540 interlaced) the [[CPC]] was the 8bit homecomputer with the highest screen resolution ever.
* '''OpenOffice''' for Windows/Linux is a direct descendant of [[Star-Division|StarWriter]] for the CPC.
* The transfer speed of the [[CPC Booster|CPC Booster +]] serial interface is faster than a standard '''DSL connection'''.
* [[SymbOS]] can handle more than '''50 times''' bigger hard discs than MS Windows 95A.
</div>
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=== CPCWiki updates ===

* '''FCKEditor''' installed! Now you can easily edit pages. Please report any functionality issues. You can also ''deactivate it in your user preferences.''
* '''[[VideoUpload|VIDEO EMBEDDING]] enabled for the wiki! Woo-hoo!!!'''
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Main Page

2007-10-29T11:51:23Z

Executioner: Added WinAPE release

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=== CPC related news ===

The last CPC related news.

* 29/10/2007: [http://www.winape.net WinAPE] 2.0 Alpha 15 released. Configuration Profiles, Improved Sprite emulation, assembler and debugger improvements. Stacks of minor enhancements and bug fixes.
* 18/10/2007: * 04/08/2007: [http://cpcrulez.free.fr/coding_src_freeOCP.htm FreeOCP] v0.015b released
* 18/10/2007: [http://cpcrulez.free.fr/Scene_Demos/index.php?list=H Hate Beats] : new Amstrad CPC Plus demo released by [http://ukonx.free.fr Ukonx]
* 06/10/2007: NEW game for Amstrad CPC available for download : [http://cpcrulez.free.fr/GamesDL_free/index.php?list=D Delirium Tremens] by Antonio Elic , Bernardin Katic et Alen Blazevic. D
* 04/10/2007: an invitro for [http://www.secretum-meeting.pixnet.fr/ Castellum Secretum 2] meeting has just been released and is available [http://www.amstradcpc.info here].
* 01/10/2007: [http://zx81.zx81.free.fr/ GP2XCap32 and PSPCap32] released, with major improvements (close to fullspeed, sound is now played in 16 bits and stereo, new speed limiter function and much more)
* 30/09/2007: [http://www.secretum-meeting.pixnet.fr/ Castellum Secretum 2] meeting will be held in Segré, France, from 26 to 28th october.
* 17/09/2007: [http://cpce.emuunlim.com CPCE 1.84] released, with assorted bug fixes and enhancements. A hotfix was released on 23/09/2007.
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Talk:SP0256

2007-10-11T12:37:18Z

Executioner: /* Rename */ GI datasheet link

Can anyone find or get a copy of the internal ROM from the SPO256AL2? I want to emulate it - [[User:Executioner|Executioner]] 12:39, 1 September 2006 (CEST)

: Hmmm... I can probably manage that, i got the chip! But how to read out the ROM data? Can a simple program on the CPC do that or do i have to plug it in a romboard to read the data? (Have to check the pin configs i guess) --[[User:CPCLER|CPCLER]] 12:52, 1 September 2006 (CEST)

:: Is it an additional CPC OS rom? If yes, it's quite easy, I can send you a program for this. BTW, @CPCLER, please use the colon (:) at the beginning of your "talk"-text for correct formatting. -- [[User:Prodatron|Prodatron]] 13:46, 1 September 2006 (CEST)

::: (Sorry about the colons!!! New to this wiki stuff) No... I have uploaded some pictures of the SPO256 board, and there are clearly no additional ROM chips! so how to proceed, any way of reading the rom data via the SPO256 chip?

::: The software for the SSA1 has to be loaded from disc or tape (I will test this when i get a CPC up and running). I think the dk'tronics (also based on the SPO256) had at least the software on rom, dont know if it actually used the feature with a rom connected directly to the SPO256.

== SPO256 internal phoneme ROM ==

: No, this isn't a ROM for the CPC, it's the built-in phoneme ROM in the SPO256AL2, and it can only be read by using the serial output on the chip itself, which will require some hardware knowledge and the SPO datasheet. Yes, I do also have an SPO256 in my SSA-1, but no way to read it... Guess I'll have to desolder and pull the chip and connect it to my 8255 I/O board (no idea if that still works) :)

:: I'm looking for this ROM, but can't find it anywhere. Did you dump it? (BTW, I think the correct title is "SP'''0'''256".) —[[User:Stuart Brady|Stuart Brady]] 22:02, 1 October 2007 (CEST)

::: Nah, haven't dumped it yet. That'd mean finding it, and finding the IO board, desoldering it, attaching it to the IO board somehow and then figuring out how to read the serial data... I think there may be an image of the ROM as a resource in the Spectactulator ZX Spectrum emulator in a DLL, that may be an easier way to get it, but I have to check it's actually the original AL2 ROM :) btw, it is SPO256 according to the datasheet. [[User:Executioner|Executioner]] 01:27, 3 October 2007 (CEST)

:::: I think Spectaculator uses prerecorded samples. —[[User:Stuart Brady|Stuart Brady]] 17:06, 3 October 2007 (CEST)

::::: It does, but it also has the ROM as a resource in the DLL. It's 2K, same as the real one. [[User:Executioner|Executioner]] 22:14, 3 October 2007 (CEST)

:::::: Good news, everyone! Joe Zbiciak has uploaded a dump of the AL2[http://spatula-city.org/~im14u2c/sp0256-al2/] — and he even has Microchip Technology's permission! (I'm not sure if they would allow redistribution, though.) —[[User:Stuart Brady|Stuart Brady]] 23:26, 3 October 2007 (CEST)

::::::: BTW, are you ''sure'' that's the same ROM? The µSpeech has its own 2K ROM (containing Z80 code). —[[User:Stuart Brady|Stuart Brady]] 03:18, 6 October 2007 (CEST)

:::::::: Yes, this is the correct ROM. I assume the Currah has a ROM to add functionality under BASIC etc. There may also be some other software for the SSA-1 for the CPC, maybe even a Z80 one to provide RSX's like |say,"hello", can't remember. [[User:Executioner|Executioner]] 06:21, 8 October 2007 (CEST)

::::::::: You ''assume'' so? — I thought I just said that it ''does'' have such a ROM! :) I'm still not sure whether to believe you. What's the MD5SUM of the ROM in Spectaculator? Is it <tt>54db0ac274146f8c95f8fbd7bab62cdf</tt>, <tt>052f6af718337e35e76693723e1d73e3</tt>, or is it something else? —[[User:Stuart Brady|Stuart Brady]] 20:37, 8 October 2007 (CEST)

:::::::::: Yes, I ''assume'' that's what the Z80 code is for, you didn't say what the Z80 was used for :) The md5 is not the same as either of those above, and the ROM does not appear to be Z80 code. It may well be encrypted, but I don't really care since I've got the official download now and Joe was also good enough to provide a disassembly to go along with it :) [[User:Executioner|Executioner]] 03:13, 10 October 2007 (CEST)

== Rename ==

I feel as if I should probably fix this each time I leave a comment on this page, so here goes. Unless there are any objections, I'll rename the page to SP0256 and mention that it's often referred to as the "SPO256". (The datasheets certainly use an '0'.) —[[User:Stuart Brady|Stuart Brady]] 21:08, 8 October 2007 (CEST)

: The ARCHER datasheet definitely uses an 'O'. The GI datasheet is not a particularly good scan, and the font doesn't distinguish between the '0' and the 'O'. Look at the word 'ROM' and compare that to 'SPO256A' at the top of the page, they look the same. The last two pages of the GI datasheet show the chip in the circuit diagrams with as 'SPO256', the 'O' is identical to the word 'OUT', and slightly different to the '0' where it says '10,11,13'. The chip I have does not have any other '0' or 'O' printed on it to compare. This would suggest that it is supposed to be the letter O. [[User:Executioner|Executioner]] 03:03, 10 October 2007 (CEST)

:: Were you looking at [[:Image:Sp0256al2 datasheet.pdf|this copy]] of the Archer datasheet? If so, please do take a look at [http://support.radioshack.com/support_supplies/doc17/17517.htm these scans]. However, the GI datasheet would seem to be a more authoratative source. Any chance of a link to that? :) —[[User:Stuart Brady|Stuart Brady]] 17:54, 10 October 2007 (CEST)

::: Yes, I was looking at that, and now I see it's actually OCR'd. The GI datasheet is here [http://baec.tripod.com/datasheets/SPO256.pdf]. [[User:Executioner|Executioner]] 14:37, 11 October 2007 (CEST)

Talk:SP0256

2007-10-10T01:13:53Z

Executioner: /* SPO256 internal phoneme ROM */

Talk:SP0256

2007-10-10T01:12:19Z

Executioner: /* SPO256 internal phoneme ROM */

Can anyone find or get a copy of the internal ROM from the SPO256AL2? I want to emulate it - [[User:Executioner|Executioner]] 12:39, 1 September 2006 (CEST)

: Hmmm... I can probably manage that, i got the chip! But how to read out the ROM data? Can a simple program on the CPC do that or do i have to plug it in a romboard to read the data? (Have to check the pin configs i guess) --[[User:CPCLER|CPCLER]] 12:52, 1 September 2006 (CEST)

:: Is it an additional CPC OS rom? If yes, it's quite easy, I can send you a program for this. BTW, @CPCLER, please use the colon (:) at the beginning of your "talk"-text for correct formatting. -- [[User:Prodatron|Prodatron]] 13:46, 1 September 2006 (CEST)

::: (Sorry about the colons!!! New to this wiki stuff) No... I have uploaded some pictures of the SPO256 board, and there are clearly no additional ROM chips! so how to proceed, any way of reading the rom data via the SPO256 chip?

::: The software for the SSA1 has to be loaded from disc or tape (I will test this when i get a CPC up and running). I think the dk'tronics (also based on the SPO256) had at least the software on rom, dont know if it actually used the feature with a rom connected directly to the SPO256.

== SPO256 internal phoneme ROM ==

: No, this isn't a ROM for the CPC, it's the built-in phoneme ROM in the SPO256AL2, and it can only be read by using the serial output on the chip itself, which will require some hardware knowledge and the SPO datasheet. Yes, I do also have an SPO256 in my SSA-1, but no way to read it... Guess I'll have to desolder and pull the chip and connect it to my 8255 I/O board (no idea if that still works) :)

:: I'm looking for this ROM, but can't find it anywhere. Did you dump it? (BTW, I think the correct title is "SP'''0'''256".) —[[User:Stuart Brady|Stuart Brady]] 22:02, 1 October 2007 (CEST)

::: Nah, haven't dumped it yet. That'd mean finding it, and finding the IO board, desoldering it, attaching it to the IO board somehow and then figuring out how to read the serial data... I think there may be an image of the ROM as a resource in the Spectactulator ZX Spectrum emulator in a DLL, that may be an easier way to get it, but I have to check it's actually the original AL2 ROM :) btw, it is SPO256 according to the datasheet. [[User:Executioner|Executioner]] 01:27, 3 October 2007 (CEST)

:::: I think Spectaculator uses prerecorded samples. —[[User:Stuart Brady|Stuart Brady]] 17:06, 3 October 2007 (CEST)

::::: It does, but it also has the ROM as a resource in the DLL. It's 2K, same as the real one. [[User:Executioner|Executioner]] 22:14, 3 October 2007 (CEST)

:::::: Good news, everyone! Joe Zbiciak has uploaded a dump of the AL2[http://spatula-city.org/~im14u2c/sp0256-al2/] — and he even has Microchip Technology's permission! (I'm not sure if they would allow redistribution, though.) —[[User:Stuart Brady|Stuart Brady]] 23:26, 3 October 2007 (CEST)

::::::: BTW, are you ''sure'' that's the same ROM? The µSpeech has its own 2K ROM (containing Z80 code). —[[User:Stuart Brady|Stuart Brady]] 03:18, 6 October 2007 (CEST)

:::::::: Yes, this is the correct ROM. I assume the Currah has a ROM to add functionality under BASIC etc. There may also be some other software for the SSA-1 for the CPC, maybe even a Z80 one to provide RSX's like |say,"hello", can't remember. [[User:Executioner|Executioner]] 06:21, 8 October 2007 (CEST)

::::::::: You ''assume'' so? — I thought I just said that it ''does'' have such a ROM! :) I'm still not sure whether to believe you. What's the MD5SUM of the ROM in Spectaculator? Is it <tt>54db0ac274146f8c95f8fbd7bab62cdf</tt>, <tt>052f6af718337e35e76693723e1d73e3</tt>, or is it something else? —[[User:Stuart Brady|Stuart Brady]] 20:37, 8 October 2007 (CEST)

:::::::::: Yes, I ''assume'' that's what the Z80 code is for, you didn't say what the Z80 was used for :) The md5 is not the same as either of those above, and the ROM does not appear to be Z80 code. It may well be encrypted, but I don't really care since I've got the official download now and Joe was also good enough to provide a disassembly to go along with it :)

== Rename ==

I feel as if I should probably fix this each time I leave a comment on this page, so here goes. Unless there are any objections, I'll rename the page to SP0256 and mention that it's often referred to as the "SPO256". (The datasheets certainly use an '0'.) —[[User:Stuart Brady|Stuart Brady]] 21:08, 8 October 2007 (CEST)

: The ARCHER datasheet definitely uses an 'O'. The GI datasheet is not a particularly good scan, and the font doesn't distinguish between the '0' and the 'O'. Look at the word 'ROM' and compare that to 'SPO256A' at the top of the page, they look the same. The last two pages of the GI datasheet show the chip in the circuit diagrams with as 'SPO256', the 'O' is identical to the word 'OUT', and slightly different to the '0' where it says '10,11,13'. The chip I have does not have any other '0' or 'O' printed on it to compare. This would suggest that it is supposed to be the letter O.

Talk:SP0256

2007-10-10T01:03:50Z

Executioner: /* Rename */ I do object

Can anyone find or get a copy of the internal ROM from the SPO256AL2? I want to emulate it - [[User:Executioner|Executioner]] 12:39, 1 September 2006 (CEST)

: Hmmm... I can probably manage that, i got the chip! But how to read out the ROM data? Can a simple program on the CPC do that or do i have to plug it in a romboard to read the data? (Have to check the pin configs i guess) --[[User:CPCLER|CPCLER]] 12:52, 1 September 2006 (CEST)

:: Is it an additional CPC OS rom? If yes, it's quite easy, I can send you a program for this. BTW, @CPCLER, please use the colon (:) at the beginning of your "talk"-text for correct formatting. -- [[User:Prodatron|Prodatron]] 13:46, 1 September 2006 (CEST)

::: (Sorry about the colons!!! New to this wiki stuff) No... I have uploaded some pictures of the SPO256 board, and there are clearly no additional ROM chips! so how to proceed, any way of reading the rom data via the SPO256 chip?

::: The software for the SSA1 has to be loaded from disc or tape (I will test this when i get a CPC up and running). I think the dk'tronics (also based on the SPO256) had at least the software on rom, dont know if it actually used the feature with a rom connected directly to the SPO256.

== SPO256 internal phoneme ROM ==

: No, this isn't a ROM for the CPC, it's the built-in phoneme ROM in the SPO256AL2, and it can only be read by using the serial output on the chip itself, which will require some hardware knowledge and the SPO datasheet. Yes, I do also have an SPO256 in my SSA-1, but no way to read it... Guess I'll have to desolder and pull the chip and connect it to my 8255 I/O board (no idea if that still works) :)

:: I'm looking for this ROM, but can't find it anywhere. Did you dump it? (BTW, I think the correct title is "SP'''0'''256".) —[[User:Stuart Brady|Stuart Brady]] 22:02, 1 October 2007 (CEST)

::: Nah, haven't dumped it yet. That'd mean finding it, and finding the IO board, desoldering it, attaching it to the IO board somehow and then figuring out how to read the serial data... I think there may be an image of the ROM as a resource in the Spectactulator ZX Spectrum emulator in a DLL, that may be an easier way to get it, but I have to check it's actually the original AL2 ROM :) btw, it is SPO256 according to the datasheet. [[User:Executioner|Executioner]] 01:27, 3 October 2007 (CEST)

:::: I think Spectaculator uses prerecorded samples. —[[User:Stuart Brady|Stuart Brady]] 17:06, 3 October 2007 (CEST)

::::: It does, but it also has the ROM as a resource in the DLL. It's 2K, same as the real one. [[User:Executioner|Executioner]] 22:14, 3 October 2007 (CEST)

:::::: Good news, everyone! Joe Zbiciak has uploaded a dump of the AL2[http://spatula-city.org/~im14u2c/sp0256-al2/] — and he even has Microchip Technology's permission! (I'm not sure if they would allow redistribution, though.) —[[User:Stuart Brady|Stuart Brady]] 23:26, 3 October 2007 (CEST)

::::::: BTW, are you ''sure'' that's the same ROM? The µSpeech has its own 2K ROM (containing Z80 code). —[[User:Stuart Brady|Stuart Brady]] 03:18, 6 October 2007 (CEST)

:::::::: Yes, this is the correct ROM. I assume the Currah has a ROM to add functionality under BASIC etc. There may also be some other software for the SSA-1 for the CPC, maybe even a Z80 one to provide RSX's like |say,"hello", can't remember. [[User:Executioner|Executioner]] 06:21, 8 October 2007 (CEST)

::::::::: You ''assume'' so? — I thought I just said that it ''does'' have such a ROM! :) I'm still not sure whether to believe you. What's the MD5SUM of the ROM in Spectaculator? Is it <tt>54db0ac274146f8c95f8fbd7bab62cdf</tt>, <tt>052f6af718337e35e76693723e1d73e3</tt>, or is it something else? —[[User:Stuart Brady|Stuart Brady]] 20:37, 8 October 2007 (CEST)

== Rename ==

I feel as if I should probably fix this each time I leave a comment on this page, so here goes. Unless there are any objections, I'll rename the page to SP0256 and mention that it's often referred to as the "SPO256". (The datasheets certainly use an '0'.) —[[User:Stuart Brady|Stuart Brady]] 21:08, 8 October 2007 (CEST)

: The ARCHER datasheet definitely uses an 'O'. The GI datasheet is not a particularly good scan, and the font doesn't distinguish between the '0' and the 'O'. Look at the word 'ROM' and compare that to 'SPO256A' at the top of the page, they look the same. The last two pages of the GI datasheet show the chip in the circuit diagrams with as 'SPO256', the 'O' is identical to the word 'OUT', and slightly different to the '0' where it says '10,11,13'. The chip I have does not have any other '0' or 'O' printed on it to compare. This would suggest that it is supposed to be the letter O.

Talk:SP0256

2007-10-08T04:21:33Z

Executioner: /* SPO256 internal phoneme ROM */

Talk:SP0256

2007-10-08T04:21:04Z

Executioner: /* SPO256 internal phoneme ROM */

Talk:SP0256

2007-10-03T20:14:41Z

Executioner: /* SPO256 internal phoneme ROM */

Talk:SP0256

2007-10-02T23:30:47Z

Executioner: /* SPO256 internal phoneme ROM */

Talk:SP0256

2007-10-02T23:27:40Z

Executioner: /* SPO256 internal phoneme ROM */

Programming:Display and update Scores

2007-09-21T04:18:37Z

Executioner: Finished the page

== Methods for Storing, Displaying and Updating Scores ==

There are a number of methods for storing a Score in memory, here are a few examples:<br>

=== A Single Word ===
This is the simplest and smallest method for storing the score in memory, but it has a couple of disadvantages over some other methods. It can only hold a score up to 65535 (although you can add an extra '0' or two on the display to make that 655350 or 6553500), converting it to digits for display requires a relatively slow algorithm, and adding extra lives every 10000 points for example can take a complex routine. The advantage of using a straight Word is that the maths required to add points to the score is very simple and fast.<br>
<br>
To define the score:
<pre>
.score dw 0
</pre>
To add some points (in BC):
<pre>
.add_score_bc
ld hl,(score)
add hl,bc
ld (score),hl
ret
</pre>
To display the score requires converting to a decimal:
<pre>
.show_score
ld hl,score
ld bc,-10000
call show_digit
ld bc,-1000
call show_digit
ld bc,-100
call show_digit
ld bc,-10
call show_digit
ld a,l
add '0'
jp show_char

.show_digit
ld a,'0' - 1
.inc_digit
inc a
add hl,bc
jr nc,inc_digit
or a
sbc hl,bc
add '0'
jp show_char ; This assumes the show_char routine doesn't corrupt HL
</pre>
Checking for every 10000 points is complicated, this would normally done in the add_score routine, and I'm not going to write the code. It would however, be quite simple to add an extra life every multiple of 256 units (eg. 10240 points) by checking the most significant byte. eg:
<pre>
.add_score_bc
ld hl,(score)
ld a,h
add hl,bc
ld (score),hl
sub h
cp 2
ret c
ld hl,lives
inc (hl)
ret
</pre>

=== A Double Word ===
Like the above method, this provides a simple and efficient way to store and add points, but the routine required to convert the number to decimal for display is even more difficult, as is the extra lives every 10000 points.<br>
<br>
To define the score:
<pre>
.score ds 4
</pre>
To add BC points to the score:
<pre>
.add_score_bc
ld hl,(score)
add hl,bc
ld (score),hl
ret nc
ld hl,(score + 2)
inc hl
ld (score + 2),hl
ret
</pre>
Displaying the score is much more tricky since it involves a lot of DWord subtractions etc. Most Z80 assemblers (including WinAPE) can't handle DWord values, so you need to get your calculator out to figure out what the values are to subtract for successive digits. The score can go as high as 4294967295, but I wouldn't recommend doing the maths for all possible digits. The code to display a DWord value is too complicated for this document.

=== A Single BCD Word ===
This is similar to the above method, but the score is treated as Binary Coded Decimal. It's main disadvantage is that it can hold even less values than the single Word, restricting the score to 10000 possible combinations (one again with extra zeroes if required). Depending on the type of game and difficulty, this could be a good method to use. It's easy to store in memory and pass around, displaying and adding points are all relatively easy.<br>
<br>
To define the score is exactly the same as for a Single Word:
<pre>
.score dw 0
</pre>
Adding BC points is also fairly straightforward (here with the extra life check every 1000 units):
<pre>
.add_score_BC
ld hl,(score)
ld d,h
ld a,l
add c
daa
ld l,a
ld a,h
adc b
daa
ld h,a
ld (score),hl
sub d
cp #10
ret c
ld hl,lives
inc (hl)
ret
</pre>
And the routine to display the score:
<pre>
.show_score
ld hl,(score)
.bcd_hl
ld a,h
call bcd_a
ld a,l
.bcd_a
ld h,a
rra:rra:rra:rra
and #0f
add '0'
call show_char
ld a,h
and #0f
add '0'
jp show_char
</pre>

=== A Double BCD Word ===
This is actually one of the best methods of storing and displaying a score since the maths and display methods remain fairly simple, and your score can now hold up to 8 digits. Luckily the Z80 has just enough fast 16 bit registers (ie. Non-index registers) to be able to handle all the things you require.<br>
<br>
To define the score:
<pre>
.score ds 4
</pre>
To add BC points to the score (here with the extra life check every 10000 units):
<pre>
ld hl,(score)
ld a,l
add c
daa
ld l,a
ld a,h
adc b
daa
ld h,a
ld (score),hl
ret nc
ld hl,lives
inc (hl)
ld hl,(score + 2)
ld a,l
add 1
daa
ld l,a
ld a,h
adc 0
daa
ld h,a
ld (score + 2),hl
ret
</pre>
Displaying the score is relatively simple too, using the same routine as above:
<pre>
.show_score
ld hl,(score + 2)
call bcd_hl
ld hl,(score)
.bcd_hl
.
.
.
</pre>

=== Multiple BCD Bytes ===
This is very similar to the above method, but the values are stored and manipulated in a slightly different way. With this method, you can determine exactly how many digits you require. Maths is pretty straightforward, as is extra lives and display. One advantage this method has is that if you want to add 100 to the score, you don't have to add the two zeroes since you can start at the second BCD digit. With this method, you can store the score either little-endian (least significant bytes first) or big-endian. Big-endian has the advantage that you can read the score in a memory editor left-to-right. eg. 1234500 points is displayed as 01 23 45 00. This can make debugging easier.<br>
<br>
To define the score (6 digits):
<pre>
.score ds 3
</pre>
To add C points to the score:
<pre>
.add_score_c
ld b,2 ; This is the number of score bytes - 1
ld hl,score + 2
.add_part
ld a,(hl)
add c
daa
ld (hl),a
ret nc
.add_loop
dec hl
ld a,(hl)
adc 0
daa
ld (hl),a
djnz add_loop
ret
</pre>
Displaying the score is relatively simple too, using the same routine as above:
<pre>
.show_score
ld hl,score
ld b,3
.show_loop
ld a,(hl)
inc hl
call bcd_a
djnz show_loop
ret
</pre>

=== One Byte per Digit ===
This is one of the simplest methods of storing and displaying scores. Its main disadvantages are that it uses slightly more memory and can't usually be held in registers, so must be copied around (eg. for high score tables). Its main advantages are that the scores are easy to display, update and can be easily read in a memory editor.<br>
<br>
To define the score (6 digits):
<pre>
.score ds 6
</pre>
To add a value to the score, you usually decide which digit you wish to add to, then start at that digit, in this routine, B holds the value to add, C is the digit number.
<pre>
.add_score_b_c
ld a,b
ld hl,score - 2560
ld b,10
add hl,bc
add (hl)
ld (hl),a
sub b
ret c
ld (hl),a
inc c
.add_loop
dec c
ret z
dec hl ;; You can test the value in C here to determine when to increment lives (eg. ld a,c:cp 2:call z,inc_lives)
inc (hl)
ld a,(hl)
sub b
ret nz
ld (hl),a
jr add_loop
</pre>
Displaying the score is really easy. All you have to do is add the value of the '0' character to each digit:
<pre>
.show_score
ld hl,score
ld b,6
.show_loop
ld a,(hl)
inc hl
add '0'
call show_char
djnz show_loop
ret
</pre>

=== One character per digit ===
This method is identical to the one above, but you actually store the character representation of each digit, meaning you don't have to add the '0' value to each digit for display. In this case, you could use a generic string display routine to show the score. In this example I'm using a zero terminated string.<br>
<br>
To define the score:
<pre>
.score db '000000',0
</pre>
This add routine can only increment a particular digit, simplifying it somewhat (eg. Add 1, 10, 100, 1000 to the score). L holds the offset. I've also used another trick here, by assuming the score is page-aligned.
<pre>
.inc_score
ld h,score / 256
.next_digit
inc (hl)
ld a,(hl)
cp '9' + 1
ret nz
ld (hl),'0'
dec l ; You can test the value in L here to determine when to increment lives (eg. ld a,l:cp 2:call z,inc_lives)
jp p,next_digit
ret
</pre>
And the routine to display the score is a simple zero terminated string printing routine, just call it with HL pointing to <b>score</b>:
<pre>
.print_hl
ld a,(hl)
inc hl
or a
ret z
call show_char
jr print_hl
</pre>

== Some More Information ==
Each of these routines has its advantages and disadvantages, and it usually depends on the type of game you're writing or your own preferences which one you pick to use. A few questions you should consider before deciding which routines to use are:<br>
<br>
<li>What's the maximum score in my game, or how big would you like the score before it clocks over?
<li>How many times in a cycle (eg. frame) does the score get incremented?
<li>Will the score be redisplayed each time it's updated, once every cycle, or only rarely (eg. in between turns)?
<li>How fast is the character printing routine?<br>
<li>Is there going to be a high score shown or a high score table in the game?<br>
<br>
Depending on the answers to these questions you should be able to pick the best routine. For example, it's almost impossible in Frogger to get past 20,000 points, and the score only updates in multiples of 10 points so for this the Single BCD Word method was used with an extra '0' appended to the end. The score would clock after 99,990 points. It's also easy with this method to compare it with the high score each time points are added. Frogger displays both the current player's score and the high score every frame using a very fast character printing routine.

[[User:Executioner|Executioner]] 06:18, 21 September 2007 (CEST)

Programming:Display and update Scores

2007-09-20T23:33:11Z

Executioner: /* Multiple BCD Bytes */

== Methods for Storing Scores in Memory ==

There are a number of methods for storing a Score in memory, here are a few examples:<br>
=== A Single Word ===
This is the simplest and smallest method for storing the score in memory, but it has a couple of disadvantages over some other methods. It can only hold a score up to 65535 (although you can add an extra '0' or two on the display to make that 655350 or 6553500), converting it to digits for display requires a relatively slow algorithm, and adding extra lives every 10000 points for example can take a complex routine. The advantage of using a straight Word is that the maths required to add points to the score is very simple and fast.<br>
<br>
To define the score:
<pre>
.score dw 0
</pre>
To add some points (in BC):
<pre>
.add_score_bc
ld hl,(score)
add hl,bc
ld (score),hl
ret
</pre>
To display the score requires converting to a decimal:
<pre>
.show_score
ld hl,score
ld bc,-10000
call show_digit
ld bc,-1000
call show_digit
ld bc,-100
call show_digit
ld bc,-10
call show_digit
ld a,l
add '0'
jp show_char

.show_digit
ld a,'0' - 1
.inc_digit
inc a
add hl,bc
jr nc,inc_digit
or a
sbc hl,bc
add '0'
jp show_char ; This assumes the show_char routine doesn't corrupt HL
</pre>
Checking for every 10000 points is complicated, this would normally done in the add_score routine, and I'm not going to write the code. It would however, be quite simple to add an extra life every multiple of 256 units (eg. 10240 points) by checking the most significant byte. eg:
<pre>
.add_score_bc
ld hl,(score)
ld a,h
add hl,bc
ld (score),hl
sub h
cp 2
ret c
ld hl,lives
inc (hl)
ret
</pre>

=== A Double Word ===
Like the above method, this provides a simple and efficient way to store and add points, but the routine required to convert the number to decimal for display is even more difficult, as is the extra lives every 10000 points.<br>
<br>
To define the score:
<pre>
.score ds 4
</pre>
To add BC points to the score:
<pre>
.add_score_bc
ld hl,(score)
add hl,bc
ld (score),hl
ret nc
ld hl,(score + 2)
inc hl
ld (score + 2),hl
ret
</pre>
Displaying the score is much more tricky since it involves a lot of DWord subtractions etc. Most Z80 assemblers (including WinAPE) can't handle DWord values, so you need to get your calculator out to figure out what the values are to subtract for successive digits. The score can go as high as 4294967295, but I wouldn't recommend doing the maths for all possible digits. The code to display a DWord value is too complicated for this document.

=== A Single BCD Word ===
This is similar to the above method, but the score is treated as Binary Coded Decimal. It's main disadvantage is that it can hold even less values than the single Word, restricting the score to 10000 possible combinations (one again with extra zeroes if required). Depending on the type of game and difficulty, this could be a good method to use. It's easy to store in memory and pass around, displaying and adding points are all relatively easy.<br>
<br>
To define the score is exactly the same as for a Single Word:
<pre>
.score dw 0
</pre>
Adding BC points is also fairly straightforward (here with the extra life check every 1000 units):
<pre>
.add_score_BC
ld hl,(score)
ld d,h
ld a,l
add c
daa
ld l,a
ld a,h
adc b
daa
ld h,a
ld (score),hl
sub d
cp #10
ret c
ld hl,lives
inc (hl)
ret
</pre>
And the routine to display the score:
<pre>
.show_score
ld hl,(score)
.bcd_hl
ld a,h
call bcd_a
ld a,l
.bcd_a
ld h,a
rra:rra:rra:rra
and #0f
add '0'
call show_char
ld a,h
and #0f
add '0'
jp show_char
</pre>

=== A Double BCD Word ===
This is actually one of the best methods of storing and displaying a score since the maths and display methods remain fairly simple, and your score can now hold up to 8 digits. Luckily the Z80 has just enough fast 16 bit registers (ie. Non-index registers) to be able to handle all the things you require.<br>
<br>
To define the score:
<pre>
.score ds 4
</pre>
To add BC points to the score (here with the extra life check every 10000 units):
<pre>
ld hl,(score)
ld a,l
add c
daa
ld l,a
ld a,h
adc b
daa
ld h,a
ld (score),hl
ret nc
ld hl,lives
inc (hl)
ld hl,(score + 2)
ld a,l
add 1
daa
ld l,a
ld a,h
adc 0
daa
ld h,a
ld (score + 2),hl
ret
</pre>
Displaying the score is relatively simple too, using the same routine as above:
<pre>
.show_score
ld hl,(score + 2)
call bcd_hl
ld hl,(score)
.bcd_hl
.
.
.
</pre>

=== Multiple BCD Bytes ===
This is very similar to the above method, but the values are stored and manipulated in a slightly different way. With this method, you can determine exactly how many digits you require. Maths is pretty straightforward, as is extra lives and display. One advantage this method has is that if you want to add 100 to the score, you don't have to add the two zeroes since you can start at the second BCD digit. With this method, you can store the score either little-endian (least significant bytes first) or big-endian. Big-endian has the advantage that you can read the score in a memory editor left-to-right. eg. 1234500 points is displayed as 01 23 45 00. This can make debugging easier.<br>
<br>
To define the score (6 digits):
<pre>
.score ds 3
</pre>
To add C points to the score:
<pre>
.add_score_c
ld b,2 ; This is the number of score bytes - 1
ld hl,score + 2
.add_part
ld a,(hl)
add c
daa
ld (hl),a
ret nc
.add_loop
dec hl
ld a,(hl)
adc 0
daa
ld (hl),a
djnz add_loop
ret
</pre>
Displaying the score is relatively simple too, using the same routine as above:
<pre>
.show_score
ld hl,score
ld b,3
.show_loop
ld a,(hl)
inc hl
call bcd_a
djnz show_loop
ret
</pre>

More to come...

[[User:Executioner|Executioner]] 01:27, 21 September 2007 (CEST)

Programming:Display and update Scores

2007-09-20T23:32:15Z

Executioner: /* Multiple BCD Bytes */

== Methods for Storing Scores in Memory ==

There are a number of methods for storing a Score in memory, here are a few examples:<br>
=== A Single Word ===
This is the simplest and smallest method for storing the score in memory, but it has a couple of disadvantages over some other methods. It can only hold a score up to 65535 (although you can add an extra '0' or two on the display to make that 655350 or 6553500), converting it to digits for display requires a relatively slow algorithm, and adding extra lives every 10000 points for example can take a complex routine. The advantage of using a straight Word is that the maths required to add points to the score is very simple and fast.<br>
<br>
To define the score:
<pre>
.score dw 0
</pre>
To add some points (in BC):
<pre>
.add_score_bc
ld hl,(score)
add hl,bc
ld (score),hl
ret
</pre>
To display the score requires converting to a decimal:
<pre>
.show_score
ld hl,score
ld bc,-10000
call show_digit
ld bc,-1000
call show_digit
ld bc,-100
call show_digit
ld bc,-10
call show_digit
ld a,l
add '0'
jp show_char

.show_digit
ld a,'0' - 1
.inc_digit
inc a
add hl,bc
jr nc,inc_digit
or a
sbc hl,bc
add '0'
jp show_char ; This assumes the show_char routine doesn't corrupt HL
</pre>
Checking for every 10000 points is complicated, this would normally done in the add_score routine, and I'm not going to write the code. It would however, be quite simple to add an extra life every multiple of 256 units (eg. 10240 points) by checking the most significant byte. eg:
<pre>
.add_score_bc
ld hl,(score)
ld a,h
add hl,bc
ld (score),hl
sub h
cp 2
ret c
ld hl,lives
inc (hl)
ret
</pre>

=== A Double Word ===
Like the above method, this provides a simple and efficient way to store and add points, but the routine required to convert the number to decimal for display is even more difficult, as is the extra lives every 10000 points.<br>
<br>
To define the score:
<pre>
.score ds 4
</pre>
To add BC points to the score:
<pre>
.add_score_bc
ld hl,(score)
add hl,bc
ld (score),hl
ret nc
ld hl,(score + 2)
inc hl
ld (score + 2),hl
ret
</pre>
Displaying the score is much more tricky since it involves a lot of DWord subtractions etc. Most Z80 assemblers (including WinAPE) can't handle DWord values, so you need to get your calculator out to figure out what the values are to subtract for successive digits. The score can go as high as 4294967295, but I wouldn't recommend doing the maths for all possible digits. The code to display a DWord value is too complicated for this document.

=== A Single BCD Word ===
This is similar to the above method, but the score is treated as Binary Coded Decimal. It's main disadvantage is that it can hold even less values than the single Word, restricting the score to 10000 possible combinations (one again with extra zeroes if required). Depending on the type of game and difficulty, this could be a good method to use. It's easy to store in memory and pass around, displaying and adding points are all relatively easy.<br>
<br>
To define the score is exactly the same as for a Single Word:
<pre>
.score dw 0
</pre>
Adding BC points is also fairly straightforward (here with the extra life check every 1000 units):
<pre>
.add_score_BC
ld hl,(score)
ld d,h
ld a,l
add c
daa
ld l,a
ld a,h
adc b
daa
ld h,a
ld (score),hl
sub d
cp #10
ret c
ld hl,lives
inc (hl)
ret
</pre>
And the routine to display the score:
<pre>
.show_score
ld hl,(score)
.bcd_hl
ld a,h
call bcd_a
ld a,l
.bcd_a
ld h,a
rra:rra:rra:rra
and #0f
add '0'
call show_char
ld a,h
and #0f
add '0'
jp show_char
</pre>

=== A Double BCD Word ===
This is actually one of the best methods of storing and displaying a score since the maths and display methods remain fairly simple, and your score can now hold up to 8 digits. Luckily the Z80 has just enough fast 16 bit registers (ie. Non-index registers) to be able to handle all the things you require.<br>
<br>
To define the score:
<pre>
.score ds 4
</pre>
To add BC points to the score (here with the extra life check every 10000 units):
<pre>
ld hl,(score)
ld a,l
add c
daa
ld l,a
ld a,h
adc b
daa
ld h,a
ld (score),hl
ret nc
ld hl,lives
inc (hl)
ld hl,(score + 2)
ld a,l
add 1
daa
ld l,a
ld a,h
adc 0
daa
ld h,a
ld (score + 2),hl
ret
</pre>
Displaying the score is relatively simple too, using the same routine as above:
<pre>
.show_score
ld hl,(score + 2)
call bcd_hl
ld hl,(score)
.bcd_hl
.
.
.
</pre>

=== Multiple BCD Bytes ===
This is very similar to the above method, but the values are stored and manipulated in a slightly different way. With this method, you can determine exactly how many digits you require. Maths is pretty straightforward, as is extra lives and display. One advantage this method has is that if you want to add 100 to the score, you don't have to add the two zeroes since you can start at the second BCD digit. With this method, you can store the score either little-endian (least significant bytes first) or big-endian. Big-endian has the advantage that you can read the score in a memory editor left-to-right. eg. 1234500 points is displayed as 01 23 45 00. This can make debugging easier.<br>
<br>
To define the score (6 digits):
<pre>
.score ds 3
</pre>
To add C points to the score:
<pre>
ld b,2 ; This is the number of score bytes - 1
.add_part
ld hl,score + 2
ld a,(hl)
add c
daa
ld (hl),a
ret nc
.add_loop
dec hl
ld a,(hl)
adc 0
daa
ld (hl),a
djnz add_loop
ret
</pre>
Displaying the score is relatively simple too, using the same routine as above:
<pre>
.show_score
ld hl,score
ld b,3
.show_loop
ld a,(hl)
inc hl
call bcd_a
djnz show_loop
ret
</pre>

More to come...

[[User:Executioner|Executioner]] 01:27, 21 September 2007 (CEST)

Programming:Display and update Scores

2007-09-20T23:31:30Z

Executioner: /* Multiple BCD Bytes */

== Methods for Storing Scores in Memory ==

There are a number of methods for storing a Score in memory, here are a few examples:<br>
=== A Single Word ===
This is the simplest and smallest method for storing the score in memory, but it has a couple of disadvantages over some other methods. It can only hold a score up to 65535 (although you can add an extra '0' or two on the display to make that 655350 or 6553500), converting it to digits for display requires a relatively slow algorithm, and adding extra lives every 10000 points for example can take a complex routine. The advantage of using a straight Word is that the maths required to add points to the score is very simple and fast.<br>
<br>
To define the score:
<pre>
.score dw 0
</pre>
To add some points (in BC):
<pre>
.add_score_bc
ld hl,(score)
add hl,bc
ld (score),hl
ret
</pre>
To display the score requires converting to a decimal:
<pre>
.show_score
ld hl,score
ld bc,-10000
call show_digit
ld bc,-1000
call show_digit
ld bc,-100
call show_digit
ld bc,-10
call show_digit
ld a,l
add '0'
jp show_char

.show_digit
ld a,'0' - 1
.inc_digit
inc a
add hl,bc
jr nc,inc_digit
or a
sbc hl,bc
add '0'
jp show_char ; This assumes the show_char routine doesn't corrupt HL
</pre>
Checking for every 10000 points is complicated, this would normally done in the add_score routine, and I'm not going to write the code. It would however, be quite simple to add an extra life every multiple of 256 units (eg. 10240 points) by checking the most significant byte. eg:
<pre>
.add_score_bc
ld hl,(score)
ld a,h
add hl,bc
ld (score),hl
sub h
cp 2
ret c
ld hl,lives
inc (hl)
ret
</pre>

=== A Double Word ===
Like the above method, this provides a simple and efficient way to store and add points, but the routine required to convert the number to decimal for display is even more difficult, as is the extra lives every 10000 points.<br>
<br>
To define the score:
<pre>
.score ds 4
</pre>
To add BC points to the score:
<pre>
.add_score_bc
ld hl,(score)
add hl,bc
ld (score),hl
ret nc
ld hl,(score + 2)
inc hl
ld (score + 2),hl
ret
</pre>
Displaying the score is much more tricky since it involves a lot of DWord subtractions etc. Most Z80 assemblers (including WinAPE) can't handle DWord values, so you need to get your calculator out to figure out what the values are to subtract for successive digits. The score can go as high as 4294967295, but I wouldn't recommend doing the maths for all possible digits. The code to display a DWord value is too complicated for this document.

=== A Single BCD Word ===
This is similar to the above method, but the score is treated as Binary Coded Decimal. It's main disadvantage is that it can hold even less values than the single Word, restricting the score to 10000 possible combinations (one again with extra zeroes if required). Depending on the type of game and difficulty, this could be a good method to use. It's easy to store in memory and pass around, displaying and adding points are all relatively easy.<br>
<br>
To define the score is exactly the same as for a Single Word:
<pre>
.score dw 0
</pre>
Adding BC points is also fairly straightforward (here with the extra life check every 1000 units):
<pre>
.add_score_BC
ld hl,(score)
ld d,h
ld a,l
add c
daa
ld l,a
ld a,h
adc b
daa
ld h,a
ld (score),hl
sub d
cp #10
ret c
ld hl,lives
inc (hl)
ret
</pre>
And the routine to display the score:
<pre>
.show_score
ld hl,(score)
.bcd_hl
ld a,h
call bcd_a
ld a,l
.bcd_a
ld h,a
rra:rra:rra:rra
and #0f
add '0'
call show_char
ld a,h
and #0f
add '0'
jp show_char
</pre>

=== A Double BCD Word ===
This is actually one of the best methods of storing and displaying a score since the maths and display methods remain fairly simple, and your score can now hold up to 8 digits. Luckily the Z80 has just enough fast 16 bit registers (ie. Non-index registers) to be able to handle all the things you require.<br>
<br>
To define the score:
<pre>
.score ds 4
</pre>
To add BC points to the score (here with the extra life check every 10000 units):
<pre>
ld hl,(score)
ld a,l
add c
daa
ld l,a
ld a,h
adc b
daa
ld h,a
ld (score),hl
ret nc
ld hl,lives
inc (hl)
ld hl,(score + 2)
ld a,l
add 1
daa
ld l,a
ld a,h
adc 0
daa
ld h,a
ld (score + 2),hl
ret
</pre>
Displaying the score is relatively simple too, using the same routine as above:
<pre>
.show_score
ld hl,(score + 2)
call bcd_hl
ld hl,(score)
.bcd_hl
.
.
.
</pre>

=== Multiple BCD Bytes ===
This is very similar to the above method, but the values are stored and manipulated in a slightly different way. With this method, you can determine exactly how many digits you require. Maths is pretty straightforward, as is extra lives and display. One advantage this method has is that if you want to add 100 to the score, you don't have to add the two zeroes since you can start at the second BCD digit. With this method, you can store the score either little-endian (least significant bytes first) or big-endian. Big-endian has the advantage that you can read the score in a memory editor left-to-right. eg. 1234500 points is displayed as 01 23 45 00. This can make debugging easier.<br>
<br>
To define the score (6 digits):
<pre>
.score ds 3
</pre>
To add C points to the score:
<pre>
ld b,3
.add_part
ld hl,score + 2
ld a,(hl)
add c
daa
ld (hl),a
ret nc
.add_loop
dec hl
ld a,(hl)
adc 0
daa
ld (hl),a
djnz add_loop
ret
</pre>
Displaying the score is relatively simple too, using the same routine as above:
<pre>
.show_score
ld hl,score
ld b,3
.show_loop
ld a,(hl)
inc hl
call bcd_a
djnz show_loop
ret
</pre>

More to come...

[[User:Executioner|Executioner]] 01:27, 21 September 2007 (CEST)

Programming:Display and update Scores

2007-09-20T23:30:15Z

Executioner: /* Multiple BCD Bytes */

== Methods for Storing Scores in Memory ==

There are a number of methods for storing a Score in memory, here are a few examples:<br>
=== A Single Word ===
This is the simplest and smallest method for storing the score in memory, but it has a couple of disadvantages over some other methods. It can only hold a score up to 65535 (although you can add an extra '0' or two on the display to make that 655350 or 6553500), converting it to digits for display requires a relatively slow algorithm, and adding extra lives every 10000 points for example can take a complex routine. The advantage of using a straight Word is that the maths required to add points to the score is very simple and fast.<br>
<br>
To define the score:
<pre>
.score dw 0
</pre>
To add some points (in BC):
<pre>
.add_score_bc
ld hl,(score)
add hl,bc
ld (score),hl
ret
</pre>
To display the score requires converting to a decimal:
<pre>
.show_score
ld hl,score
ld bc,-10000
call show_digit
ld bc,-1000
call show_digit
ld bc,-100
call show_digit
ld bc,-10
call show_digit
ld a,l
add '0'
jp show_char

.show_digit
ld a,'0' - 1
.inc_digit
inc a
add hl,bc
jr nc,inc_digit
or a
sbc hl,bc
add '0'
jp show_char ; This assumes the show_char routine doesn't corrupt HL
</pre>
Checking for every 10000 points is complicated, this would normally done in the add_score routine, and I'm not going to write the code. It would however, be quite simple to add an extra life every multiple of 256 units (eg. 10240 points) by checking the most significant byte. eg:
<pre>
.add_score_bc
ld hl,(score)
ld a,h
add hl,bc
ld (score),hl
sub h
cp 2
ret c
ld hl,lives
inc (hl)
ret
</pre>

=== A Double Word ===
Like the above method, this provides a simple and efficient way to store and add points, but the routine required to convert the number to decimal for display is even more difficult, as is the extra lives every 10000 points.<br>
<br>
To define the score:
<pre>
.score ds 4
</pre>
To add BC points to the score:
<pre>
.add_score_bc
ld hl,(score)
add hl,bc
ld (score),hl
ret nc
ld hl,(score + 2)
inc hl
ld (score + 2),hl
ret
</pre>
Displaying the score is much more tricky since it involves a lot of DWord subtractions etc. Most Z80 assemblers (including WinAPE) can't handle DWord values, so you need to get your calculator out to figure out what the values are to subtract for successive digits. The score can go as high as 4294967295, but I wouldn't recommend doing the maths for all possible digits. The code to display a DWord value is too complicated for this document.

=== A Single BCD Word ===
This is similar to the above method, but the score is treated as Binary Coded Decimal. It's main disadvantage is that it can hold even less values than the single Word, restricting the score to 10000 possible combinations (one again with extra zeroes if required). Depending on the type of game and difficulty, this could be a good method to use. It's easy to store in memory and pass around, displaying and adding points are all relatively easy.<br>
<br>
To define the score is exactly the same as for a Single Word:
<pre>
.score dw 0
</pre>
Adding BC points is also fairly straightforward (here with the extra life check every 1000 units):
<pre>
.add_score_BC
ld hl,(score)
ld d,h
ld a,l
add c
daa
ld l,a
ld a,h
adc b
daa
ld h,a
ld (score),hl
sub d
cp #10
ret c
ld hl,lives
inc (hl)
ret
</pre>
And the routine to display the score:
<pre>
.show_score
ld hl,(score)
.bcd_hl
ld a,h
call bcd_a
ld a,l
.bcd_a
ld h,a
rra:rra:rra:rra
and #0f
add '0'
call show_char
ld a,h
and #0f
add '0'
jp show_char
</pre>

=== A Double BCD Word ===
This is actually one of the best methods of storing and displaying a score since the maths and display methods remain fairly simple, and your score can now hold up to 8 digits. Luckily the Z80 has just enough fast 16 bit registers (ie. Non-index registers) to be able to handle all the things you require.<br>
<br>
To define the score:
<pre>
.score ds 4
</pre>
To add BC points to the score (here with the extra life check every 10000 units):
<pre>
ld hl,(score)
ld a,l
add c
daa
ld l,a
ld a,h
adc b
daa
ld h,a
ld (score),hl
ret nc
ld hl,lives
inc (hl)
ld hl,(score + 2)
ld a,l
add 1
daa
ld l,a
ld a,h
adc 0
daa
ld h,a
ld (score + 2),hl
ret
</pre>
Displaying the score is relatively simple too, using the same routine as above:
<pre>
.show_score
ld hl,(score + 2)
call bcd_hl
ld hl,(score)
.bcd_hl
.
.
.
</pre>

=== Multiple BCD Bytes ===
This is very similar to the above method, but the values are stored and manipulated in a slightly different way. With this method, you can determine exactly how many digits you require. Maths is pretty straightforward, as is extra lives and display. One advantage this method has is that if you want to add 100 to the score, you don't have to add the two zeroes since you can start at the second BCD digit. With this method, you can store the score either little-endian (least significant bytes first) or big-endian. Big-endian has the advantage that you can read the score in a memory editor left-to-right. eg. 1234500 points is displayed as 01 23 45 00. This can make debugging easier.<br>
<br>
To define the score (6 digits):
<pre>
.score ds 3
</pre>
To add C points to the score:
<pre>
ld b,3
.add_part
ld hl,score + 2
ld a,(hl)
add c
daa
ld (hl),a
ret nc
.add_loop
dec hl
ld a,(hl)
adc 0
daa
ld (hl),a
djnz add_loop
ret
</pre>
Displaying the score is relatively simple too, using the same routine as above:
<pre>
.show_score
ld hl,(score + 2)
call bcd_hl
ld hl,(score)
.bcd_hl
.
.
.
</pre>

More to come...

[[User:Executioner|Executioner]] 01:27, 21 September 2007 (CEST)

Programming:Display and update Scores

2007-09-20T23:29:19Z

Executioner: /* Multiple BCD Bytes */

== Methods for Storing Scores in Memory ==

There are a number of methods for storing a Score in memory, here are a few examples:<br>
=== A Single Word ===
This is the simplest and smallest method for storing the score in memory, but it has a couple of disadvantages over some other methods. It can only hold a score up to 65535 (although you can add an extra '0' or two on the display to make that 655350 or 6553500), converting it to digits for display requires a relatively slow algorithm, and adding extra lives every 10000 points for example can take a complex routine. The advantage of using a straight Word is that the maths required to add points to the score is very simple and fast.<br>
<br>
To define the score:
<pre>
.score dw 0
</pre>
To add some points (in BC):
<pre>
.add_score_bc
ld hl,(score)
add hl,bc
ld (score),hl
ret
</pre>
To display the score requires converting to a decimal:
<pre>
.show_score
ld hl,score
ld bc,-10000
call show_digit
ld bc,-1000
call show_digit
ld bc,-100
call show_digit
ld bc,-10
call show_digit
ld a,l
add '0'
jp show_char

.show_digit
ld a,'0' - 1
.inc_digit
inc a
add hl,bc
jr nc,inc_digit
or a
sbc hl,bc
add '0'
jp show_char ; This assumes the show_char routine doesn't corrupt HL
</pre>
Checking for every 10000 points is complicated, this would normally done in the add_score routine, and I'm not going to write the code. It would however, be quite simple to add an extra life every multiple of 256 units (eg. 10240 points) by checking the most significant byte. eg:
<pre>
.add_score_bc
ld hl,(score)
ld a,h
add hl,bc
ld (score),hl
sub h
cp 2
ret c
ld hl,lives
inc (hl)
ret
</pre>

=== A Double Word ===
Like the above method, this provides a simple and efficient way to store and add points, but the routine required to convert the number to decimal for display is even more difficult, as is the extra lives every 10000 points.<br>
<br>
To define the score:
<pre>
.score ds 4
</pre>
To add BC points to the score:
<pre>
.add_score_bc
ld hl,(score)
add hl,bc
ld (score),hl
ret nc
ld hl,(score + 2)
inc hl
ld (score + 2),hl
ret
</pre>
Displaying the score is much more tricky since it involves a lot of DWord subtractions etc. Most Z80 assemblers (including WinAPE) can't handle DWord values, so you need to get your calculator out to figure out what the values are to subtract for successive digits. The score can go as high as 4294967295, but I wouldn't recommend doing the maths for all possible digits. The code to display a DWord value is too complicated for this document.

=== A Single BCD Word ===
This is similar to the above method, but the score is treated as Binary Coded Decimal. It's main disadvantage is that it can hold even less values than the single Word, restricting the score to 10000 possible combinations (one again with extra zeroes if required). Depending on the type of game and difficulty, this could be a good method to use. It's easy to store in memory and pass around, displaying and adding points are all relatively easy.<br>
<br>
To define the score is exactly the same as for a Single Word:
<pre>
.score dw 0
</pre>
Adding BC points is also fairly straightforward (here with the extra life check every 1000 units):
<pre>
.add_score_BC
ld hl,(score)
ld d,h
ld a,l
add c
daa
ld l,a
ld a,h
adc b
daa
ld h,a
ld (score),hl
sub d
cp #10
ret c
ld hl,lives
inc (hl)
ret
</pre>
And the routine to display the score:
<pre>
.show_score
ld hl,(score)
.bcd_hl
ld a,h
call bcd_a
ld a,l
.bcd_a
ld h,a
rra:rra:rra:rra
and #0f
add '0'
call show_char
ld a,h
and #0f
add '0'
jp show_char
</pre>

=== A Double BCD Word ===
This is actually one of the best methods of storing and displaying a score since the maths and display methods remain fairly simple, and your score can now hold up to 8 digits. Luckily the Z80 has just enough fast 16 bit registers (ie. Non-index registers) to be able to handle all the things you require.<br>
<br>
To define the score:
<pre>
.score ds 4
</pre>
To add BC points to the score (here with the extra life check every 10000 units):
<pre>
ld hl,(score)
ld a,l
add c
daa
ld l,a
ld a,h
adc b
daa
ld h,a
ld (score),hl
ret nc
ld hl,lives
inc (hl)
ld hl,(score + 2)
ld a,l
add 1
daa
ld l,a
ld a,h
adc 0
daa
ld h,a
ld (score + 2),hl
ret
</pre>
Displaying the score is relatively simple too, using the same routine as above:
<pre>
.show_score
ld hl,(score + 2)
call bcd_hl
ld hl,(score)
.bcd_hl
.
.
.
</pre>

=== Multiple BCD Bytes ===
This is very similar to the above method, but the values are stored and manipulated in a slightly different way. With this method, you can determine exactly how many digits you require. Maths is pretty straightforward, as is extra lives and display. One advantage this method has is that if you want to add 100 to the score, you don't have to add the two zeroes since you can start at the second BCD digit. With this method, you can store the score either little-endian (least significant bytes first) or big-endian. Big-endian has the advantage that you can read the score in a memory editor left-to-right. eg. 1234500 points is displayed as 01 23 45 00. This can make debugging easier.<br>
<br>
To define the score (6 digits):
<pre>
.score ds 3
</pre>
To add C points to the score:
<pre>
ld b,3
.add_part
ld hl,score + 2
ld a,(hl)
sub c
daa
ld (hl),a
ret nc
.add_loop
dec hl
ld a,(hl)
sub 0
daa
ld (hl),a
djnz add_loop
ret
</pre>
Displaying the score is relatively simple too, using the same routine as above:
<pre>
.show_score
ld hl,(score + 2)
call bcd_hl
ld hl,(score)
.bcd_hl
.
.
.
</pre>

More to come...

[[User:Executioner|Executioner]] 01:27, 21 September 2007 (CEST)

Programming:Display and update Scores

2007-09-20T23:27:21Z

Executioner: Score routines

== Methods for Storing Scores in Memory ==

There are a number of methods for storing a Score in memory, here are a few examples:<br>
=== A Single Word ===
This is the simplest and smallest method for storing the score in memory, but it has a couple of disadvantages over some other methods. It can only hold a score up to 65535 (although you can add an extra '0' or two on the display to make that 655350 or 6553500), converting it to digits for display requires a relatively slow algorithm, and adding extra lives every 10000 points for example can take a complex routine. The advantage of using a straight Word is that the maths required to add points to the score is very simple and fast.<br>
<br>
To define the score:
<pre>
.score dw 0
</pre>
To add some points (in BC):
<pre>
.add_score_bc
ld hl,(score)
add hl,bc
ld (score),hl
ret
</pre>
To display the score requires converting to a decimal:
<pre>
.show_score
ld hl,score
ld bc,-10000
call show_digit
ld bc,-1000
call show_digit
ld bc,-100
call show_digit
ld bc,-10
call show_digit
ld a,l
add '0'
jp show_char

.show_digit
ld a,'0' - 1
.inc_digit
inc a
add hl,bc
jr nc,inc_digit
or a
sbc hl,bc
add '0'
jp show_char ; This assumes the show_char routine doesn't corrupt HL
</pre>
Checking for every 10000 points is complicated, this would normally done in the add_score routine, and I'm not going to write the code. It would however, be quite simple to add an extra life every multiple of 256 units (eg. 10240 points) by checking the most significant byte. eg:
<pre>
.add_score_bc
ld hl,(score)
ld a,h
add hl,bc
ld (score),hl
sub h
cp 2
ret c
ld hl,lives
inc (hl)
ret
</pre>

=== A Double Word ===
Like the above method, this provides a simple and efficient way to store and add points, but the routine required to convert the number to decimal for display is even more difficult, as is the extra lives every 10000 points.<br>
<br>
To define the score:
<pre>
.score ds 4
</pre>
To add BC points to the score:
<pre>
.add_score_bc
ld hl,(score)
add hl,bc
ld (score),hl
ret nc
ld hl,(score + 2)
inc hl
ld (score + 2),hl
ret
</pre>
Displaying the score is much more tricky since it involves a lot of DWord subtractions etc. Most Z80 assemblers (including WinAPE) can't handle DWord values, so you need to get your calculator out to figure out what the values are to subtract for successive digits. The score can go as high as 4294967295, but I wouldn't recommend doing the maths for all possible digits. The code to display a DWord value is too complicated for this document.

=== A Single BCD Word ===
This is similar to the above method, but the score is treated as Binary Coded Decimal. It's main disadvantage is that it can hold even less values than the single Word, restricting the score to 10000 possible combinations (one again with extra zeroes if required). Depending on the type of game and difficulty, this could be a good method to use. It's easy to store in memory and pass around, displaying and adding points are all relatively easy.<br>
<br>
To define the score is exactly the same as for a Single Word:
<pre>
.score dw 0
</pre>
Adding BC points is also fairly straightforward (here with the extra life check every 1000 units):
<pre>
.add_score_BC
ld hl,(score)
ld d,h
ld a,l
add c
daa
ld l,a
ld a,h
adc b
daa
ld h,a
ld (score),hl
sub d
cp #10
ret c
ld hl,lives
inc (hl)
ret
</pre>
And the routine to display the score:
<pre>
.show_score
ld hl,(score)
.bcd_hl
ld a,h
call bcd_a
ld a,l
.bcd_a
ld h,a
rra:rra:rra:rra
and #0f
add '0'
call show_char
ld a,h
and #0f
add '0'
jp show_char
</pre>

=== A Double BCD Word ===
This is actually one of the best methods of storing and displaying a score since the maths and display methods remain fairly simple, and your score can now hold up to 8 digits. Luckily the Z80 has just enough fast 16 bit registers (ie. Non-index registers) to be able to handle all the things you require.<br>
<br>
To define the score:
<pre>
.score ds 4
</pre>
To add BC points to the score (here with the extra life check every 10000 units):
<pre>
ld hl,(score)
ld a,l
add c
daa
ld l,a
ld a,h
adc b
daa
ld h,a
ld (score),hl
ret nc
ld hl,lives
inc (hl)
ld hl,(score + 2)
ld a,l
add 1
daa
ld l,a
ld a,h
adc 0
daa
ld h,a
ld (score + 2),hl
ret
</pre>
Displaying the score is relatively simple too, using the same routine as above:
<pre>
.show_score
ld hl,(score + 2)
call bcd_hl
ld hl,(score)
.bcd_hl
.
.
.
</pre>

=== Multiple BCD Bytes ===
This is very similar to the above method, but the values are stored and manipulated in a slightly different way. With this method, you can determine exactly how many digits you require. Maths is pretty straightforward, as is extra lives and display. One advantage this method has is that if you want to add 100 to the score, you don't have to add the two zeroes since you can start at the second BCD digit. With this method, you can store the score either little-endian (least significant bytes first) or big-endian. Big-endian has the advantage that you can read the score in a memory editor left-to-right. eg. 1234500 points is displayed as 01 23 45 00. This can make debugging easier.<br>
<br>
To define the score (6 digits):
<pre>
.score ds 3
</pre>
To add C points to the score:
<pre>
ld b,3
.add_part
ld hl,score + 2
ld a,(hl)
daa
ld (hl),a
ret nc

ret
</pre>
Displaying the score is relatively simple too, using the same routine as above:
<pre>
.show_score
ld hl,(score + 2)
call bcd_hl
ld hl,(score)
.bcd_hl
.
.
.
</pre>

More to come...

[[User:Executioner|Executioner]] 01:27, 21 September 2007 (CEST)

Source Codes

2007-09-20T04:29:21Z

Executioner: /* Graphics */ Added Score handling stub

[[Category:Programming]]
''This article contains source codes and programming examples. You may also have a look at''
* [[Programming software]]
* [[Technical documentation]]s
* [[Locomotive BASIC]]
* [[Type Ins]]

== Assembler ==
*[[Z80_-_undocumented_opcodes|Z80 - undocumented opcodes]]
*[[Where to learn?]]

== Algorithms ==
*[[Programming:CPC OS floating point routines|CPC OS floating point routines]]
*[[Programming:CRC16|CRC16]]
*[[Programming:CRC32|CRC32]]
*[[Programming:Integer Division|Integer Division]]
*[[Programming:Integer Multiplication|Integer Multiplication]]
*[[Programming:Ultrafast Multiplication|Ultrafast Multiplication]] by [[Prodatron]]
*[[Programming:Fast Square Root|Fast Square Root]]
*[[Programming:Fast 16 bit Square Root|Fast 16 bit Square Root]] by [[User:Executioner|Executioner]]
*[[Programming:Filling memory with a byte|Filling memory with a byte]]
*[[Programming:Square Root|Square Root]]
*[[Programming:Precalculated square|Precalculated square]]
*[[Programming:Random Number Generator|Random Number Generator]]
*[[Programming:Sin/Cos calculation|Sin/Cos calculation]]

== CP/M ==
*[[Programming:A simple 'Hello World' program for CP/M using BDOS|A simple 'Hello World' program for CP/M using BDOS]]
*[[Programming:Executing firmware functions from within CP/M 2.1|Executing firmware functions from within CP/M 2.1]]
*[[Programming:Executing firmware functions from within CP/M 2.1 or CP/M plus|Executing firmware functions from within CP/M 2.1 or CP/M plus]]
*[[Programming:Executing firmware functions from within CP/M 2.1|Executing firmware functions from within CP/M 2.1]]
*[[Programming:Executing firmware functions from within CP/M plus|Executing firmware functions from within CP/M plus]]

== CPC Plus ==
*[[Programming:CPC Plus Hardware Sprites|Hardware sprites]]
*[[Programming:CPC Plus Horizontal scroll|Horizontal scroll]]
*[[Programming:CPC Plus RLE Hardware Sprites|RLE hardware sprites]]
*[[Programming:CPC Plus Screen Splitting|Screen splitting]]
*[[Programming:Unlocking ASIC|Unlocking ASIC]]
*[[Programming:CPC Plus Vertical scroll|Vertical scroll]]
*[[Programming:Simple Raster Example 2 (uses CPC plus features)|Simple Raster Example 1 (uses CPC plus features)]]
*[[Programming:Simple Raster Example 3 (uses CPC plus features)|Programming:Simple Raster Example 2 (uses CPC plus features)]]

== Devices ==
*[[Programming:CPC Booster|CPC Booster]]
*[[Programming:Digiblaster|Digiblaster]]
*[[Programming:Program to save the ROM of the Multiface 2|Program to save the ROM of the Multiface 2]]
*[[Programming:SYMBiFACE II|SYMBiFACE II]]

== File access ==
*[[Programming:An example to read a file byte-by-byte|An example to read a file byte-by-byte]]
*[[Programming:An example to write a file byte-by-byte|An example to write a file byte-by-byte]]
*[[Programming:A simple file copier using firmware functions (copies byte-by-byte)|A simple file copier using firmware functions (copies byte-by-byte)]]
*[[Programming:Loading a file|Loading a file]]
*[[Programming:Saving a file|Saving a file]]

== Floppy disk ==
*[[Programming:A simple disc copier using BDOS functions|A simple disc copier using BDOS functions]]
*[[Programming:A simple disc formatter using BDOS functions|A simple disc formatter using BDOS functions]]
*[[Programming:An example loader|An example loader]]
*[[Programming:Detecting an Amstrad or Vortex disc controler|Detecting an Amstrad or Vortex disc controler]]
*[[Programming:Formatting a track on a disc|Formatting a track on a disc]]
*[[Programming:Reading a sector from a disc|Reading a sector from a disc]]
*[[Programming:Writing a sector to disc|Writing a sector to disc]]

== Graphics ==
*[[Programming:Display a 8-bit number in binary|Display a 8-bit number in binary]]
*[[Programming:Display a 8-bit number in hex|Display a 8-bit number in hex]]
*[[Programming:Display a byte as a 3-digit decimal number|Display a byte as a 3-digit decimal number]]
*[[Programming:Display and update Scores|Display and update Scores]]
*[[Programming:Distorting the screen using register 2 of the CRTC (Horizontal Sync Position)|Distorting the screen using register 2 of the CRTC (Horizontal Sync Position)]]
*[[Programming:Fast plot|Fast plot]]
*[[Programming:Fast Sprites|Fast Sprites]] by [[User:Executioner|Executioner]]
*[[Programming:Fast Textoutput|Fast Textoutput]] by [[Prodatron]]
*[[Programming:Hardware scrolling|Hardware Scrolling]] by [[User:Executioner|Executioner]]
*[[Programming:Hardware scrolling 2|Hardware Scrolling 2]]
*[[Programming:Hardware scrolling the screen horizontally byte-by-byte using the CRTC|Hardware scrolling the screen horizontally byte-by-byte using the CRTC]]
*[[Programming:Hardware scrolling the screen using the CRTC|Hardware scrolling the screen using the CRTC]]
*[[Programming:Overscan|Overscan]]
*[[Programming:Plotting a sprite using character matrices|Plotting a sprite using character matrices]]
*[[Programming:Simple Raster Example 1|Simple Raster Example]]
*[[Programming:Simple Split Raster Example 1|Simple Split Raster Example]]

== Keyboard ==
*[[Programming:Keyboard scanning|Keyboard scanning]]

== Other routines ==
*[[Programming:An example boot sector (executed with rsx command CPM)|An example boot sector (executed with rsx command CPM)]]
*[[Programming:An example to define a RSX|An example to define a RSX]]
*[[Programming:Calling a RSX from outside of BASIC|Calling a RSX from outside of BASIC]]
*[[Programming:Dumping the data of BASIC or AMSDOS or an expansion rom|Dumping the data of BASIC or AMSDOS or an expansion rom]]
*[[Programming:Dumping the data of the lower rom|Dumping the data of the lower rom]]

Programming:Fast 16 bit Square Root

2007-09-19T05:22:31Z

Executioner: Fixed last unroll

This routine was written by [[User:Executioner|The Executioner]] based on the fast pre-calculated square routine and an algorithm by Milos "baze" Bazelides, with 16 bit arithmetic removed for faster performance.

The initialisation routine, used to build the squares table (same as for the Pre-calculated Square table (my version)).

<pre>
ld de,1
ld hl,0
ld ix,sqtab
sqloop: ld (ix + 0),l
inc hx
ld (ix + 0),h
dec hx
add hl,de
inc de
inc de
inc lx
jr nz,sqloop
</pre>

The actual 16 bit square root routine.

'''Input:''' DE = ''The number you want to find the square root of''

'''Output:''' A = ''Square root of the number supplied in DE''

'''Destroys:''' HL

'''Call:''' CALL SqrtDE

<pre>
SqrtDE: ld hl,sqtab + #180
ld a,d
cp (hl)
jr nz,$ + 6
dec h
ld a,e
cp (hl)
inc h
set 6,l
jr nc,$ + 4
res 7,l

ld a,d
cp (hl)
jr nz,$ + 6
dec h
ld a,e
cp (hl)
inc h
set 5,l
jr nc,$ + 4
res 6,l

ld a,d
cp (hl)
jr nz,$ + 6
dec h
ld a,e
cp (hl)
inc h
set 4,l
jr nc,$ + 4
res 5,l

ld a,d
cp (hl)
jr nz,$ + 6
dec h
ld a,e
cp (hl)
inc h
set 3,l
jr nc,$ + 4
res 4,l

ld a,d
cp (hl)
jr nz,$ + 6
dec h
ld a,e
cp (hl)
inc h
set 2,l
jr nc,$ + 4
res 3,l

ld a,d
cp (hl)
jr nz,$ + 6
dec h
ld a,e
cp (hl)
inc h
set 1,l
jr nc,$ + 4
res 2,l

ld a,d
cp (hl)
jr nz,$ + 6
dec h
ld a,e
cp (hl)
inc h
inc l
jr nc,$ + 4
res 1,l

ld a,d
cp (hl)
jr nz,$ + 5
dec h
ld a,e
cp (hl)
ld a,l
ret nc
dec a
ret
</pre>

Programming:Fast 16 bit Square Root

2007-09-19T05:20:41Z

Executioner: New page

This routine was written by [[User:Executioner|The Executioner]] based on the fast pre-calculated square routine and an algorithm by Milos "baze" Bazelides, with 16 bit arithmetic removed for faster performance.

The initialisation routine, used to build the squares table (same as for the Pre-calculated Square table (my version)).

<pre>
ld de,1
ld hl,0
ld ix,sqtab
sqloop: ld (ix + 0),l
inc hx
ld (ix + 0),h
dec hx
add hl,de
inc de
inc de
inc lx
jr nz,sqloop
</pre>

The actual 16 bit square root routine.

'''Input:''' DE = ''The number you want to find the square root of''

'''Output:''' A = ''Square root of the number supplied in DE''

'''Destroys:''' HL

'''Call:''' CALL SqrtDE

<pre>
SqrtDE: ld hl,sqtab + #180
ld a,d
cp (hl)
jr nz,$ + 6
dec h
ld a,e
cp (hl)
inc h
set 6,l
jr nc,$ + 4
res 7,l

ld a,d
cp (hl)
jr nz,$ + 6
dec h
ld a,e
cp (hl)
inc h
set 5,l
jr nc,$ + 4
res 6,l

ld a,d
cp (hl)
jr nz,$ + 6
dec h
ld a,e
cp (hl)
inc h
set 4,l
jr nc,$ + 4
res 5,l

ld a,d
cp (hl)
jr nz,$ + 6
dec h
ld a,e
cp (hl)
inc h
set 3,l
jr nc,$ + 4
res 4,l

ld a,d
cp (hl)
jr nz,$ + 6
dec h
ld a,e
cp (hl)
inc h
set 2,l
jr nc,$ + 4
res 3,l

ld a,d
cp (hl)
jr nz,$ + 6
dec h
ld a,e
cp (hl)
inc h
set 1,l
jr nc,$ + 4
res 2,l

ld a,d
cp (hl)
jr nz,$ + 6
dec h
ld a,e
cp (hl)
inc h
inc l
jr nc,$ + 4
res 1,l

ld a,d
cp (hl)
jr nz,$ + 6
dec h
ld a,e
cp (hl)
ld a,l
ret nc
dec a
ret
</pre>

Source Codes

2007-09-19T05:09:11Z

Executioner: /* Algorithms */ - Added 16 bit squae root

[[Category:Programming]]
''This article contains source codes and programming examples. You may also have a look at''
* [[Programming software]]
* [[Technical documentation]]s
* [[Locomotive BASIC]]
* [[Type Ins]]

== Assembler ==
*[[Z80_-_undocumented_opcodes|Z80 - undocumented opcodes]]
*[[Where to learn?]]

== Algorithms ==
*[[Programming:CPC OS floating point routines|CPC OS floating point routines]]
*[[Programming:CRC16|CRC16]]
*[[Programming:CRC32|CRC32]]
*[[Programming:Integer Division|Integer Division]]
*[[Programming:Integer Multiplication|Integer Multiplication]]
*[[Programming:Ultrafast Multiplication|Ultrafast Multiplication]] by [[Prodatron]]
*[[Programming:Fast Square Root|Fast Square Root]]
*[[Programming:Fast 16 bit Square Root|Fast 16 bit Square Root]] by [[User:Executioner|Executioner]]
*[[Programming:Filling memory with a byte|Filling memory with a byte]]
*[[Programming:Square Root|Square Root]]
*[[Programming:Precalculated square|Precalculated square]]
*[[Programming:Random Number Generator|Random Number Generator]]
*[[Programming:Sin/Cos calculation|Sin/Cos calculation]]

== CP/M ==
*[[Programming:A simple 'Hello World' program for CP/M using BDOS|A simple 'Hello World' program for CP/M using BDOS]]
*[[Programming:Executing firmware functions from within CP/M 2.1|Executing firmware functions from within CP/M 2.1]]
*[[Programming:Executing firmware functions from within CP/M 2.1 or CP/M plus|Executing firmware functions from within CP/M 2.1 or CP/M plus]]
*[[Programming:Executing firmware functions from within CP/M 2.1|Executing firmware functions from within CP/M 2.1]]
*[[Programming:Executing firmware functions from within CP/M plus|Executing firmware functions from within CP/M plus]]

== CPC Plus ==
*[[Programming:CPC Plus Hardware Sprites|Hardware sprites]]
*[[Programming:CPC Plus Horizontal scroll|Horizontal scroll]]
*[[Programming:CPC Plus RLE Hardware Sprites|RLE hardware sprites]]
*[[Programming:CPC Plus Screen Splitting|Screen splitting]]
*[[Programming:Unlocking ASIC|Unlocking ASIC]]
*[[Programming:CPC Plus Vertical scroll|Vertical scroll]]
*[[Programming:Simple Raster Example 2 (uses CPC plus features)|Simple Raster Example 1 (uses CPC plus features)]]
*[[Programming:Simple Raster Example 3 (uses CPC plus features)|Programming:Simple Raster Example 2 (uses CPC plus features)]]

== Devices ==
*[[Programming:CPC Booster|CPC Booster]]
*[[Programming:Digiblaster|Digiblaster]]
*[[Programming:Program to save the ROM of the Multiface 2|Program to save the ROM of the Multiface 2]]
*[[Programming:SYMBiFACE II|SYMBiFACE II]]

== File access ==
*[[Programming:An example to read a file byte-by-byte|An example to read a file byte-by-byte]]
*[[Programming:An example to write a file byte-by-byte|An example to write a file byte-by-byte]]
*[[Programming:A simple file copier using firmware functions (copies byte-by-byte)|A simple file copier using firmware functions (copies byte-by-byte)]]
*[[Programming:Loading a file|Loading a file]]
*[[Programming:Saving a file|Saving a file]]

== Floppy disk ==
*[[Programming:A simple disc copier using BDOS functions|A simple disc copier using BDOS functions]]
*[[Programming:A simple disc formatter using BDOS functions|A simple disc formatter using BDOS functions]]
*[[Programming:An example loader|An example loader]]
*[[Programming:Detecting an Amstrad or Vortex disc controler|Detecting an Amstrad or Vortex disc controler]]
*[[Programming:Formatting a track on a disc|Formatting a track on a disc]]
*[[Programming:Reading a sector from a disc|Reading a sector from a disc]]
*[[Programming:Writing a sector to disc|Writing a sector to disc]]

== Graphics ==
*[[Programming:Display a 8-bit number in binary|Display a 8-bit number in binary]]
*[[Programming:Display a 8-bit number in hex|Display a 8-bit number in hex]]
*[[Programming:Display a byte as a 3-digit decimal number|Display a byte as a 3-digit decimal number]]
*[[Programming:Distorting the screen using register 2 of the CRTC (Horizontal Sync Position)|Distorting the screen using register 2 of the CRTC (Horizontal Sync Position)]]
*[[Programming:Fast plot|Fast plot]]
*[[Programming:Fast Sprites|Fast Sprites]] by [[User:Executioner|Executioner]]
*[[Programming:Fast Textoutput|Fast Textoutput]] by [[Prodatron]]
*[[Programming:Hardware scrolling|Hardware Scrolling]] by [[User:Executioner|Executioner]]
*[[Programming:Hardware scrolling 2|Hardware Scrolling 2]]
*[[Programming:Hardware scrolling the screen horizontally byte-by-byte using the CRTC|Hardware scrolling the screen horizontally byte-by-byte using the CRTC]]
*[[Programming:Hardware scrolling the screen using the CRTC|Hardware scrolling the screen using the CRTC]]
*[[Programming:Overscan|Overscan]]
*[[Programming:Plotting a sprite using character matrices|Plotting a sprite using character matrices]]
*[[Programming:Simple Raster Example 1|Simple Raster Example]]
*[[Programming:Simple Split Raster Example 1|Simple Split Raster Example]]

== Keyboard ==
*[[Programming:Keyboard scanning|Keyboard scanning]]

== Other routines ==
*[[Programming:An example boot sector (executed with rsx command CPM)|An example boot sector (executed with rsx command CPM)]]
*[[Programming:An example to define a RSX|An example to define a RSX]]
*[[Programming:Calling a RSX from outside of BASIC|Calling a RSX from outside of BASIC]]
*[[Programming:Dumping the data of BASIC or AMSDOS or an expansion rom|Dumping the data of BASIC or AMSDOS or an expansion rom]]
*[[Programming:Dumping the data of the lower rom|Dumping the data of the lower rom]]