<?xml version="1.0"?>
<feed xmlns="http://www.w3.org/2005/Atom" xml:lang="en">
		<id>https://oldwiki.cpcwiki.eu/api.php?action=feedcontributions&amp;feedformat=atom&amp;user=Db6128</id>
		<title>CPCWiki - THE Amstrad CPC encyclopedia! - User contributions [en]</title>
		<link rel="self" type="application/atom+xml" href="https://oldwiki.cpcwiki.eu/api.php?action=feedcontributions&amp;feedformat=atom&amp;user=Db6128"/>
		<link rel="alternate" type="text/html" href="https://oldwiki.cpcwiki.eu/index.php/Special:Contributions/Db6128"/>
		<updated>2026-08-29T08:04:22Z</updated>
		<subtitle>User contributions</subtitle>
		<generator>MediaWiki 1.25.1</generator>

	<entry>
		<id>https://oldwiki.cpcwiki.eu/index.php?title=KC_Compact&amp;diff=84763</id>
		<title>KC Compact</title>
		<link rel="alternate" type="text/html" href="https://oldwiki.cpcwiki.eu/index.php?title=KC_Compact&amp;diff=84763"/>
				<updated>2012-12-14T23:12:10Z</updated>
		
		<summary type="html">&lt;p&gt;Db6128: We didn't revert this when I got it wrong before :P&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;''Note: Much of this article was originally written by [[Kevin Thacker]] and so any references in the first person (&amp;quot;I&amp;quot;, &amp;quot;me&amp;quot;, ''etc.'') are by him.&lt;br /&gt;
&lt;br /&gt;
[[Image:Kcc top.jpg|right|thumb|250px|The East German KC Compact Computer]]&lt;br /&gt;
&lt;br /&gt;
== Background ==&lt;br /&gt;
&lt;br /&gt;
The KC compact is a [[Clones|clone]] of the Amstrad CPC and was developed by a East German company called RFT.&lt;br /&gt;
&lt;br /&gt;
The computer was designed in 1989 and made to celebrate 40 years of the DDR/GDR (Deutsche Demokratische Republik/German Democratic Republic). A year later the Berlin wall came down and East and West Germany were joined together and the DDR/GDR came to an end. Production of the computer halted, and it was only available for a short time and is rare.&lt;br /&gt;
&lt;br /&gt;
I read about the KC compact in the Amscene section of Amstrad Action magazine, a Future Publishing Ltd publication. From that point I was hooked and I eventually wanted to own one.&lt;br /&gt;
&lt;br /&gt;
During this time I found Andreas Krueger, webmaster of the Robotron-Net website, who owned one of these computers. Andreas was very helpful and provided photocopies of a manual and the schematics, a dump of the roms, ran some tests for me and more. I want to send him a big thankyou for all the help he gave.&lt;br /&gt;
&lt;br /&gt;
In the last few months (May 2001) I contacted Thomas Tratz who owns a KC Compact. Thomas Tratz runs a great website for QuickBASIC. He has given me many of the original manuals, original software, and I bought a real KC Compact from his cousin! A big thankyou to Thomas and his cousin!&lt;br /&gt;
&lt;br /&gt;
The case of the KC compact is the same as the Robotron BIC A5105, but has different hardware inside. The KC Compact I have does not have a information sticker on the underside, but information for the A5105!&lt;br /&gt;
&lt;br /&gt;
Many of the IC's inside are Russian and clones of other IC's. (The UA880 is a clone of the Zilog Z80, and the U82536 is a clone of the Zilog Z8536).&lt;br /&gt;
&lt;br /&gt;
I know of only a few people who have a real KC Compact (Andreas Kruger, Thomas Tratz, Frank Salmon of Oldbits computer collection and myself), if there are others please contact me and I will make a list of KC Compact owners, and you will be members of an exclusive club! :)&lt;br /&gt;
&lt;br /&gt;
This document will describe the hardware and software differences (that are known) between this system and the Amstrad CPC.&lt;br /&gt;
&lt;br /&gt;
== Alternative power supply ==&lt;br /&gt;
&lt;br /&gt;
With the help of Darren Jarvis I now have a new power supply for my KC Compact. He gave me a power pack from a PC laptop, and with a special lead, this works perfectly on the KC Compact.&lt;br /&gt;
&lt;br /&gt;
PC laptop power pack details:&lt;br /&gt;
&lt;br /&gt;
LISHIN INTERNATIONAL ENTERPRISE CORP. AC ADAPTOR.&lt;br /&gt;
&lt;br /&gt;
MODEL: LSE9802A1960&lt;br /&gt;
&lt;br /&gt;
INPUT: 100-240V A.C. 50/60Hz 1.5A&lt;br /&gt;
&lt;br /&gt;
OUTPUT: 19V D.C. 3.16A. 60W MAX&lt;br /&gt;
&lt;br /&gt;
The power pack has a 3.5mm power plug at the end.&lt;br /&gt;
&lt;br /&gt;
I made a lead which has a 3.5mm power socket and a telefunktion socket.&lt;br /&gt;
&lt;br /&gt;
== External power supply ==&lt;br /&gt;
&lt;br /&gt;
The official external power modulator provides +20V,-20V DC (err... more probably +20V and 0V) with 500mA (believed to be un-smoothed), from a source of ~220V at 50Hz.&lt;br /&gt;
&lt;br /&gt;
The external power modulator is connected to the computer's internal power modulator, which generates a smoothed 12V and 5V outputs and these provide the power for the IC's. Most or all runs at 5V. The 12V are used for the built-in TV modulator, and is also output to the Expansion Port and Scart connector (and, not sure, maybe used elsewhere, too)&lt;br /&gt;
&lt;br /&gt;
The internal power supply is very tolerant and the computer will run with input voltages as low as 6V, but the colours in the palette are weak. If the voltage is increased, the colours become strong, and around 18V-20V, they are all correct. If a low input voltage is used, it is likely that the 12V power output on the expansion connector will not be correct.&lt;br /&gt;
&lt;br /&gt;
The connector is believed to be a Telefunken Line socket (Maplins catalogue reference: FT99H). If you can't find this connector then you can make a suitable connector using a power lead and a sharp craft knife.&lt;br /&gt;
&lt;br /&gt;
== Software differences ==&lt;br /&gt;
&lt;br /&gt;
The base system has 32k of &lt;br /&gt;
&lt;br /&gt;
* Locomotive BASIC v1.1 rom (identical to BASIC rom in English CPC6128) (16k)&lt;br /&gt;
* A modified operating system rom from an English CPC6128 (16k)&lt;br /&gt;
&lt;br /&gt;
* Differences are:&lt;br /&gt;
&lt;br /&gt;
:* Different start-up message&lt;br /&gt;
:* Computer names (Schneider, Awa, Solavox etc) removed.&lt;br /&gt;
:* Initialisation code for the CIO (see details below)&lt;br /&gt;
:* Test program transfer (see details below) &lt;br /&gt;
&lt;br /&gt;
I believe most software will run, but I have not been able to test this, but programs that use the following may be broken:&lt;br /&gt;
&lt;br /&gt;
* Programs that rely on exact Interrupt mechanism of the CPC6128&lt;br /&gt;
* Programs that call direct into the operating system rom (these may work, because the changes to the operating system rom are minor)&lt;br /&gt;
* Programs that rely on a unofficial hardware feature (I do not know of all hardware details, so I cannot say the level of compatibility)&lt;br /&gt;
&lt;br /&gt;
The disc interface has a modified AMSDOS rom.&lt;br /&gt;
&lt;br /&gt;
== Hardware differences ==&lt;br /&gt;
&lt;br /&gt;
* The colour palette is not cleared to black on reset&lt;br /&gt;
* The Amstrad unofficial mode (bit 1=bit 0=1 of [[Gate Array]] mode register) does not exist. The clock to the shift registers is stopped. The last colour is output.&lt;br /&gt;
* The raster interrupt is generated in a different way by the CIO.&lt;br /&gt;
&lt;br /&gt;
This section describes the known hardware differences. This information is not definitive. I do not know all differences,&lt;br /&gt;
&lt;br /&gt;
== UA880 CPU (equivalent to Zilog Z80) ==&lt;br /&gt;
&lt;br /&gt;
The KC compact uses a UA880 CPU, which is a Russian clone of the [[Z80]]. It is not confirmed whether there are any actual differences compared to a real Z80. In terms of documentation, the KC Compact System Handbook lists the opcodes SLL, INF [a.k.a. IN F,(C)], and OUTF [a.k.a. OUT (C),F], whereas these have remained undocumented by Zilog.&lt;br /&gt;
&lt;br /&gt;
== Video ==&lt;br /&gt;
&lt;br /&gt;
* The [[CRTC]] should be more or less same as those used in CPCs. The handbook and schematic say the CRTC is a CM 607, but the CRTC in mine [=Kevin's] is an HD6845P.&lt;br /&gt;
* The clocks for each mode (0,1 and 2) are derived from the main 16Mhz clock, these then drive the shift registers to output pixels to the display.&lt;br /&gt;
* Mode 3 is hardwired to 5V, so it doesn't have a clock. The shift registers are stopped and output the last colour they clocked in. Even if this mode was activated in way of connecting up the clock for Mode 0 it is not decoded the same as on the CPC: 8 colours are chosen from the 16 colour palette, instead of 4.&lt;br /&gt;
* There may be a bug whereby if the border colour is changed rapidly there could be 1 pixel of another colour output. When loading a game which changes the colour of the border, I have seen moving &amp;quot;snow&amp;quot; on the screen. I have seen this effect, but I need to confirm how it is generated.&lt;br /&gt;
* The video output doesn't generate luminance, so the KC Compact can't be used with a GT64 or MM14.&lt;br /&gt;
&lt;br /&gt;
== Colour-ROM ==&lt;br /&gt;
&lt;br /&gt;
The KC compact has a colour-rom. Each byte in the ROM defines the R,G and B of an output colour.&lt;br /&gt;
&lt;br /&gt;
{|{{Prettytable|width: 700px; font-size: 2em;}}&lt;br /&gt;
|''Bit''||''Function''&lt;br /&gt;
|-&lt;br /&gt;
|7||not used''&lt;br /&gt;
|-&lt;br /&gt;
|6||not used''&lt;br /&gt;
|-&lt;br /&gt;
|5||Green''&lt;br /&gt;
|-&lt;br /&gt;
|4||Green''&lt;br /&gt;
|-&lt;br /&gt;
|3||Red''&lt;br /&gt;
|-&lt;br /&gt;
|2||Red''&lt;br /&gt;
|-&lt;br /&gt;
|1||Blue''&lt;br /&gt;
|-&lt;br /&gt;
|0||Blue''&lt;br /&gt;
|-&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
The hardware colour index (defined by the I/O write: A15=&amp;quot;0&amp;quot;, A14=&amp;quot;1&amp;quot;, D7=&amp;quot;0&amp;quot;, D6=&amp;quot;1&amp;quot; D3-D0 define hardware colour index), is used as a look-up into the ROM.&lt;br /&gt;
&lt;br /&gt;
Each colour-element (R, G or B) is defined using 2 bits and has the potential to define a total palette of 64 colours. The colour-rom only uses 3 of the 4 possible settings for each colour-element. Looking at the schematic, the potential is not realised, the two signals for each colour use the same resistors before being combined. This means that the bit combinations 10 and 01 produce the same result. So this means only 27 colours are possible.&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
{|{{Prettytable|width: 700px; font-size: 2em;}}&lt;br /&gt;
|''Element Bit 1''||''Element Bit 0''||Intensity''&lt;br /&gt;
|-&lt;br /&gt;
|0||0||Zero''&lt;br /&gt;
|-&lt;br /&gt;
|0||1||Half (same as 10)''&lt;br /&gt;
|-&lt;br /&gt;
|1||0||Half (same as 01)''&lt;br /&gt;
|-&lt;br /&gt;
|1||1||Full''&lt;br /&gt;
|-&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
The colour ROM can be downloaded from the KC-Klub homepage.&lt;br /&gt;
&lt;br /&gt;
== External connectors ==&lt;br /&gt;
&lt;br /&gt;
=== Built-in connectors: pinout ===&lt;br /&gt;
&lt;br /&gt;
* [[Connector:Cassette recorder|Cassette recorder]] - other pinout as CPC, motor control is TTL (not a relay)&lt;br /&gt;
* [[Connector:Digital joystick|Digital joystick]] - exactly as CPC (all 9 pins are exactly same)&lt;br /&gt;
* [[Connector:Expansion port|Expansion port]] - almost same as CPC (plus some extra pins: additional voltages, TEST feature, FBAS output)&lt;br /&gt;
* [[Connector:Monitor|Monitor]] - 21pin Scart connector, and UHF modulator&lt;br /&gt;
* [[Connector:Printer port|Printer port]] - almost same as CPC Plus (25pin)&lt;br /&gt;
* [[Connector:Stereo sound|Stereo sound]] - 5pin DIN (not 3.5mm)&lt;br /&gt;
&lt;br /&gt;
=== Cassette socket ===&lt;br /&gt;
&lt;br /&gt;
The Cassette socket has different connection assignments compared to the CPC, so you can't use a CPC cassette lead directly with the KC Compact.&lt;br /&gt;
&lt;br /&gt;
I made a second lead which converted between KC Compact assignments and CPC assignments, which was connected between KC Compact and the CPC cassette lead.&lt;br /&gt;
&lt;br /&gt;
I have been successfully loaded some CPC software.&lt;br /&gt;
&lt;br /&gt;
=== Expansion socket ===&lt;br /&gt;
&lt;br /&gt;
The KC compact has a real connector compared to the P.C.B. edge connector of an English CPC6128. The connector appears to be a PC Card connector. This connector is not the same as the one on a German CPC6128.&lt;br /&gt;
&lt;br /&gt;
The expansion connector has more pins; 58 compared to 50 on an English CPC6128.&lt;br /&gt;
&lt;br /&gt;
I am in the process of making an adaptor so that I can test CPC hardware on the KC Compact.&lt;br /&gt;
&lt;br /&gt;
=== Parallel ===&lt;br /&gt;
&lt;br /&gt;
On the KC compact the parallel port is connected to Port A of the CIO.&lt;br /&gt;
&lt;br /&gt;
It is a general purpose I/O port. All 8-bits can be used for input or output. The input/output of each bit can be programmed. With standard setup, bit 7 is assigned to /STROBE, and bits 0-6 are assigned to Printer DATA, making a 7-bit printer port. Additionally, the 8th printer bit is implemented via Bit5 of PIO Port C (see [[8bit Printer Ports]]).&lt;br /&gt;
&lt;br /&gt;
* The Amstrad CPC has a single-direction, 7-bit port.&lt;br /&gt;
* The KC Compact has a bi-directional, 8-bit port.&lt;br /&gt;
&lt;br /&gt;
The KC compact parallel port is more powerful and flexible compared to the Amstrad CPC parallel port!&lt;br /&gt;
&lt;br /&gt;
=== Keyboard ===&lt;br /&gt;
&lt;br /&gt;
* The keyboard matrix of the KC compact supports all the keys of the CPC, but the following keys are not on the keyboard: F5, F6,F7,F8,F9.&lt;br /&gt;
* The KC Compact has a power LED (near CLR key). There are also (unused) locations for two additional LEDs (near TAB/CAPS key), eventually these locations are used by the D005 keyboard for KC-85 computers, or by the Robotron A5105 computer (both D005 and A5105 use the same case &amp;amp; keyboard as the KC Compact, aside from that, they have nothing to do with it).&lt;br /&gt;
&lt;br /&gt;
== KP580BB55 PIO (equivalent to 8255 PPI) ==&lt;br /&gt;
&lt;br /&gt;
Used (almost) identically as the CPC's [[8255]]. PIO Port B is slightly different:&lt;br /&gt;
&lt;br /&gt;
{|{{Prettytable|width: 700px; font-size: 2em;}}&lt;br /&gt;
|7||Cassette data read (identical to CPC)&lt;br /&gt;
|-&lt;br /&gt;
|6||Centronics/Printer Busy (identical to CPC)&lt;br /&gt;
|-&lt;br /&gt;
|5||/EXP (identical to CPC)&lt;br /&gt;
|-&lt;br /&gt;
|4||1 (+5v) (would be LK4 screen refresh rate in CPC) (but isn't like so in KC Compact?)&lt;br /&gt;
|-&lt;br /&gt;
|3||1 (+5v) (would be LK3 manufacturer ID in CPC)&lt;br /&gt;
|-&lt;br /&gt;
|2||0 (0v) (would be LK2 manufacturer ID in CPC)&lt;br /&gt;
|-&lt;br /&gt;
|1||/TEST (would be LK1 manufacturer ID in CPC)&lt;br /&gt;
|-&lt;br /&gt;
|0||VSYNC (identical to CPC)&lt;br /&gt;
|-&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
* Note: The KC System Handbook accidently calls the chip &amp;quot;KP580B55&amp;quot;, however, the correct name is &amp;quot;KP580BB55&amp;quot; (with double &amp;quot;B&amp;quot;).&lt;br /&gt;
&lt;br /&gt;
== U82536 CIO (equivalent to Zilog Z8536 CIO) ==&lt;br /&gt;
&lt;br /&gt;
* [[CIO Overview]]&lt;br /&gt;
* [[CIO Usage in KC Compact]]&lt;br /&gt;
* [[CIO Registers (Summary)]]&lt;br /&gt;
* [[CIO Registers (Detailed)]]&lt;br /&gt;
&lt;br /&gt;
The CIO chip is a Counter and I/O chip. In the KC compact system it is used to generate interrupts, access to the parallel printer port, and possibly video control.&lt;br /&gt;
&lt;br /&gt;
When A12 of the I/O address is &amp;quot;0&amp;quot;, the CIO is selected. Bit A9 and A8 of the I/O address select the registers of the CIO,&lt;br /&gt;
to avoid conflict with other peripherals the CIO should be access using:&lt;br /&gt;
&lt;br /&gt;
{|{{Prettytable|width: 700px; font-size: 2em;}}&lt;br /&gt;
|''Port''||''A9''||''A8''||''Register''||''Usage in KC Compact''&lt;br /&gt;
|-&lt;br /&gt;
|&amp;amp;ECxx||0||0||Port B data register||setup as timer and is connected to the video hardware (?)&lt;br /&gt;
|-&lt;br /&gt;
|&amp;amp;EDxx||0||1||Port C data register||setup as timer and is connected to the Interrupt hardware &lt;br /&gt;
|-&lt;br /&gt;
|&amp;amp;EExx||1||0||Control register||control&lt;br /&gt;
|-&lt;br /&gt;
|&amp;amp;EFxx||1||1||Port A data register||setup as I/O and is connected to the parallel printer port&lt;br /&gt;
|-&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
* Note: A8 is passed through an inverter, resulting in the above &amp;quot;B,C,Control,A&amp;quot; ordering - this is done to map Port A to the same address as the CPC Printer Port (without the inverter, CIO registers would have &amp;quot;C,B,A,Control&amp;quot; ordering).&lt;br /&gt;
&lt;br /&gt;
On start-up, the KC compact programs the CIO to the following state:&lt;br /&gt;
&lt;br /&gt;
* Port A: I/O mode: all bits are set to output, and bit 7 is inverted when writing. (bit 7 is /strobe signal to printer)&lt;br /&gt;
* Port B: Counter mode (port B is split into two counters, both are setup the same): continuous count, restarts when count is over, uses external trigger, uses external input to update count, pulse output (when count is over)&lt;br /&gt;
&lt;br /&gt;
* Port C: Counter mode: same configuration as port B. &lt;br /&gt;
&lt;br /&gt;
Port C is used to generate interrupts. The counter input is HSYNC (the counter counts counter-input transitions; low-high and high-low). The trigger input is VSYV (this signal is derived from VSYNC).&lt;br /&gt;
&lt;br /&gt;
What this means:&lt;br /&gt;
&lt;br /&gt;
* The CIO Port C counter is updated when HSYNC changes state&lt;br /&gt;
* The CIO Port C counter is reset when VSYV changes state &lt;br /&gt;
&lt;br /&gt;
With the default settings, the CIO will count 26 HSYNC transitions (52 lines of the display covered in this time) and generate a interrupt. At VSYNC the counter is reset so that the interrupts are synchronised.&lt;br /&gt;
&lt;br /&gt;
I do not know the exact function of the counter's of Port B. &lt;br /&gt;
&lt;br /&gt;
CPC Interrupts:&lt;br /&gt;
&lt;br /&gt;
* synchronised to 2 HSYNCs after VSYNC&lt;br /&gt;
* interrupts cannot be generated closer than 32 lines&lt;br /&gt;
* counter inside Gate Array counts up to 52 lines.&lt;br /&gt;
* interrupt can be cleared by writing to bit 4 of Mode/ROM register in Gate Array (counter is also reset at this time) &lt;br /&gt;
&lt;br /&gt;
KC compact interrupts:&lt;br /&gt;
&lt;br /&gt;
* interrupt can be cleared by writing to bit 4 of Mode/ROM register at 0x07fxx (counter is *not* reset at this time)&lt;br /&gt;
* interrupt system fully programmable: can count HSYNCS, or count internal CIO clocks! &lt;br /&gt;
&lt;br /&gt;
Therefore, the KC compact interrupt system is more powerful than the CPC!&lt;br /&gt;
&lt;br /&gt;
== TEST feature ==&lt;br /&gt;
&lt;br /&gt;
When the KC compact is reset, the /TEST signal on the expansion port is checked.&lt;br /&gt;
&lt;br /&gt;
If it is high (1), the operating system will startup and BASIC will be entered. If it is low (0), the KC compact will enter a data transfer sequence using DATA2, DATA1, /STROBE and DATA7 on the expansion connector.&lt;br /&gt;
&lt;br /&gt;
Data transfer:&lt;br /&gt;
&lt;br /&gt;
The data transfer is controlled by another computer, the KC compact is the &amp;quot;slave&amp;quot;.&lt;br /&gt;
&lt;br /&gt;
Using DATA2, DATA1, /STROBE and DATA7, a program of 256 bytes in size can be transfered into KC compact memory at &amp;amp;a880. When all bytes have been transfered, this program will be executed.&lt;br /&gt;
&lt;br /&gt;
KCC Side:&lt;br /&gt;
&lt;br /&gt;
{|{{Prettytable|width: 700px; font-size: 2em;}}&lt;br /&gt;
|''Synchronisation stage (Data transfer begin)''||''/STROBE must read as &amp;quot;1&amp;quot;!! wait for DATA1 to change from &amp;quot;1&amp;quot; to &amp;quot;0&amp;quot;''&lt;br /&gt;
|-&lt;br /&gt;
|Synchronisation Acknowledge stage||write 0x0f: DATA2=&amp;quot;1&amp;quot;, DATA7=&amp;quot;0&amp;quot;''&lt;br /&gt;
|-&lt;br /&gt;
|Data transfer stage (repeat for 256 bytes)||Data byte transfer||repeat 8 times (once for each data bit) * write 0x0ff: DATA2=&amp;quot;1&amp;quot;,DATA7=&amp;quot;1&amp;quot;, and wait for /STROBE to read as &amp;quot;1&amp;quot; * read inputs: DATA1=data bit&lt;br /&gt;
|-&lt;br /&gt;
|||Data byte acknowledge stage||write: 0x0f0: DATA2=&amp;quot;0&amp;quot;, DATA7=&amp;quot;1&amp;quot;, and wait for /STROBE to read as &amp;quot;1&amp;quot;&lt;br /&gt;
|-&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
* /STROBE and DATA1 are inputs&lt;br /&gt;
* DATA2 and DATA7 are outputs&lt;br /&gt;
&lt;br /&gt;
== Connecting a KC compact to a CPC+ monitor ==&lt;br /&gt;
&lt;br /&gt;
These connections are known to work!&lt;br /&gt;
&lt;br /&gt;
What you need:&lt;br /&gt;
&lt;br /&gt;
* SCART plug&lt;br /&gt;
* 8-pin DIN socket &lt;br /&gt;
&lt;br /&gt;
Lead connections:&lt;br /&gt;
&lt;br /&gt;
* Connect the 8-pin DIN socket to the 8-pin DIN plug from the monitor&lt;br /&gt;
* Connect the SCART plug to the SCART socket on the back of the KC Compact &lt;br /&gt;
&lt;br /&gt;
Signal connections:&lt;br /&gt;
&lt;br /&gt;
{|{{Prettytable|width: 700px; font-size: 2em;}}&lt;br /&gt;
|''pin number on SCART plug''||''pin number on CPC+ monitor socket''&lt;br /&gt;
|-&lt;br /&gt;
|19 (Composite Video Output)||1 (Composite Sync)&lt;br /&gt;
|-&lt;br /&gt;
|17 (Video Ground)||8 (GND)&lt;br /&gt;
|-&lt;br /&gt;
|15 (Analogue Red)||4 (Red)&lt;br /&gt;
|-&lt;br /&gt;
|11 (Analogue Green)||2 (Green)&lt;br /&gt;
|-&lt;br /&gt;
|7 (Analogue Blue)||5 (Blue)&lt;br /&gt;
|-&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
== Pictures ==&lt;br /&gt;
&lt;br /&gt;
&amp;lt;gallery caption=&amp;quot;KC Compact Pictures&amp;quot;&amp;gt;&lt;br /&gt;
Image:Kcc top2.jpg|Top (with UHF cable)&lt;br /&gt;
Image:Kcc top.jpg|Top (Keyboard)&lt;br /&gt;
Image:Kcc open.jpg|Top (removed)&lt;br /&gt;
Image:Kcc pcb.jpg|Top (PCB)&lt;br /&gt;
Image:Kcc left.jpg|Left&lt;br /&gt;
Image:Kcc rigt.jpg|Right&lt;br /&gt;
Image:Kcc pjs.jpg|Right (Power, Joystick, Sound)&lt;br /&gt;
Image:Kcc labl.jpg|Sticker for Robotron K1505 computer (accidently badged on a KC computer)&lt;br /&gt;
Image:Kcc back.jpg|Rear&lt;br /&gt;
Image:Kcc pt.jpg|Rear (left: Power, Tape, UHF)&lt;br /&gt;
Image:Kcc asp.jpg|Rear (middle: UHF, Scart, Printer)&lt;br /&gt;
Image:Kcc exp.jpg|Rear (right: Expansion)&lt;br /&gt;
Image:Kcc lead.jpg|Aerial lead connector (UHF)&lt;br /&gt;
Image:KCC with power supply.jpg|Computer with Power Supply&lt;br /&gt;
Image:KCC boxed1.jpg|Boxed (closed)&lt;br /&gt;
Image:KCC boxed2.jpg|Boxed (open)&lt;br /&gt;
Image:Adcompa.jpg|KC Compact advert&lt;br /&gt;
Image:Kcc bright top.jpg|Top&lt;br /&gt;
Image:Kcc bright right.jpg|Right&lt;br /&gt;
Image:Kcc bright back.jpg|Rear&lt;br /&gt;
Image:Kcc base left.jpg|Base Left&lt;br /&gt;
Image:Kcc base right.jpg|Base Right&lt;br /&gt;
Image:Deepfb keyb size kcc.jpg|Dimensions&lt;br /&gt;
Image:KCCompact_PCB_Top.jpg|PCB Top&lt;br /&gt;
Image:KCCompact_PCB_Bottom.jpg|PCB Bottom&lt;br /&gt;
Image:KCCompact_Keyboard_Top.jpg|Keyboard Top&lt;br /&gt;
Image:KCCompact_Keyboard_Bottom.jpg|Keyboard bottom&lt;br /&gt;
&amp;lt;/gallery&amp;gt;&lt;br /&gt;
&lt;br /&gt;
== Datasheets ==&lt;br /&gt;
&lt;br /&gt;
* [[Media:CIO-Z8536.pdf]] - Zilog Z8536 CIO Datasheet (equivalent to U82536)&lt;br /&gt;
* [[Media:PPI M5L8255AP-5.pdf]] - Mitsubishi 8255 PPI Datasheet (equivalent to KP580BB55)&lt;br /&gt;
&lt;br /&gt;
== KC Compact Hardware Manuals (german) ==&lt;br /&gt;
&lt;br /&gt;
* [[Media:Kcc Beschreibung.pdf]] - Technical Data and Pin-Outs&lt;br /&gt;
* [[Media:Kcc Basic Handbuch.pdf]] - Basic Handbook&lt;br /&gt;
* [[Media:Kcc Systemhandbuch.pdf]] - System Handbook&lt;br /&gt;
* [[Media:Kcc Floppy System Handbuch.pdf]] - Floppy Handbook&lt;br /&gt;
&lt;br /&gt;
== KC Compact Cassette Manuals (german) ==&lt;br /&gt;
&lt;br /&gt;
* [[Media:Kcc kassette CC4001 Demokcc.pdf]] - Demonstration (Demo1, Demo2)&lt;br /&gt;
* [[Media:Kcc kassette CC6001 Spielebox1.pdf]] - Gamebox 1 (Strolch, Roessel, Match)&lt;br /&gt;
* [[Media:Kcc kassette CC6002 Spielebox2.pdf]] - Gamebox 2 (Orgel, Konzert)&lt;br /&gt;
* [[Media:Kcc kassette CC6003 Spielebox3.pdf]] - Gamebox 3 (Fruity Frank, Memory)&lt;br /&gt;
* ... Gamebox 4 (?)&lt;br /&gt;
* [[Media:Kcc kassette CC6005 Spielebox5.pdf]] - Gamebox 5 (Cubit, Muehle, Pagode)&lt;br /&gt;
* [[Media:Kcc kassette CC7001 Komponist.pdf]] - Composer (Komponi.bas, Fughette.mus, Menuett.mus, Gedanken.mus, Muslink.bas)&lt;br /&gt;
* [[Media:Kcc kassette CC7002 Grafix1.pdf]] - Graphic (Grafik1, BspMode0.mal, BspMode1.mal)&lt;br /&gt;
&lt;br /&gt;
== KC Compact Schematics ==&lt;br /&gt;
&lt;br /&gt;
&amp;lt;gallery&amp;gt;&lt;br /&gt;
File:Kcc schematic cpu io.gif|CPU and I/O Schematic&lt;br /&gt;
File:Kcc schematic memory.gif|Memory Schematic&lt;br /&gt;
File:Kcc schematic modulator.gif|Modulator Schematic&lt;br /&gt;
File:Kcc schematic video power.gif|Video and Power Schematic&lt;br /&gt;
File:Kcc block diagram.gif|Block Diagram&lt;br /&gt;
File:Kcc component map mainboard.gif|Component Map (Mainboard)&lt;br /&gt;
File:Kcc component map modulator.gif|Component Map (Modulator)&lt;br /&gt;
&amp;lt;/gallery&amp;gt;&lt;br /&gt;
&lt;br /&gt;
For schematics at higher resolution, see &lt;br /&gt;
Schematic (Modulator):[[Media:Kcc schem1.png|hires]], &lt;br /&gt;
Block Diagram (Mainboard):[[Media:Kcc schem2.png|hires]],&lt;br /&gt;
Component Map (Modulator):[[Media:Kcc schem3.png|hires]],&lt;br /&gt;
Schematic (CPU and I/O):[[Media:Kcc schem4l.png|left]] and [[Media:Kcc schem4r.png|right]],&lt;br /&gt;
Schematic (Memory):[[Media:Kcc schem5l.png|left]] and [[Media:Kcc schem5r.png|right]],&lt;br /&gt;
Schematic (Video and Power):[[Media:Kcc schem6l.png|left]] and [[Media:Kcc schem6r.png|right]],&lt;br /&gt;
Component Map (Mainboard):[[Media:Kcc schem7l.png|left]] and [[Media:Kcc schem7r.png|right]].&lt;br /&gt;
&lt;br /&gt;
== Operating systems ==&lt;br /&gt;
&lt;br /&gt;
* [[AMSDOS#BASDOS|BASDOS]] - AMSDOS clone&lt;br /&gt;
* [[CP/M#MicroDOS|MicroDOS]] - CP/M clone&lt;br /&gt;
&lt;br /&gt;
== KC Compact Computer Resources and Links ==&lt;br /&gt;
&lt;br /&gt;
* [[KC Compact Advert]] - KC Compact Advertising (with english translation)&lt;br /&gt;
* [[Clones|CPC Clones]] - List of all known CPC clones&lt;br /&gt;
* http://www.robotrontechnik.de/ - Retro site for east-german computers&lt;br /&gt;
* http://www.robotron-net.de/ - Retro site for east-german computers&lt;br /&gt;
* http://www.iee.et.tu-dresden.de/~kc-club/index.html - Retro site for east-german computers&lt;br /&gt;
* http://www.sax.de/~zander/index2h.html - KC Compact is found in the &amp;quot;Hobby&amp;quot; section&lt;br /&gt;
&lt;br /&gt;
[[Category:Non CPC Computers]][[Category:Clones]]&lt;/div&gt;</summary>
		<author><name>Db6128</name></author>	</entry>

	<entry>
		<id>https://oldwiki.cpcwiki.eu/index.php?title=Programming:Filling_memory_with_a_byte&amp;diff=84762</id>
		<title>Programming:Filling memory with a byte</title>
		<link rel="alternate" type="text/html" href="https://oldwiki.cpcwiki.eu/index.php?title=Programming:Filling_memory_with_a_byte&amp;diff=84762"/>
				<updated>2012-12-14T17:52:11Z</updated>
		
		<summary type="html">&lt;p&gt;Db6128: /* Using the stack */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;==Using LDIR==&lt;br /&gt;
&lt;br /&gt;
From the '''The Unofficial Amstrad WWW Resource'''&lt;br /&gt;
&lt;br /&gt;
&amp;lt;pre&amp;gt;&lt;br /&gt;
;; This code snippet will show one method to fill a block&lt;br /&gt;
;; of memory with a single data byte using Z80 assembly&lt;br /&gt;
;; language.&lt;br /&gt;
&lt;br /&gt;
;;--------------------------------------------------&lt;br /&gt;
&lt;br /&gt;
;; HL = start address of block&lt;br /&gt;
ld hl,&amp;amp;4000&lt;br /&gt;
&lt;br /&gt;
;; DE = HL + 1&lt;br /&gt;
ld e,l&lt;br /&gt;
ld d,h&lt;br /&gt;
inc de&lt;br /&gt;
&lt;br /&gt;
;; initialise first byte of block&lt;br /&gt;
;; with data byte (&amp;amp;00)&lt;br /&gt;
ld (hl),&amp;amp;00&lt;br /&gt;
	&lt;br /&gt;
;; BC = length of block in bytes&lt;br /&gt;
;; HL+BC-1 = end address of block&lt;br /&gt;
&lt;br /&gt;
ld bc,&amp;amp;4000	&lt;br /&gt;
&lt;br /&gt;
;; fill memory&lt;br /&gt;
ldir&lt;br /&gt;
&lt;br /&gt;
;;--------------------------------------------------&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
;; For each iteration of the LDIR command:&lt;br /&gt;
;;&lt;br /&gt;
;; 1. This command will copy the byte from the memory &lt;br /&gt;
;; address pointed to by HL to the memory address pointed to by DE.&lt;br /&gt;
;; i.e. (DE) = (HL).&lt;br /&gt;
;; 2. Then HL and DE will be incremented. BC will be decremented.&lt;br /&gt;
;;&lt;br /&gt;
;;&lt;br /&gt;
;; For the first byte:&lt;br /&gt;
;; &lt;br /&gt;
;; HL = start&lt;br /&gt;
;; DE = start+1&lt;br /&gt;
;; BC = length&lt;br /&gt;
;; (HL)=0&lt;br /&gt;
;; &lt;br /&gt;
;; For the second byte:&lt;br /&gt;
;; &lt;br /&gt;
;; HL = start + 1 (initialised to 0 by the previous iteration)&lt;br /&gt;
;; DE = start + 2&lt;br /&gt;
;; BC = length - 1&lt;br /&gt;
;;&lt;br /&gt;
;; For the third byte:&lt;br /&gt;
;;&lt;br /&gt;
;; HL = start + 2 (initialised to 0 by the previous iteration)&lt;br /&gt;
;; DE = start + 3&lt;br /&gt;
;; BC = length - 2&lt;br /&gt;
;;&lt;br /&gt;
;; etc....&lt;br /&gt;
&amp;lt;/pre&amp;gt;&lt;br /&gt;
&lt;br /&gt;
==Using the stack==&lt;br /&gt;
&lt;br /&gt;
This method write bytes at a considerably faster rate by exploiting the speed of the stack pointer (SP) moving through RAM and its 2-byte steps. It is especially good for very rapidly clearing the screen.--[[User:Db6128|Db6128]] ([[User talk:Db6128|talk]]) 06:29, 13 December 2012 (EET)&lt;br /&gt;
&lt;br /&gt;
&amp;lt;pre&amp;gt;&lt;br /&gt;
; Save the stack pointer&lt;br /&gt;
ld (SAVE_SP),sp        ; Only remove if you're sure you don't need the stack&lt;br /&gt;
ld sp,FINAL_ADDRESS+1  ; e.g. to fill from &amp;amp;C000 to &amp;amp;FFFF (&amp;amp;4000 bytes), set SP to &amp;amp;FFFF+1 = &amp;amp;0000&lt;br /&gt;
&lt;br /&gt;
; Define the region of RAM to be filled&lt;br /&gt;
ld hl,YOUR_BYTE_1*&amp;amp;100 + YOUR_BYTE_2      ; Use HL or whichever 16-bit register you prefer&lt;br /&gt;
ld de,LENGTH_TO_FILL/2                    ; divided by 2 because DE is 2 bytes wide and PUSH pushes both&lt;br /&gt;
&lt;br /&gt;
; Set up a fast 16-bit loop counter&lt;br /&gt;
dec de                 ; This method takes advantage of the fact that DJNZ leaves B as 0, which subsequent DJNZs see as 256&lt;br /&gt;
ld b,e                 ; B = (length/2) MOD 256, so 0 = a 512-byte block&lt;br /&gt;
inc b                  ; D = the number of 512-byte blocks to write, or just = 1 if the length is &amp;lt;512&lt;br /&gt;
inc d                  ; Of course, if you know the length ahead of run-time, you can set B and D directly in your ASM&lt;br /&gt;
&lt;br /&gt;
; Fill the memory&lt;br /&gt;
        PUSHLOOP:&lt;br /&gt;
push hl                ; Writes HL to (SP-2) and DECs SP by 2.&lt;br /&gt;
                       ; For even more speed, use multiple PUSH HLs in a row (I like 8, = &amp;amp;10 bytes) and adjust counters to match&lt;br /&gt;
djnz PUSHLOOP&lt;br /&gt;
dec d&lt;br /&gt;
jr nz,PUSHLOOP&lt;br /&gt;
&lt;br /&gt;
; Restore the stack pointer&lt;br /&gt;
        SAVE_SP equ $+1&lt;br /&gt;
ld SP,&amp;amp;9999            ; &amp;amp;9999 will be replaced by the actual previous value&lt;br /&gt;
&amp;lt;/pre&amp;gt;&lt;br /&gt;
&lt;br /&gt;
[[Category:Programming]]&lt;/div&gt;</summary>
		<author><name>Db6128</name></author>	</entry>

	<entry>
		<id>https://oldwiki.cpcwiki.eu/index.php?title=Programming:Filling_memory_with_a_byte&amp;diff=84758</id>
		<title>Programming:Filling memory with a byte</title>
		<link rel="alternate" type="text/html" href="https://oldwiki.cpcwiki.eu/index.php?title=Programming:Filling_memory_with_a_byte&amp;diff=84758"/>
				<updated>2012-12-14T01:02:03Z</updated>
		
		<summary type="html">&lt;p&gt;Db6128: /* Using the stack */ DErp&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;==Using LDIR==&lt;br /&gt;
&lt;br /&gt;
From the '''The Unofficial Amstrad WWW Resource'''&lt;br /&gt;
&lt;br /&gt;
&amp;lt;pre&amp;gt;&lt;br /&gt;
;; This code snippet will show one method to fill a block&lt;br /&gt;
;; of memory with a single data byte using Z80 assembly&lt;br /&gt;
;; language.&lt;br /&gt;
&lt;br /&gt;
;;--------------------------------------------------&lt;br /&gt;
&lt;br /&gt;
;; HL = start address of block&lt;br /&gt;
ld hl,&amp;amp;4000&lt;br /&gt;
&lt;br /&gt;
;; DE = HL + 1&lt;br /&gt;
ld e,l&lt;br /&gt;
ld d,h&lt;br /&gt;
inc de&lt;br /&gt;
&lt;br /&gt;
;; initialise first byte of block&lt;br /&gt;
;; with data byte (&amp;amp;00)&lt;br /&gt;
ld (hl),&amp;amp;00&lt;br /&gt;
	&lt;br /&gt;
;; BC = length of block in bytes&lt;br /&gt;
;; HL+BC-1 = end address of block&lt;br /&gt;
&lt;br /&gt;
ld bc,&amp;amp;4000	&lt;br /&gt;
&lt;br /&gt;
;; fill memory&lt;br /&gt;
ldir&lt;br /&gt;
&lt;br /&gt;
;;--------------------------------------------------&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
;; For each iteration of the LDIR command:&lt;br /&gt;
;;&lt;br /&gt;
;; 1. This command will copy the byte from the memory &lt;br /&gt;
;; address pointed to by HL to the memory address pointed to by DE.&lt;br /&gt;
;; i.e. (DE) = (HL).&lt;br /&gt;
;; 2. Then HL and DE will be incremented. BC will be decremented.&lt;br /&gt;
;;&lt;br /&gt;
;;&lt;br /&gt;
;; For the first byte:&lt;br /&gt;
;; &lt;br /&gt;
;; HL = start&lt;br /&gt;
;; DE = start+1&lt;br /&gt;
;; BC = length&lt;br /&gt;
;; (HL)=0&lt;br /&gt;
;; &lt;br /&gt;
;; For the second byte:&lt;br /&gt;
;; &lt;br /&gt;
;; HL = start + 1 (initialised to 0 by the previous iteration)&lt;br /&gt;
;; DE = start + 2&lt;br /&gt;
;; BC = length - 1&lt;br /&gt;
;;&lt;br /&gt;
;; For the third byte:&lt;br /&gt;
;;&lt;br /&gt;
;; HL = start + 2 (initialised to 0 by the previous iteration)&lt;br /&gt;
;; DE = start + 3&lt;br /&gt;
;; BC = length - 2&lt;br /&gt;
;;&lt;br /&gt;
;; etc....&lt;br /&gt;
&amp;lt;/pre&amp;gt;&lt;br /&gt;
&lt;br /&gt;
==Using the stack==&lt;br /&gt;
&lt;br /&gt;
This method write bytes at a considerably faster rate by exploiting the speed of the stack pointer (SP) moving through RAM and its 2-byte steps. It is especially good for very rapidly clearing the screen.--[[User:Db6128|Db6128]] ([[User talk:Db6128|talk]]) 06:29, 13 December 2012 (EET)&lt;br /&gt;
&lt;br /&gt;
&amp;lt;pre&amp;gt;&lt;br /&gt;
; Save the stack pointer&lt;br /&gt;
ld (SAVE_SP),sp        ; Only remove if you're sure you don't need the stack&lt;br /&gt;
ld sp,FINAL_ADDRESS+1  ; e.g. to fill from &amp;amp;C000 to &amp;amp;FFFF (&amp;amp;4000 bytes), set SP to &amp;amp;FFFF+1 = &amp;amp;0000&lt;br /&gt;
&lt;br /&gt;
; Define the region of RAM to be filled&lt;br /&gt;
ld h,YOUR_BYTE         ; Use HL or whichever 16-bit register you prefer&lt;br /&gt;
ld l,YOUR_BYTE         ; For 0, you can save 1 byte of memory by instead using XOR A:LD H,A:LD L,A&lt;br /&gt;
ld de,LENGTH_TO_FILL/2 ; divided by 2 because DE is 2 bytes wide and PUSH pushes both&lt;br /&gt;
&lt;br /&gt;
; Set up a fast 16-bit loop counter&lt;br /&gt;
dec de                 ; This method takes advantage of the fact that DJNZ leaves B as 0, which subsequent DJNZs see as 256&lt;br /&gt;
ld b,e                 ; B = (length/2) MOD 256, so 0 = a 512-byte block&lt;br /&gt;
inc b                  ; D = the number of 512-byte blocks to write, or just = 1 if the length is &amp;lt;512&lt;br /&gt;
inc d                  ; Of course, if you know the length ahead of run-time, you can set B and D directly in your ASM&lt;br /&gt;
&lt;br /&gt;
; Fill the memory&lt;br /&gt;
        PUSHLOOP:&lt;br /&gt;
push hl                ; Writes HL to (SP-2) and DECs SP by 2.&lt;br /&gt;
                       ; For even more speed, use multiple PUSH HLs in a row (I like 8, = &amp;amp;10 bytes) and adjust counters to match&lt;br /&gt;
djnz PUSHLOOP&lt;br /&gt;
dec d&lt;br /&gt;
jr nz,PUSHLOOP&lt;br /&gt;
&lt;br /&gt;
; Restore the stack pointer&lt;br /&gt;
        SAVE_SP equ $+1&lt;br /&gt;
ld SP,&amp;amp;9999            ; &amp;amp;9999 will be replaced by the actual previous value&lt;br /&gt;
&amp;lt;/pre&amp;gt;&lt;br /&gt;
&lt;br /&gt;
[[Category:Programming]]&lt;/div&gt;</summary>
		<author><name>Db6128</name></author>	</entry>

	<entry>
		<id>https://oldwiki.cpcwiki.eu/index.php?title=Programming:Filling_memory_with_a_byte&amp;diff=84731</id>
		<title>Programming:Filling memory with a byte</title>
		<link rel="alternate" type="text/html" href="https://oldwiki.cpcwiki.eu/index.php?title=Programming:Filling_memory_with_a_byte&amp;diff=84731"/>
				<updated>2012-12-13T04:29:00Z</updated>
		
		<summary type="html">&lt;p&gt;Db6128: adding SP-based method&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;==Using LDIR==&lt;br /&gt;
&lt;br /&gt;
From the '''The Unofficial Amstrad WWW Resource'''&lt;br /&gt;
&lt;br /&gt;
&amp;lt;pre&amp;gt;&lt;br /&gt;
;; This code snippet will show one method to fill a block&lt;br /&gt;
;; of memory with a single data byte using Z80 assembly&lt;br /&gt;
;; language.&lt;br /&gt;
&lt;br /&gt;
;;--------------------------------------------------&lt;br /&gt;
&lt;br /&gt;
;; HL = start address of block&lt;br /&gt;
ld hl,&amp;amp;4000&lt;br /&gt;
&lt;br /&gt;
;; DE = HL + 1&lt;br /&gt;
ld e,l&lt;br /&gt;
ld d,h&lt;br /&gt;
inc de&lt;br /&gt;
&lt;br /&gt;
;; initialise first byte of block&lt;br /&gt;
;; with data byte (&amp;amp;00)&lt;br /&gt;
ld (hl),&amp;amp;00&lt;br /&gt;
	&lt;br /&gt;
;; BC = length of block in bytes&lt;br /&gt;
;; HL+BC-1 = end address of block&lt;br /&gt;
&lt;br /&gt;
ld bc,&amp;amp;4000	&lt;br /&gt;
&lt;br /&gt;
;; fill memory&lt;br /&gt;
ldir&lt;br /&gt;
&lt;br /&gt;
;;--------------------------------------------------&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
;; For each iteration of the LDIR command:&lt;br /&gt;
;;&lt;br /&gt;
;; 1. This command will copy the byte from the memory &lt;br /&gt;
;; address pointed to by HL to the memory address pointed to by DE.&lt;br /&gt;
;; i.e. (DE) = (HL).&lt;br /&gt;
;; 2. Then HL and DE will be incremented. BC will be decremented.&lt;br /&gt;
;;&lt;br /&gt;
;;&lt;br /&gt;
;; For the first byte:&lt;br /&gt;
;; &lt;br /&gt;
;; HL = start&lt;br /&gt;
;; DE = start+1&lt;br /&gt;
;; BC = length&lt;br /&gt;
;; (HL)=0&lt;br /&gt;
;; &lt;br /&gt;
;; For the second byte:&lt;br /&gt;
;; &lt;br /&gt;
;; HL = start + 1 (initialised to 0 by the previous iteration)&lt;br /&gt;
;; DE = start + 2&lt;br /&gt;
;; BC = length - 1&lt;br /&gt;
;;&lt;br /&gt;
;; For the third byte:&lt;br /&gt;
;;&lt;br /&gt;
;; HL = start + 2 (initialised to 0 by the previous iteration)&lt;br /&gt;
;; DE = start + 3&lt;br /&gt;
;; BC = length - 2&lt;br /&gt;
;;&lt;br /&gt;
;; etc....&lt;br /&gt;
&amp;lt;/pre&amp;gt;&lt;br /&gt;
&lt;br /&gt;
==Using the stack==&lt;br /&gt;
&lt;br /&gt;
This method write bytes at a considerably faster rate by exploiting the speed of the stack pointer (SP) moving through RAM and its 2-byte steps. It is especially good for very rapidly clearing the screen.--[[User:Db6128|Db6128]] ([[User talk:Db6128|talk]]) 06:29, 13 December 2012 (EET)&lt;br /&gt;
&lt;br /&gt;
&amp;lt;pre&amp;gt;&lt;br /&gt;
; Save the stack pointer&lt;br /&gt;
ld (SAVE_SP),sp        ; Only remove if you're sure you don't need the stack&lt;br /&gt;
ld sp,FINAL_ADDRESS+1  ; e.g. to fill from &amp;amp;C000 to &amp;amp;FFFF (&amp;amp;4000 bytes), set SP to &amp;amp;FFFF+1 = &amp;amp;0000&lt;br /&gt;
&lt;br /&gt;
; Define the region of RAM to be filled&lt;br /&gt;
ld h,YOUR_BYTE         ; Use HL or whichever 16-bit register you prefer&lt;br /&gt;
ld l,YOUR_BYTE         ; For 0, you can save 1 byte of memory by instead using XOR A:LD H,A:LD L,A&lt;br /&gt;
ld de,LENGTH_TO_FILL/2 ; divided by 2 because DE is 2 bytes wide and PUSH pushes both&lt;br /&gt;
&lt;br /&gt;
; Set up a fast 16-bit loop counter&lt;br /&gt;
dec de                 ; This method takes advantage of the fact that DJNZ leaves B as 0, which subsequent DJNZs see as 256&lt;br /&gt;
ld b,e                 ; B = (length/2) MOD 256, so 0 = a 512-byte block&lt;br /&gt;
inc b                  ; D = the number of 512-byte blocks to write, or just = 1 if the length is &amp;lt;512&lt;br /&gt;
inc d                  ; Of course, if you know the length ahead of run-time, you can set B and D directly in your ASM&lt;br /&gt;
&lt;br /&gt;
; Fill the memory&lt;br /&gt;
        PUSHLOOP:&lt;br /&gt;
push hl                ; Writes DE to (SP-2) and DECs SP by 2.&lt;br /&gt;
                       ; For even more speed, use multiple PUSH HLs in a row (I like 8, = &amp;amp;10 bytes) and adjust counters to match&lt;br /&gt;
djnz PUSHLOOP&lt;br /&gt;
dec d&lt;br /&gt;
jr nz,PUSHLOOP&lt;br /&gt;
&lt;br /&gt;
; Restore the stack pointer&lt;br /&gt;
        SAVE_SP equ $+1&lt;br /&gt;
ld SP,&amp;amp;9999            ; &amp;amp;9999 will be replaced by the actual previous value&lt;br /&gt;
&amp;lt;/pre&amp;gt;&lt;br /&gt;
&lt;br /&gt;
[[Category:Programming]]&lt;/div&gt;</summary>
		<author><name>Db6128</name></author>	</entry>

	<entry>
		<id>https://oldwiki.cpcwiki.eu/index.php?title=Z80_-_undocumented_opcodes&amp;diff=84694</id>
		<title>Z80 - undocumented opcodes</title>
		<link rel="alternate" type="text/html" href="https://oldwiki.cpcwiki.eu/index.php?title=Z80_-_undocumented_opcodes&amp;diff=84694"/>
				<updated>2012-12-10T07:25:17Z</updated>
		
		<summary type="html">&lt;p&gt;Db6128: /* CB prefix */ removing one bit I wrote as I'm pretty sure it's nonsense and SLA works fine&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;The [[Z80|Z80]] CPU contains several undocumented opcodes, which can be quite helpful sometimes. The most useful undocumented opcodes are probably these ones, which split up the 16bit index registers IX and IY in 8bit registers called IXL,IXH,IYL and IYH. &lt;br /&gt;
&lt;br /&gt;
Please note, that many Z80 successors like the Z180 are NOT able to execute some of the following opcodes properly. &lt;br /&gt;
&lt;br /&gt;
This is just an overview. Parts of this article have been copied from the [http://www.myquest.nl/z80undocumented/ &amp;quot;The Undocumented Z80 Documented&amp;quot;] originally by Sean Young and currently maintained by Jan Wilmans, which is one of the most comprehensive descriptions around. &lt;br /&gt;
&lt;br /&gt;
== CB prefix  ==&lt;br /&gt;
&lt;br /&gt;
Of the 247 opcodes that use the prefix &amp;amp;CB, the block &amp;amp;CB &amp;amp;30 to &amp;amp;CB &amp;amp;37 is undocumented officially. These commands shift the operand register left and set its lowest bit to 1.&lt;br /&gt;
&lt;br /&gt;
This is in contrast to SRL (Shift Right Logical), which shifts right and clears the highest bit. Some believe these opcodes were supposed to be Shift Left Logical but that the setting of the lowest bit represents a bug in the Z80, claiming this is why the opcodes are undocumented. Others call the opcodes SLIA, for Shift Left Inverted Arithmetic.&lt;br /&gt;
&lt;br /&gt;
Regardless of the story behind this operation, its effective result is ''register'' = (''register'' * 2) + 1, something that does have its uses and has been employed in various programming contexts for that reason.&lt;br /&gt;
&lt;br /&gt;
&amp;lt;pre&amp;gt;CB30 SLL B&lt;br /&gt;
CB31 SLL C&lt;br /&gt;
CB32 SLL D&lt;br /&gt;
CB33 SLL E&lt;br /&gt;
CB34 SLL H&lt;br /&gt;
CB35 SLL L&lt;br /&gt;
CB36 SLL (HL)&lt;br /&gt;
CB37 SLL A&lt;br /&gt;
&amp;lt;/pre&amp;gt;&lt;br /&gt;
&lt;br /&gt;
== DD and FD prefixes  ==&lt;br /&gt;
&lt;br /&gt;
The &amp;amp;DD or &amp;amp;FD prefixes are documented as causing operations using the 16-bit register HL to instead work with either of the 16-bit indexing registers IX or IY; if the operations access a memory location (''i.e.'' normally LD A,(HL), ''etc.''), the opcodes must additionally include an extra byte that specifies a signed displacement (-128 to +127) from IX/IY.&lt;br /&gt;
&lt;br /&gt;
However, Zilog have not documented the fact that these prefixes also affect opcodes that usually refer to the 8-bit components of HL, ''i.e.'' H and L. Thus, one gains access to the additional registers IXH, IXL, IYH, and IYL, for almost all commands that normally use H or L. It is even possible to do things like LD IXH,IXL (although you cannot combine IX and IY in the same instruction, for obvious reasons). These registers can be useful in routines that must process and/or store a lot of numbers. Thankfully, they are not as slow as their 16-bit counterparts: whereas access to (IX+d) is usually slower by 3 NOPs than the equivalent operation upon (HL), using the 8-bit components is (like PUSH IX, ''etc.'') only 1 NOP slower, and this is only due to the need to parse the prefixing byte.&lt;br /&gt;
&lt;br /&gt;
&amp;lt;pre&amp;gt;DB #DD:LD H,A -&amp;amp;gt; LD IXH,A&lt;br /&gt;
DB #FD:LD B,L -&amp;amp;gt; LD B,IYL&lt;br /&gt;
&amp;lt;/pre&amp;gt; &lt;br /&gt;
Note: These registers are called LX, LY, HX, and HY by [[WinAPE]]'s debugger, although its assembler uses the names given above.&lt;br /&gt;
&lt;br /&gt;
== ED prefix  ==&lt;br /&gt;
&lt;br /&gt;
There are a number of undocumented EDxx instructions, of which most are duplicates of documented instructions. Any instruction not listed has no effect (same behaviour as 2 NOP instructions). &lt;br /&gt;
&lt;br /&gt;
The complete list except for the block instructions: &lt;br /&gt;
&amp;lt;pre&amp;gt;ED40 IN B,(C)       ED60 IN H,(C)&lt;br /&gt;
ED41 OUT (C),B      ED61 OUT (C),H&lt;br /&gt;
ED42 SBC HL,BC      ED62 SBC HL,HL&lt;br /&gt;
ED43 LD (nn),BC     ED63 LD (nn),HL&lt;br /&gt;
ED44 NEG            ED64 NEG *&lt;br /&gt;
ED45 RETN           ED65 RETN *&lt;br /&gt;
ED46 IM 0           ED66 IM 0 *&lt;br /&gt;
ED47 LD I,A         ED67 RRD&lt;br /&gt;
ED48 IN C,(C)       ED68 IN L,(C)&lt;br /&gt;
ED49 OUT (C),C      ED69 OUT (C),L&lt;br /&gt;
ED4A ADC HL,BC      ED6A ADC HL,HL&lt;br /&gt;
ED4B LD BC,(nn)     ED6B LD HL,(nn)&lt;br /&gt;
ED4C NEG *          ED6C NEG *&lt;br /&gt;
ED4D RETI           ED6D RETN *&lt;br /&gt;
ED4E IM 0 *         ED6E IM 0 *&lt;br /&gt;
ED4F LD R,A         ED6F RLD&lt;br /&gt;
ED50 IN D,(C)       ED70 IN (C) / IN F,(C) *&lt;br /&gt;
ED51 OUT (C),D      ED71 OUT (C),0 *&lt;br /&gt;
ED52 SBC HL,DE      ED72 SBC HL,SP&lt;br /&gt;
ED53 LD (nn),DE     ED73 LD (nn),SP&lt;br /&gt;
ED54 NEG *          ED74 NEG *&lt;br /&gt;
ED55 RETN *         ED75 RETN *&lt;br /&gt;
ED56 IM 1           ED76 IM 1 *&lt;br /&gt;
ED57 LD A,I         ED77 NOP *&lt;br /&gt;
ED58 IN E,(C)       ED78 IN A,(C)&lt;br /&gt;
ED59 OUT (C),E      ED79 OUT (C),A&lt;br /&gt;
ED5A ADC HL,DE      ED7A ADC HL,SP&lt;br /&gt;
ED5B LD DE,(nn)     ED7B LD SP,(nn)&lt;br /&gt;
ED5C NEG *          ED7C NEG *&lt;br /&gt;
ED5D RETN *         ED7D RETN *&lt;br /&gt;
ED5E IM 2           ED7E IM 2 *&lt;br /&gt;
ED5F LD A,R         ED7F NOP *&lt;br /&gt;
* = undocumented opcodes&lt;br /&gt;
&amp;lt;/pre&amp;gt; &lt;br /&gt;
== DDCB prefix  ==&lt;br /&gt;
&lt;br /&gt;
The undocumented DDCB instructions store the result (if any) of the operation in one of the seven all-purpose registers, which one depends on the lower 3 bits of the last byte of the opcode (not operand, so not the offset). &lt;br /&gt;
&amp;lt;pre&amp;gt;000 B&lt;br /&gt;
001 C&lt;br /&gt;
010 D&lt;br /&gt;
011 E&lt;br /&gt;
100 H&lt;br /&gt;
101 L&lt;br /&gt;
110 (none: documented opcode)&lt;br /&gt;
111 A&lt;br /&gt;
&amp;lt;/pre&amp;gt; &lt;br /&gt;
The documented DDCB0106 is RLC (IX+01h). So, clear the lower three bits (DDCB0100) and something is done to register B. The result of the RLC (which is stored in (IX+01h)) is now also stored in register B. Effectively, it does the following: &lt;br /&gt;
&amp;lt;pre&amp;gt;LD B,(IX+01h)&lt;br /&gt;
RLC B&lt;br /&gt;
LD (IX+01h),B&lt;br /&gt;
&amp;lt;/pre&amp;gt; &lt;br /&gt;
So you get double value for money. The result is stored in B and (IX+01h). The most common notation is: RLC (IX+01h),B &lt;br /&gt;
&lt;br /&gt;
I’ve once seen this notation: &lt;br /&gt;
&amp;lt;pre&amp;gt;RLC (IX+01h)&lt;br /&gt;
LD B,(IX+01h)&lt;br /&gt;
&amp;lt;/pre&amp;gt; &lt;br /&gt;
That’s not correct: B contains the rotated value, even if (IX+01h) points to ROM. The DDCB SET and RES instructions do the same thing as the shift/rotate instructions: &lt;br /&gt;
&amp;lt;pre&amp;gt;DDCB10C0    SET 0,(IX+10h),B&lt;br /&gt;
DDCB10C1    SET 0,(IX+10h),C&lt;br /&gt;
DDCB10C2    SET 0,(IX+10h),D&lt;br /&gt;
DDCB10C3    SET 0,(IX+10h),E&lt;br /&gt;
DDCB10C4    SET 0,(IX+10h),H&lt;br /&gt;
DDCB10C5    SET 0,(IX+10h),L&lt;br /&gt;
DDCB10C6    SET 0,(IX+10h) - documented instruction&lt;br /&gt;
DDCB10C7    SET 0,(IX+10h),A&lt;br /&gt;
&amp;lt;/pre&amp;gt; &lt;br /&gt;
So for example with the last instruction, the value of (IX+10h) with bit 0 set is also stored in register A. &lt;br /&gt;
&lt;br /&gt;
The DDCB BIT instructions do not store any value; they merely test a bit. That’s why the undocumented DDCB BIT instructions are no different from the official ones: &lt;br /&gt;
&amp;lt;pre&amp;gt;DDCB d 78   BIT 7,(IX+d)&lt;br /&gt;
DDCB d 79   BIT 7,(IX+d)&lt;br /&gt;
DDCB d 7A   BIT 7,(IX+d)&lt;br /&gt;
DDCB d 7B   BIT 7,(IX+d)&lt;br /&gt;
DDCB d 7C   BIT 7,(IX+d)&lt;br /&gt;
DDCB d 7D   BIT 7,(IX+d)&lt;br /&gt;
DDCB d 7E   BIT 7,(IX+d) - documented instruction&lt;br /&gt;
DDCB d 7F   BIT 7,(IX+d)&lt;br /&gt;
&amp;lt;/pre&amp;gt; &lt;br /&gt;
== FDCB prefix  ==&lt;br /&gt;
&lt;br /&gt;
Same as for the DDCB prefix, though IY is used instead of IX. &lt;br /&gt;
&lt;br /&gt;
== Web links  ==&lt;br /&gt;
&lt;br /&gt;
*[http://www.robsy.net/z80undoc.pdf &amp;quot;The Undocumented Z80 Documented&amp;quot; by Sean Young at Jan Wilmans' Website] &lt;br /&gt;
*[http://www.raww.org/index.php?name=News&amp;amp;file=article&amp;amp;sid=2226 Short information about the internal &amp;quot;MEMPTR&amp;quot; 16bit register of the Z80 and its influence on the F-Register]&lt;br /&gt;
&lt;br /&gt;
[[Category:Programming]]&lt;/div&gt;</summary>
		<author><name>Db6128</name></author>	</entry>

	<entry>
		<id>https://oldwiki.cpcwiki.eu/index.php?title=6_MHz_CPC&amp;diff=84693</id>
		<title>6 MHz CPC</title>
		<link rel="alternate" type="text/html" href="https://oldwiki.cpcwiki.eu/index.php?title=6_MHz_CPC&amp;diff=84693"/>
				<updated>2012-12-10T02:30:10Z</updated>
		
		<summary type="html">&lt;p&gt;Db6128: /* Disadvantages */ ...although the effects on the FDC are probably even worse&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;The 6 MHz CPC is a DIY hardware modification which allows to run the [[CPC6128]] with a CPU speed of 6 MHz instead of the usual 4 MHz.&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
== Technic ==&lt;br /&gt;
The 16 MHz crystal of the CPC is replaced by a 24 MHz crystal. Both crystals should kept on the main board, but a switch (2 lines at least, better 3) selects between them. You have to select the CPU and bus speed before you switch on the CPC. Switching the speed while the system is switched on is not advised.&lt;br /&gt;
None of the authors of this article is responsible for danger on your CPC, in case you try to use this DIY.&lt;br /&gt;
&lt;br /&gt;
== Advantages ==&lt;br /&gt;
* Z80 runs with 6 MHz&lt;br /&gt;
* Bus runs with 6 MHz&lt;br /&gt;
* FDC is 50% faster&lt;br /&gt;
* Disc formats with 50% more sectors can be used&lt;br /&gt;
* Sound can be better, since the PSG runs more quickly&lt;br /&gt;
* Games run more fluid&lt;br /&gt;
&lt;br /&gt;
== Disadvantages ==&lt;br /&gt;
* FDC can't read old disc formats any longer&lt;br /&gt;
* The horizontal timing of the CRTC is affected. In order to get a stable image, you need to program register 0 at 95 (96 characters line) and Register 2 at 61 (centering for 40 characters default)&lt;br /&gt;
* Pixels pitch is 66.7% of their original pitch.Theses pictures show this fact (320×200 mode 1 pixels with black border)&lt;br /&gt;
&amp;lt;gallery&amp;gt;&lt;br /&gt;
Image:12062011055.JPG|Original CPC @16Mhz&lt;br /&gt;
Image:12062011054.JPG|Overclocked CPC @24Mhz&lt;br /&gt;
&amp;lt;/gallery&amp;gt;&lt;br /&gt;
* Not every hardware expansion is able to work with the 6 MHz bus speed&lt;br /&gt;
* Sound must be reprogrammed&lt;br /&gt;
&lt;br /&gt;
== Software ==&lt;br /&gt;
* A lot of games run well with 6 MHz. For example: Nebulus, StarFox, Starstrike and others.&lt;br /&gt;
* There is a 6 MHz version of FutureOS&lt;br /&gt;
&lt;br /&gt;
== Measurement of speed ==&lt;br /&gt;
&lt;br /&gt;
* This speed improvement is 16.66667%.This has been tested with this simple program :&lt;br /&gt;
&lt;br /&gt;
 10 i = 0&lt;br /&gt;
 20 after 500 goto 100&lt;br /&gt;
 25 cls&lt;br /&gt;
 30 i = i +1&lt;br /&gt;
 40 ? i&lt;br /&gt;
 50 goto 30&lt;br /&gt;
 100 end&lt;br /&gt;
&lt;br /&gt;
Score is 258 on normal CPC versus 301 on 24 MHz CPC.&lt;br /&gt;
&lt;br /&gt;
(Theses results can be subject to discussion as we are not sure interrupts timing is not affected)&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
[[Category:DIY]][[Category:Hardware]]&lt;/div&gt;</summary>
		<author><name>Db6128</name></author>	</entry>

	<entry>
		<id>https://oldwiki.cpcwiki.eu/index.php?title=6_MHz_CPC&amp;diff=84692</id>
		<title>6 MHz CPC</title>
		<link rel="alternate" type="text/html" href="https://oldwiki.cpcwiki.eu/index.php?title=6_MHz_CPC&amp;diff=84692"/>
				<updated>2012-12-10T02:29:22Z</updated>
		
		<summary type="html">&lt;p&gt;Db6128: The squashed screen is a major disadvantage, so I've moved it there. Also, there was a constradiction: Is sound better or must it &amp;quot;be reprogrammed&amp;quot;? I have changed it to &amp;quot;can be better&amp;quot; to disambiguate slightly.&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;The 6 MHz CPC is a DIY hardware modification which allows to run the [[CPC6128]] with a CPU speed of 6 MHz instead of the usual 4 MHz.&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
== Technic ==&lt;br /&gt;
The 16 MHz crystal of the CPC is replaced by a 24 MHz crystal. Both crystals should kept on the main board, but a switch (2 lines at least, better 3) selects between them. You have to select the CPU and bus speed before you switch on the CPC. Switching the speed while the system is switched on is not advised.&lt;br /&gt;
None of the authors of this article is responsible for danger on your CPC, in case you try to use this DIY.&lt;br /&gt;
&lt;br /&gt;
== Advantages ==&lt;br /&gt;
* Z80 runs with 6 MHz&lt;br /&gt;
* Bus runs with 6 MHz&lt;br /&gt;
* FDC is 50% faster&lt;br /&gt;
* Disc formats with 50% more sectors can be used&lt;br /&gt;
* Sound can be better, since the PSG runs more quickly&lt;br /&gt;
* Games run more fluid&lt;br /&gt;
&lt;br /&gt;
== Disadvantages ==&lt;br /&gt;
* The horizontal timing of the CRTC is affected. In order to get a stable image, you need to program register 0 at 95 (96 characters line) and Register 2 at 61 (centering for 40 characters default)&lt;br /&gt;
* Pixels pitch is 66.7% of their original pitch.Theses pictures show this fact (320×200 mode 1 pixels with black border)&lt;br /&gt;
&amp;lt;gallery&amp;gt;&lt;br /&gt;
Image:12062011055.JPG|Original CPC @16Mhz&lt;br /&gt;
Image:12062011054.JPG|Overclocked CPC @24Mhz&lt;br /&gt;
&amp;lt;/gallery&amp;gt;&lt;br /&gt;
* Not every hardware expansion is able to work with the 6 MHz bus speed&lt;br /&gt;
* FDC can't read old disc formats any longer&lt;br /&gt;
* Sound must be reprogrammed&lt;br /&gt;
&lt;br /&gt;
== Software ==&lt;br /&gt;
* A lot of games run well with 6 MHz. For example: Nebulus, StarFox, Starstrike and others.&lt;br /&gt;
* There is a 6 MHz version of FutureOS&lt;br /&gt;
&lt;br /&gt;
== Measurement of speed ==&lt;br /&gt;
&lt;br /&gt;
* This speed improvement is 16.66667%.This has been tested with this simple program :&lt;br /&gt;
&lt;br /&gt;
 10 i = 0&lt;br /&gt;
 20 after 500 goto 100&lt;br /&gt;
 25 cls&lt;br /&gt;
 30 i = i +1&lt;br /&gt;
 40 ? i&lt;br /&gt;
 50 goto 30&lt;br /&gt;
 100 end&lt;br /&gt;
&lt;br /&gt;
Score is 258 on normal CPC versus 301 on 24 MHz CPC.&lt;br /&gt;
&lt;br /&gt;
(Theses results can be subject to discussion as we are not sure interrupts timing is not affected)&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
[[Category:DIY]][[Category:Hardware]]&lt;/div&gt;</summary>
		<author><name>Db6128</name></author>	</entry>

	<entry>
		<id>https://oldwiki.cpcwiki.eu/index.php?title=Z80_-_undocumented_opcodes&amp;diff=84691</id>
		<title>Z80 - undocumented opcodes</title>
		<link rel="alternate" type="text/html" href="https://oldwiki.cpcwiki.eu/index.php?title=Z80_-_undocumented_opcodes&amp;diff=84691"/>
				<updated>2012-12-10T02:24:16Z</updated>
		
		<summary type="html">&lt;p&gt;Db6128: /* DD and FD prefixes */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;The [[Z80|Z80]] CPU contains several undocumented opcodes, which can be quite helpful sometimes. The most useful undocumented opcodes are probably these ones, which split up the 16bit index registers IX and IY in 8bit registers called IXL,IXH,IYL and IYH. &lt;br /&gt;
&lt;br /&gt;
Please note, that many Z80 successors like the Z180 are NOT able to execute some of the following opcodes properly. &lt;br /&gt;
&lt;br /&gt;
This is just an overview. Parts of this article have been copied from the [http://www.myquest.nl/z80undocumented/ &amp;quot;The Undocumented Z80 Documented&amp;quot;] originally by Sean Young and currently maintained by Jan Wilmans, which is one of the most comprehensive descriptions around. &lt;br /&gt;
&lt;br /&gt;
== CB prefix  ==&lt;br /&gt;
&lt;br /&gt;
Of the 247 opcodes that use the prefix &amp;amp;CB, the block &amp;amp;CB &amp;amp;30 to &amp;amp;CB &amp;amp;37 is undocumented officially. These commands shift the operand register left and set its lowest bit to 1.&lt;br /&gt;
&lt;br /&gt;
This is in contrast to SRL (Shift Right Logical), which shifts right and clears the highest bit. Some believe that this difference indicates why these opcodes are undocumented, feeling that this result represents a bug in the Z80 and that the operation was supposed to be Shift Left Logical, which would thus ''clear'' the lowest bit after shifting. Others call the opcodes SLIA, for Shift Left Inverted Arithmetic.&lt;br /&gt;
&lt;br /&gt;
Regardless of the story behind this operation, its effective result is ''register'' = (''register'' * 2) + 1, something that does have its uses and has been employed in various programming contexts for that reason.&lt;br /&gt;
&lt;br /&gt;
If you want a way to do an actual Shift Left Logical, ''i.e.'' ''register'' = ''register'' * 2, first ensure the carry is clear, inserting an OR A or AND A to achieve this if necessary, and then do an RL ''register''.&lt;br /&gt;
&lt;br /&gt;
&amp;lt;pre&amp;gt;CB30 SLL B&lt;br /&gt;
CB31 SLL C&lt;br /&gt;
CB32 SLL D&lt;br /&gt;
CB33 SLL E&lt;br /&gt;
CB34 SLL H&lt;br /&gt;
CB35 SLL L&lt;br /&gt;
CB36 SLL (HL)&lt;br /&gt;
CB37 SLL A&lt;br /&gt;
&amp;lt;/pre&amp;gt;&lt;br /&gt;
&lt;br /&gt;
== DD and FD prefixes  ==&lt;br /&gt;
&lt;br /&gt;
The &amp;amp;DD or &amp;amp;FD prefixes are documented as causing operations using the 16-bit register HL to instead work with either of the 16-bit indexing registers IX or IY; if the operations access a memory location (''i.e.'' normally LD A,(HL), ''etc.''), the opcodes must additionally include an extra byte that specifies a signed displacement (-128 to +127) from IX/IY.&lt;br /&gt;
&lt;br /&gt;
However, Zilog have not documented the fact that these prefixes also affect opcodes that usually refer to the 8-bit components of HL, ''i.e.'' H and L. Thus, one gains access to the additional registers IXH, IXL, IYH, and IYL, for almost all commands that normally use H or L. It is even possible to do things like LD IXH,IXL (although you cannot combine IX and IY in the same instruction, for obvious reasons). These registers can be useful in routines that must process and/or store a lot of numbers. Thankfully, they are not as slow as their 16-bit counterparts: whereas access to (IX+d) is usually slower by 3 NOPs than the equivalent operation upon (HL), using the 8-bit components is (like PUSH IX, ''etc.'') only 1 NOP slower, and this is only due to the need to parse the prefixing byte.&lt;br /&gt;
&lt;br /&gt;
&amp;lt;pre&amp;gt;DB #DD:LD H,A -&amp;amp;gt; LD IXH,A&lt;br /&gt;
DB #FD:LD B,L -&amp;amp;gt; LD B,IYL&lt;br /&gt;
&amp;lt;/pre&amp;gt; &lt;br /&gt;
Note: These registers are called LX, LY, HX, and HY by [[WinAPE]]'s debugger, although its assembler uses the names given above.&lt;br /&gt;
&lt;br /&gt;
== ED prefix  ==&lt;br /&gt;
&lt;br /&gt;
There are a number of undocumented EDxx instructions, of which most are duplicates of documented instructions. Any instruction not listed has no effect (same behaviour as 2 NOP instructions). &lt;br /&gt;
&lt;br /&gt;
The complete list except for the block instructions: &lt;br /&gt;
&amp;lt;pre&amp;gt;ED40 IN B,(C)       ED60 IN H,(C)&lt;br /&gt;
ED41 OUT (C),B      ED61 OUT (C),H&lt;br /&gt;
ED42 SBC HL,BC      ED62 SBC HL,HL&lt;br /&gt;
ED43 LD (nn),BC     ED63 LD (nn),HL&lt;br /&gt;
ED44 NEG            ED64 NEG *&lt;br /&gt;
ED45 RETN           ED65 RETN *&lt;br /&gt;
ED46 IM 0           ED66 IM 0 *&lt;br /&gt;
ED47 LD I,A         ED67 RRD&lt;br /&gt;
ED48 IN C,(C)       ED68 IN L,(C)&lt;br /&gt;
ED49 OUT (C),C      ED69 OUT (C),L&lt;br /&gt;
ED4A ADC HL,BC      ED6A ADC HL,HL&lt;br /&gt;
ED4B LD BC,(nn)     ED6B LD HL,(nn)&lt;br /&gt;
ED4C NEG *          ED6C NEG *&lt;br /&gt;
ED4D RETI           ED6D RETN *&lt;br /&gt;
ED4E IM 0 *         ED6E IM 0 *&lt;br /&gt;
ED4F LD R,A         ED6F RLD&lt;br /&gt;
ED50 IN D,(C)       ED70 IN (C) / IN F,(C) *&lt;br /&gt;
ED51 OUT (C),D      ED71 OUT (C),0 *&lt;br /&gt;
ED52 SBC HL,DE      ED72 SBC HL,SP&lt;br /&gt;
ED53 LD (nn),DE     ED73 LD (nn),SP&lt;br /&gt;
ED54 NEG *          ED74 NEG *&lt;br /&gt;
ED55 RETN *         ED75 RETN *&lt;br /&gt;
ED56 IM 1           ED76 IM 1 *&lt;br /&gt;
ED57 LD A,I         ED77 NOP *&lt;br /&gt;
ED58 IN E,(C)       ED78 IN A,(C)&lt;br /&gt;
ED59 OUT (C),E      ED79 OUT (C),A&lt;br /&gt;
ED5A ADC HL,DE      ED7A ADC HL,SP&lt;br /&gt;
ED5B LD DE,(nn)     ED7B LD SP,(nn)&lt;br /&gt;
ED5C NEG *          ED7C NEG *&lt;br /&gt;
ED5D RETN *         ED7D RETN *&lt;br /&gt;
ED5E IM 2           ED7E IM 2 *&lt;br /&gt;
ED5F LD A,R         ED7F NOP *&lt;br /&gt;
* = undocumented opcodes&lt;br /&gt;
&amp;lt;/pre&amp;gt; &lt;br /&gt;
== DDCB prefix  ==&lt;br /&gt;
&lt;br /&gt;
The undocumented DDCB instructions store the result (if any) of the operation in one of the seven all-purpose registers, which one depends on the lower 3 bits of the last byte of the opcode (not operand, so not the offset). &lt;br /&gt;
&amp;lt;pre&amp;gt;000 B&lt;br /&gt;
001 C&lt;br /&gt;
010 D&lt;br /&gt;
011 E&lt;br /&gt;
100 H&lt;br /&gt;
101 L&lt;br /&gt;
110 (none: documented opcode)&lt;br /&gt;
111 A&lt;br /&gt;
&amp;lt;/pre&amp;gt; &lt;br /&gt;
The documented DDCB0106 is RLC (IX+01h). So, clear the lower three bits (DDCB0100) and something is done to register B. The result of the RLC (which is stored in (IX+01h)) is now also stored in register B. Effectively, it does the following: &lt;br /&gt;
&amp;lt;pre&amp;gt;LD B,(IX+01h)&lt;br /&gt;
RLC B&lt;br /&gt;
LD (IX+01h),B&lt;br /&gt;
&amp;lt;/pre&amp;gt; &lt;br /&gt;
So you get double value for money. The result is stored in B and (IX+01h). The most common notation is: RLC (IX+01h),B &lt;br /&gt;
&lt;br /&gt;
I’ve once seen this notation: &lt;br /&gt;
&amp;lt;pre&amp;gt;RLC (IX+01h)&lt;br /&gt;
LD B,(IX+01h)&lt;br /&gt;
&amp;lt;/pre&amp;gt; &lt;br /&gt;
That’s not correct: B contains the rotated value, even if (IX+01h) points to ROM. The DDCB SET and RES instructions do the same thing as the shift/rotate instructions: &lt;br /&gt;
&amp;lt;pre&amp;gt;DDCB10C0    SET 0,(IX+10h),B&lt;br /&gt;
DDCB10C1    SET 0,(IX+10h),C&lt;br /&gt;
DDCB10C2    SET 0,(IX+10h),D&lt;br /&gt;
DDCB10C3    SET 0,(IX+10h),E&lt;br /&gt;
DDCB10C4    SET 0,(IX+10h),H&lt;br /&gt;
DDCB10C5    SET 0,(IX+10h),L&lt;br /&gt;
DDCB10C6    SET 0,(IX+10h) - documented instruction&lt;br /&gt;
DDCB10C7    SET 0,(IX+10h),A&lt;br /&gt;
&amp;lt;/pre&amp;gt; &lt;br /&gt;
So for example with the last instruction, the value of (IX+10h) with bit 0 set is also stored in register A. &lt;br /&gt;
&lt;br /&gt;
The DDCB BIT instructions do not store any value; they merely test a bit. That’s why the undocumented DDCB BIT instructions are no different from the official ones: &lt;br /&gt;
&amp;lt;pre&amp;gt;DDCB d 78   BIT 7,(IX+d)&lt;br /&gt;
DDCB d 79   BIT 7,(IX+d)&lt;br /&gt;
DDCB d 7A   BIT 7,(IX+d)&lt;br /&gt;
DDCB d 7B   BIT 7,(IX+d)&lt;br /&gt;
DDCB d 7C   BIT 7,(IX+d)&lt;br /&gt;
DDCB d 7D   BIT 7,(IX+d)&lt;br /&gt;
DDCB d 7E   BIT 7,(IX+d) - documented instruction&lt;br /&gt;
DDCB d 7F   BIT 7,(IX+d)&lt;br /&gt;
&amp;lt;/pre&amp;gt; &lt;br /&gt;
== FDCB prefix  ==&lt;br /&gt;
&lt;br /&gt;
Same as for the DDCB prefix, though IY is used instead of IX. &lt;br /&gt;
&lt;br /&gt;
== Web links  ==&lt;br /&gt;
&lt;br /&gt;
*[http://www.robsy.net/z80undoc.pdf &amp;quot;The Undocumented Z80 Documented&amp;quot; by Sean Young at Jan Wilmans' Website] &lt;br /&gt;
*[http://www.raww.org/index.php?name=News&amp;amp;file=article&amp;amp;sid=2226 Short information about the internal &amp;quot;MEMPTR&amp;quot; 16bit register of the Z80 and its influence on the F-Register]&lt;br /&gt;
&lt;br /&gt;
[[Category:Programming]]&lt;/div&gt;</summary>
		<author><name>Db6128</name></author>	</entry>

	<entry>
		<id>https://oldwiki.cpcwiki.eu/index.php?title=Z80_-_undocumented_opcodes&amp;diff=84690</id>
		<title>Z80 - undocumented opcodes</title>
		<link rel="alternate" type="text/html" href="https://oldwiki.cpcwiki.eu/index.php?title=Z80_-_undocumented_opcodes&amp;diff=84690"/>
				<updated>2012-12-10T02:23:17Z</updated>
		
		<summary type="html">&lt;p&gt;Db6128: /* DD and FD prefixes */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;The [[Z80|Z80]] CPU contains several undocumented opcodes, which can be quite helpful sometimes. The most useful undocumented opcodes are probably these ones, which split up the 16bit index registers IX and IY in 8bit registers called IXL,IXH,IYL and IYH. &lt;br /&gt;
&lt;br /&gt;
Please note, that many Z80 successors like the Z180 are NOT able to execute some of the following opcodes properly. &lt;br /&gt;
&lt;br /&gt;
This is just an overview. Parts of this article have been copied from the [http://www.myquest.nl/z80undocumented/ &amp;quot;The Undocumented Z80 Documented&amp;quot;] originally by Sean Young and currently maintained by Jan Wilmans, which is one of the most comprehensive descriptions around. &lt;br /&gt;
&lt;br /&gt;
== CB prefix  ==&lt;br /&gt;
&lt;br /&gt;
Of the 247 opcodes that use the prefix &amp;amp;CB, the block &amp;amp;CB &amp;amp;30 to &amp;amp;CB &amp;amp;37 is undocumented officially. These commands shift the operand register left and set its lowest bit to 1.&lt;br /&gt;
&lt;br /&gt;
This is in contrast to SRL (Shift Right Logical), which shifts right and clears the highest bit. Some believe that this difference indicates why these opcodes are undocumented, feeling that this result represents a bug in the Z80 and that the operation was supposed to be Shift Left Logical, which would thus ''clear'' the lowest bit after shifting. Others call the opcodes SLIA, for Shift Left Inverted Arithmetic.&lt;br /&gt;
&lt;br /&gt;
Regardless of the story behind this operation, its effective result is ''register'' = (''register'' * 2) + 1, something that does have its uses and has been employed in various programming contexts for that reason.&lt;br /&gt;
&lt;br /&gt;
If you want a way to do an actual Shift Left Logical, ''i.e.'' ''register'' = ''register'' * 2, first ensure the carry is clear, inserting an OR A or AND A to achieve this if necessary, and then do an RL ''register''.&lt;br /&gt;
&lt;br /&gt;
&amp;lt;pre&amp;gt;CB30 SLL B&lt;br /&gt;
CB31 SLL C&lt;br /&gt;
CB32 SLL D&lt;br /&gt;
CB33 SLL E&lt;br /&gt;
CB34 SLL H&lt;br /&gt;
CB35 SLL L&lt;br /&gt;
CB36 SLL (HL)&lt;br /&gt;
CB37 SLL A&lt;br /&gt;
&amp;lt;/pre&amp;gt;&lt;br /&gt;
&lt;br /&gt;
== DD and FD prefixes  ==&lt;br /&gt;
&lt;br /&gt;
The &amp;amp;DD or &amp;amp;FD prefixes are documented as causing operations using the 16-bit register HL to instead work with either of the 16-bit indexing registers IX or IY; if the operations access a memory location (''i.e.'' normally LD A,(HL), ''etc.''), the opcodes must additionally include an extra byte that specifies a signed displacement (-128 to +127) from IX/IY.&lt;br /&gt;
&lt;br /&gt;
However, Zilog have not documented the fact that these prefixes also affect opcodes that usually refer to the 8-bit components of HL, ''i.e.'' H and L. Thus, one gains access to the additional registers IXH, IXL, IYH, and IYL, for almost all commands that normally use H or L. It is even possible to do things like LD IXH,IXL. These registers can be useful in routines that must process and/or store a lot of numbers. Thankfully, they are not as slow as their 16-bit counterparts: whereas access to (IX+d) is usually slower by 3 NOPs than the equivalent operation upon (HL), using the 8-bit components is (like PUSH IX, ''etc.'') only 1 NOP slower, and this is only due to the need to parse the prefixing byte.&lt;br /&gt;
&lt;br /&gt;
&amp;lt;pre&amp;gt;DB #DD:LD H,A -&amp;amp;gt; LD IXH,A&lt;br /&gt;
DB #FD:LD B,L -&amp;amp;gt; LD B,IYL&lt;br /&gt;
&amp;lt;/pre&amp;gt; &lt;br /&gt;
Note: These registers are called LX, LY, HX, and HY by [[WinAPE]]'s debugger, although its assembler uses the names given above.&lt;br /&gt;
&lt;br /&gt;
== ED prefix  ==&lt;br /&gt;
&lt;br /&gt;
There are a number of undocumented EDxx instructions, of which most are duplicates of documented instructions. Any instruction not listed has no effect (same behaviour as 2 NOP instructions). &lt;br /&gt;
&lt;br /&gt;
The complete list except for the block instructions: &lt;br /&gt;
&amp;lt;pre&amp;gt;ED40 IN B,(C)       ED60 IN H,(C)&lt;br /&gt;
ED41 OUT (C),B      ED61 OUT (C),H&lt;br /&gt;
ED42 SBC HL,BC      ED62 SBC HL,HL&lt;br /&gt;
ED43 LD (nn),BC     ED63 LD (nn),HL&lt;br /&gt;
ED44 NEG            ED64 NEG *&lt;br /&gt;
ED45 RETN           ED65 RETN *&lt;br /&gt;
ED46 IM 0           ED66 IM 0 *&lt;br /&gt;
ED47 LD I,A         ED67 RRD&lt;br /&gt;
ED48 IN C,(C)       ED68 IN L,(C)&lt;br /&gt;
ED49 OUT (C),C      ED69 OUT (C),L&lt;br /&gt;
ED4A ADC HL,BC      ED6A ADC HL,HL&lt;br /&gt;
ED4B LD BC,(nn)     ED6B LD HL,(nn)&lt;br /&gt;
ED4C NEG *          ED6C NEG *&lt;br /&gt;
ED4D RETI           ED6D RETN *&lt;br /&gt;
ED4E IM 0 *         ED6E IM 0 *&lt;br /&gt;
ED4F LD R,A         ED6F RLD&lt;br /&gt;
ED50 IN D,(C)       ED70 IN (C) / IN F,(C) *&lt;br /&gt;
ED51 OUT (C),D      ED71 OUT (C),0 *&lt;br /&gt;
ED52 SBC HL,DE      ED72 SBC HL,SP&lt;br /&gt;
ED53 LD (nn),DE     ED73 LD (nn),SP&lt;br /&gt;
ED54 NEG *          ED74 NEG *&lt;br /&gt;
ED55 RETN *         ED75 RETN *&lt;br /&gt;
ED56 IM 1           ED76 IM 1 *&lt;br /&gt;
ED57 LD A,I         ED77 NOP *&lt;br /&gt;
ED58 IN E,(C)       ED78 IN A,(C)&lt;br /&gt;
ED59 OUT (C),E      ED79 OUT (C),A&lt;br /&gt;
ED5A ADC HL,DE      ED7A ADC HL,SP&lt;br /&gt;
ED5B LD DE,(nn)     ED7B LD SP,(nn)&lt;br /&gt;
ED5C NEG *          ED7C NEG *&lt;br /&gt;
ED5D RETN *         ED7D RETN *&lt;br /&gt;
ED5E IM 2           ED7E IM 2 *&lt;br /&gt;
ED5F LD A,R         ED7F NOP *&lt;br /&gt;
* = undocumented opcodes&lt;br /&gt;
&amp;lt;/pre&amp;gt; &lt;br /&gt;
== DDCB prefix  ==&lt;br /&gt;
&lt;br /&gt;
The undocumented DDCB instructions store the result (if any) of the operation in one of the seven all-purpose registers, which one depends on the lower 3 bits of the last byte of the opcode (not operand, so not the offset). &lt;br /&gt;
&amp;lt;pre&amp;gt;000 B&lt;br /&gt;
001 C&lt;br /&gt;
010 D&lt;br /&gt;
011 E&lt;br /&gt;
100 H&lt;br /&gt;
101 L&lt;br /&gt;
110 (none: documented opcode)&lt;br /&gt;
111 A&lt;br /&gt;
&amp;lt;/pre&amp;gt; &lt;br /&gt;
The documented DDCB0106 is RLC (IX+01h). So, clear the lower three bits (DDCB0100) and something is done to register B. The result of the RLC (which is stored in (IX+01h)) is now also stored in register B. Effectively, it does the following: &lt;br /&gt;
&amp;lt;pre&amp;gt;LD B,(IX+01h)&lt;br /&gt;
RLC B&lt;br /&gt;
LD (IX+01h),B&lt;br /&gt;
&amp;lt;/pre&amp;gt; &lt;br /&gt;
So you get double value for money. The result is stored in B and (IX+01h). The most common notation is: RLC (IX+01h),B &lt;br /&gt;
&lt;br /&gt;
I’ve once seen this notation: &lt;br /&gt;
&amp;lt;pre&amp;gt;RLC (IX+01h)&lt;br /&gt;
LD B,(IX+01h)&lt;br /&gt;
&amp;lt;/pre&amp;gt; &lt;br /&gt;
That’s not correct: B contains the rotated value, even if (IX+01h) points to ROM. The DDCB SET and RES instructions do the same thing as the shift/rotate instructions: &lt;br /&gt;
&amp;lt;pre&amp;gt;DDCB10C0    SET 0,(IX+10h),B&lt;br /&gt;
DDCB10C1    SET 0,(IX+10h),C&lt;br /&gt;
DDCB10C2    SET 0,(IX+10h),D&lt;br /&gt;
DDCB10C3    SET 0,(IX+10h),E&lt;br /&gt;
DDCB10C4    SET 0,(IX+10h),H&lt;br /&gt;
DDCB10C5    SET 0,(IX+10h),L&lt;br /&gt;
DDCB10C6    SET 0,(IX+10h) - documented instruction&lt;br /&gt;
DDCB10C7    SET 0,(IX+10h),A&lt;br /&gt;
&amp;lt;/pre&amp;gt; &lt;br /&gt;
So for example with the last instruction, the value of (IX+10h) with bit 0 set is also stored in register A. &lt;br /&gt;
&lt;br /&gt;
The DDCB BIT instructions do not store any value; they merely test a bit. That’s why the undocumented DDCB BIT instructions are no different from the official ones: &lt;br /&gt;
&amp;lt;pre&amp;gt;DDCB d 78   BIT 7,(IX+d)&lt;br /&gt;
DDCB d 79   BIT 7,(IX+d)&lt;br /&gt;
DDCB d 7A   BIT 7,(IX+d)&lt;br /&gt;
DDCB d 7B   BIT 7,(IX+d)&lt;br /&gt;
DDCB d 7C   BIT 7,(IX+d)&lt;br /&gt;
DDCB d 7D   BIT 7,(IX+d)&lt;br /&gt;
DDCB d 7E   BIT 7,(IX+d) - documented instruction&lt;br /&gt;
DDCB d 7F   BIT 7,(IX+d)&lt;br /&gt;
&amp;lt;/pre&amp;gt; &lt;br /&gt;
== FDCB prefix  ==&lt;br /&gt;
&lt;br /&gt;
Same as for the DDCB prefix, though IY is used instead of IX. &lt;br /&gt;
&lt;br /&gt;
== Web links  ==&lt;br /&gt;
&lt;br /&gt;
*[http://www.robsy.net/z80undoc.pdf &amp;quot;The Undocumented Z80 Documented&amp;quot; by Sean Young at Jan Wilmans' Website] &lt;br /&gt;
*[http://www.raww.org/index.php?name=News&amp;amp;file=article&amp;amp;sid=2226 Short information about the internal &amp;quot;MEMPTR&amp;quot; 16bit register of the Z80 and its influence on the F-Register]&lt;br /&gt;
&lt;br /&gt;
[[Category:Programming]]&lt;/div&gt;</summary>
		<author><name>Db6128</name></author>	</entry>

	<entry>
		<id>https://oldwiki.cpcwiki.eu/index.php?title=Z80_-_undocumented_opcodes&amp;diff=84689</id>
		<title>Z80 - undocumented opcodes</title>
		<link rel="alternate" type="text/html" href="https://oldwiki.cpcwiki.eu/index.php?title=Z80_-_undocumented_opcodes&amp;diff=84689"/>
				<updated>2012-12-10T02:13:56Z</updated>
		
		<summary type="html">&lt;p&gt;Db6128: /* CB prefix */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;The [[Z80|Z80]] CPU contains several undocumented opcodes, which can be quite helpful sometimes. The most useful undocumented opcodes are probably these ones, which split up the 16bit index registers IX and IY in 8bit registers called IXL,IXH,IYL and IYH. &lt;br /&gt;
&lt;br /&gt;
Please note, that many Z80 successors like the Z180 are NOT able to execute some of the following opcodes properly. &lt;br /&gt;
&lt;br /&gt;
This is just an overview. Parts of this article have been copied from the [http://www.myquest.nl/z80undocumented/ &amp;quot;The Undocumented Z80 Documented&amp;quot;] originally by Sean Young and currently maintained by Jan Wilmans, which is one of the most comprehensive descriptions around. &lt;br /&gt;
&lt;br /&gt;
== CB prefix  ==&lt;br /&gt;
&lt;br /&gt;
Of the 247 opcodes that use the prefix &amp;amp;CB, the block &amp;amp;CB &amp;amp;30 to &amp;amp;CB &amp;amp;37 is undocumented officially. These commands shift the operand register left and set its lowest bit to 1.&lt;br /&gt;
&lt;br /&gt;
This is in contrast to SRL (Shift Right Logical), which shifts right and clears the highest bit. Some believe that this difference indicates why these opcodes are undocumented, feeling that this result represents a bug in the Z80 and that the operation was supposed to be Shift Left Logical, which would thus ''clear'' the lowest bit after shifting. Others call the opcodes SLIA, for Shift Left Inverted Arithmetic.&lt;br /&gt;
&lt;br /&gt;
Regardless of the story behind this operation, its effective result is ''register'' = (''register'' * 2) + 1, something that does have its uses and has been employed in various programming contexts for that reason.&lt;br /&gt;
&lt;br /&gt;
If you want a way to do an actual Shift Left Logical, ''i.e.'' ''register'' = ''register'' * 2, first ensure the carry is clear, inserting an OR A or AND A to achieve this if necessary, and then do an RL ''register''.&lt;br /&gt;
&lt;br /&gt;
&amp;lt;pre&amp;gt;CB30 SLL B&lt;br /&gt;
CB31 SLL C&lt;br /&gt;
CB32 SLL D&lt;br /&gt;
CB33 SLL E&lt;br /&gt;
CB34 SLL H&lt;br /&gt;
CB35 SLL L&lt;br /&gt;
CB36 SLL (HL)&lt;br /&gt;
CB37 SLL A&lt;br /&gt;
&amp;lt;/pre&amp;gt;&lt;br /&gt;
&lt;br /&gt;
== DD and FD prefixes  ==&lt;br /&gt;
&lt;br /&gt;
The DD/FD prefixes replace the registers L, H or HL with IXL/IYL, IXH/IYH or IX/IY. &lt;br /&gt;
&amp;lt;pre&amp;gt;DB #DD:LD H,A -&amp;amp;gt; LD IXH,A&lt;br /&gt;
DB #FD:LD B,L -&amp;amp;gt; LD B,IYL&lt;br /&gt;
&amp;lt;/pre&amp;gt; &lt;br /&gt;
Note: These registers are called LX, LY, HX and HY in the WinAPE assembler. &lt;br /&gt;
&lt;br /&gt;
== ED prefix  ==&lt;br /&gt;
&lt;br /&gt;
There are a number of undocumented EDxx instructions, of which most are duplicates of documented instructions. Any instruction not listed has no effect (same behaviour as 2 NOP instructions). &lt;br /&gt;
&lt;br /&gt;
The complete list except for the block instructions: &lt;br /&gt;
&amp;lt;pre&amp;gt;ED40 IN B,(C)       ED60 IN H,(C)&lt;br /&gt;
ED41 OUT (C),B      ED61 OUT (C),H&lt;br /&gt;
ED42 SBC HL,BC      ED62 SBC HL,HL&lt;br /&gt;
ED43 LD (nn),BC     ED63 LD (nn),HL&lt;br /&gt;
ED44 NEG            ED64 NEG *&lt;br /&gt;
ED45 RETN           ED65 RETN *&lt;br /&gt;
ED46 IM 0           ED66 IM 0 *&lt;br /&gt;
ED47 LD I,A         ED67 RRD&lt;br /&gt;
ED48 IN C,(C)       ED68 IN L,(C)&lt;br /&gt;
ED49 OUT (C),C      ED69 OUT (C),L&lt;br /&gt;
ED4A ADC HL,BC      ED6A ADC HL,HL&lt;br /&gt;
ED4B LD BC,(nn)     ED6B LD HL,(nn)&lt;br /&gt;
ED4C NEG *          ED6C NEG *&lt;br /&gt;
ED4D RETI           ED6D RETN *&lt;br /&gt;
ED4E IM 0 *         ED6E IM 0 *&lt;br /&gt;
ED4F LD R,A         ED6F RLD&lt;br /&gt;
ED50 IN D,(C)       ED70 IN (C) / IN F,(C) *&lt;br /&gt;
ED51 OUT (C),D      ED71 OUT (C),0 *&lt;br /&gt;
ED52 SBC HL,DE      ED72 SBC HL,SP&lt;br /&gt;
ED53 LD (nn),DE     ED73 LD (nn),SP&lt;br /&gt;
ED54 NEG *          ED74 NEG *&lt;br /&gt;
ED55 RETN *         ED75 RETN *&lt;br /&gt;
ED56 IM 1           ED76 IM 1 *&lt;br /&gt;
ED57 LD A,I         ED77 NOP *&lt;br /&gt;
ED58 IN E,(C)       ED78 IN A,(C)&lt;br /&gt;
ED59 OUT (C),E      ED79 OUT (C),A&lt;br /&gt;
ED5A ADC HL,DE      ED7A ADC HL,SP&lt;br /&gt;
ED5B LD DE,(nn)     ED7B LD SP,(nn)&lt;br /&gt;
ED5C NEG *          ED7C NEG *&lt;br /&gt;
ED5D RETN *         ED7D RETN *&lt;br /&gt;
ED5E IM 2           ED7E IM 2 *&lt;br /&gt;
ED5F LD A,R         ED7F NOP *&lt;br /&gt;
* = undocumented opcodes&lt;br /&gt;
&amp;lt;/pre&amp;gt; &lt;br /&gt;
== DDCB prefix  ==&lt;br /&gt;
&lt;br /&gt;
The undocumented DDCB instructions store the result (if any) of the operation in one of the seven all-purpose registers, which one depends on the lower 3 bits of the last byte of the opcode (not operand, so not the offset). &lt;br /&gt;
&amp;lt;pre&amp;gt;000 B&lt;br /&gt;
001 C&lt;br /&gt;
010 D&lt;br /&gt;
011 E&lt;br /&gt;
100 H&lt;br /&gt;
101 L&lt;br /&gt;
110 (none: documented opcode)&lt;br /&gt;
111 A&lt;br /&gt;
&amp;lt;/pre&amp;gt; &lt;br /&gt;
The documented DDCB0106 is RLC (IX+01h). So, clear the lower three bits (DDCB0100) and something is done to register B. The result of the RLC (which is stored in (IX+01h)) is now also stored in register B. Effectively, it does the following: &lt;br /&gt;
&amp;lt;pre&amp;gt;LD B,(IX+01h)&lt;br /&gt;
RLC B&lt;br /&gt;
LD (IX+01h),B&lt;br /&gt;
&amp;lt;/pre&amp;gt; &lt;br /&gt;
So you get double value for money. The result is stored in B and (IX+01h). The most common notation is: RLC (IX+01h),B &lt;br /&gt;
&lt;br /&gt;
I’ve once seen this notation: &lt;br /&gt;
&amp;lt;pre&amp;gt;RLC (IX+01h)&lt;br /&gt;
LD B,(IX+01h)&lt;br /&gt;
&amp;lt;/pre&amp;gt; &lt;br /&gt;
That’s not correct: B contains the rotated value, even if (IX+01h) points to ROM. The DDCB SET and RES instructions do the same thing as the shift/rotate instructions: &lt;br /&gt;
&amp;lt;pre&amp;gt;DDCB10C0    SET 0,(IX+10h),B&lt;br /&gt;
DDCB10C1    SET 0,(IX+10h),C&lt;br /&gt;
DDCB10C2    SET 0,(IX+10h),D&lt;br /&gt;
DDCB10C3    SET 0,(IX+10h),E&lt;br /&gt;
DDCB10C4    SET 0,(IX+10h),H&lt;br /&gt;
DDCB10C5    SET 0,(IX+10h),L&lt;br /&gt;
DDCB10C6    SET 0,(IX+10h) - documented instruction&lt;br /&gt;
DDCB10C7    SET 0,(IX+10h),A&lt;br /&gt;
&amp;lt;/pre&amp;gt; &lt;br /&gt;
So for example with the last instruction, the value of (IX+10h) with bit 0 set is also stored in register A. &lt;br /&gt;
&lt;br /&gt;
The DDCB BIT instructions do not store any value; they merely test a bit. That’s why the undocumented DDCB BIT instructions are no different from the official ones: &lt;br /&gt;
&amp;lt;pre&amp;gt;DDCB d 78   BIT 7,(IX+d)&lt;br /&gt;
DDCB d 79   BIT 7,(IX+d)&lt;br /&gt;
DDCB d 7A   BIT 7,(IX+d)&lt;br /&gt;
DDCB d 7B   BIT 7,(IX+d)&lt;br /&gt;
DDCB d 7C   BIT 7,(IX+d)&lt;br /&gt;
DDCB d 7D   BIT 7,(IX+d)&lt;br /&gt;
DDCB d 7E   BIT 7,(IX+d) - documented instruction&lt;br /&gt;
DDCB d 7F   BIT 7,(IX+d)&lt;br /&gt;
&amp;lt;/pre&amp;gt; &lt;br /&gt;
== FDCB prefix  ==&lt;br /&gt;
&lt;br /&gt;
Same as for the DDCB prefix, though IY is used instead of IX. &lt;br /&gt;
&lt;br /&gt;
== Web links  ==&lt;br /&gt;
&lt;br /&gt;
*[http://www.robsy.net/z80undoc.pdf &amp;quot;The Undocumented Z80 Documented&amp;quot; by Sean Young at Jan Wilmans' Website] &lt;br /&gt;
*[http://www.raww.org/index.php?name=News&amp;amp;file=article&amp;amp;sid=2226 Short information about the internal &amp;quot;MEMPTR&amp;quot; 16bit register of the Z80 and its influence on the F-Register]&lt;br /&gt;
&lt;br /&gt;
[[Category:Programming]]&lt;/div&gt;</summary>
		<author><name>Db6128</name></author>	</entry>

	<entry>
		<id>https://oldwiki.cpcwiki.eu/index.php?title=Z80_-_undocumented_opcodes&amp;diff=84688</id>
		<title>Z80 - undocumented opcodes</title>
		<link rel="alternate" type="text/html" href="https://oldwiki.cpcwiki.eu/index.php?title=Z80_-_undocumented_opcodes&amp;diff=84688"/>
				<updated>2012-12-10T02:13:29Z</updated>
		
		<summary type="html">&lt;p&gt;Db6128: /* CB prefix */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;The [[Z80|Z80]] CPU contains several undocumented opcodes, which can be quite helpful sometimes. The most useful undocumented opcodes are probably these ones, which split up the 16bit index registers IX and IY in 8bit registers called IXL,IXH,IYL and IYH. &lt;br /&gt;
&lt;br /&gt;
Please note, that many Z80 successors like the Z180 are NOT able to execute some of the following opcodes properly. &lt;br /&gt;
&lt;br /&gt;
This is just an overview. Parts of this article have been copied from the [http://www.myquest.nl/z80undocumented/ &amp;quot;The Undocumented Z80 Documented&amp;quot;] originally by Sean Young and currently maintained by Jan Wilmans, which is one of the most comprehensive descriptions around. &lt;br /&gt;
&lt;br /&gt;
== CB prefix  ==&lt;br /&gt;
&lt;br /&gt;
Of the 247 opcodes that use the prefix &amp;amp;CB, the block &amp;amp;CB &amp;amp;30 to &amp;amp;CB &amp;amp;37 is undocumented officially. These commands shift the operand register left and set its lowest bit to 1.&lt;br /&gt;
&lt;br /&gt;
This is in contrast to SRL (Shift Right Logical), which shifts right and clears the highest bit. Some believe that this difference indicates why these opcodes are undocumented, feeling that this result represent a bug in the Z80 and that the operation was supposed to be Shift Left Logical, which would thus ''clear'' the lowest bit after shifting. Others call the opcodes SLIA, for Shift Left Inverted Arithmetic.&lt;br /&gt;
&lt;br /&gt;
Regardless of the story behind this operation, its effective result of the operation is ''register'' = (''register'' * 2) + 1, something that does have its uses and has been employed in various programming contexts for that reason.&lt;br /&gt;
&lt;br /&gt;
If you want a way to do an actual Shift Left Logical, ''i.e.'' ''register'' = ''register'' * 2, first ensure the carry is clear, inserting an OR A or AND A to achieve this if necessary, and then do an RL ''register''.&lt;br /&gt;
&lt;br /&gt;
&amp;lt;pre&amp;gt;CB30 SLL B&lt;br /&gt;
CB31 SLL C&lt;br /&gt;
CB32 SLL D&lt;br /&gt;
CB33 SLL E&lt;br /&gt;
CB34 SLL H&lt;br /&gt;
CB35 SLL L&lt;br /&gt;
CB36 SLL (HL)&lt;br /&gt;
CB37 SLL A&lt;br /&gt;
&amp;lt;/pre&amp;gt;&lt;br /&gt;
&lt;br /&gt;
== DD and FD prefixes  ==&lt;br /&gt;
&lt;br /&gt;
The DD/FD prefixes replace the registers L, H or HL with IXL/IYL, IXH/IYH or IX/IY. &lt;br /&gt;
&amp;lt;pre&amp;gt;DB #DD:LD H,A -&amp;amp;gt; LD IXH,A&lt;br /&gt;
DB #FD:LD B,L -&amp;amp;gt; LD B,IYL&lt;br /&gt;
&amp;lt;/pre&amp;gt; &lt;br /&gt;
Note: These registers are called LX, LY, HX and HY in the WinAPE assembler. &lt;br /&gt;
&lt;br /&gt;
== ED prefix  ==&lt;br /&gt;
&lt;br /&gt;
There are a number of undocumented EDxx instructions, of which most are duplicates of documented instructions. Any instruction not listed has no effect (same behaviour as 2 NOP instructions). &lt;br /&gt;
&lt;br /&gt;
The complete list except for the block instructions: &lt;br /&gt;
&amp;lt;pre&amp;gt;ED40 IN B,(C)       ED60 IN H,(C)&lt;br /&gt;
ED41 OUT (C),B      ED61 OUT (C),H&lt;br /&gt;
ED42 SBC HL,BC      ED62 SBC HL,HL&lt;br /&gt;
ED43 LD (nn),BC     ED63 LD (nn),HL&lt;br /&gt;
ED44 NEG            ED64 NEG *&lt;br /&gt;
ED45 RETN           ED65 RETN *&lt;br /&gt;
ED46 IM 0           ED66 IM 0 *&lt;br /&gt;
ED47 LD I,A         ED67 RRD&lt;br /&gt;
ED48 IN C,(C)       ED68 IN L,(C)&lt;br /&gt;
ED49 OUT (C),C      ED69 OUT (C),L&lt;br /&gt;
ED4A ADC HL,BC      ED6A ADC HL,HL&lt;br /&gt;
ED4B LD BC,(nn)     ED6B LD HL,(nn)&lt;br /&gt;
ED4C NEG *          ED6C NEG *&lt;br /&gt;
ED4D RETI           ED6D RETN *&lt;br /&gt;
ED4E IM 0 *         ED6E IM 0 *&lt;br /&gt;
ED4F LD R,A         ED6F RLD&lt;br /&gt;
ED50 IN D,(C)       ED70 IN (C) / IN F,(C) *&lt;br /&gt;
ED51 OUT (C),D      ED71 OUT (C),0 *&lt;br /&gt;
ED52 SBC HL,DE      ED72 SBC HL,SP&lt;br /&gt;
ED53 LD (nn),DE     ED73 LD (nn),SP&lt;br /&gt;
ED54 NEG *          ED74 NEG *&lt;br /&gt;
ED55 RETN *         ED75 RETN *&lt;br /&gt;
ED56 IM 1           ED76 IM 1 *&lt;br /&gt;
ED57 LD A,I         ED77 NOP *&lt;br /&gt;
ED58 IN E,(C)       ED78 IN A,(C)&lt;br /&gt;
ED59 OUT (C),E      ED79 OUT (C),A&lt;br /&gt;
ED5A ADC HL,DE      ED7A ADC HL,SP&lt;br /&gt;
ED5B LD DE,(nn)     ED7B LD SP,(nn)&lt;br /&gt;
ED5C NEG *          ED7C NEG *&lt;br /&gt;
ED5D RETN *         ED7D RETN *&lt;br /&gt;
ED5E IM 2           ED7E IM 2 *&lt;br /&gt;
ED5F LD A,R         ED7F NOP *&lt;br /&gt;
* = undocumented opcodes&lt;br /&gt;
&amp;lt;/pre&amp;gt; &lt;br /&gt;
== DDCB prefix  ==&lt;br /&gt;
&lt;br /&gt;
The undocumented DDCB instructions store the result (if any) of the operation in one of the seven all-purpose registers, which one depends on the lower 3 bits of the last byte of the opcode (not operand, so not the offset). &lt;br /&gt;
&amp;lt;pre&amp;gt;000 B&lt;br /&gt;
001 C&lt;br /&gt;
010 D&lt;br /&gt;
011 E&lt;br /&gt;
100 H&lt;br /&gt;
101 L&lt;br /&gt;
110 (none: documented opcode)&lt;br /&gt;
111 A&lt;br /&gt;
&amp;lt;/pre&amp;gt; &lt;br /&gt;
The documented DDCB0106 is RLC (IX+01h). So, clear the lower three bits (DDCB0100) and something is done to register B. The result of the RLC (which is stored in (IX+01h)) is now also stored in register B. Effectively, it does the following: &lt;br /&gt;
&amp;lt;pre&amp;gt;LD B,(IX+01h)&lt;br /&gt;
RLC B&lt;br /&gt;
LD (IX+01h),B&lt;br /&gt;
&amp;lt;/pre&amp;gt; &lt;br /&gt;
So you get double value for money. The result is stored in B and (IX+01h). The most common notation is: RLC (IX+01h),B &lt;br /&gt;
&lt;br /&gt;
I’ve once seen this notation: &lt;br /&gt;
&amp;lt;pre&amp;gt;RLC (IX+01h)&lt;br /&gt;
LD B,(IX+01h)&lt;br /&gt;
&amp;lt;/pre&amp;gt; &lt;br /&gt;
That’s not correct: B contains the rotated value, even if (IX+01h) points to ROM. The DDCB SET and RES instructions do the same thing as the shift/rotate instructions: &lt;br /&gt;
&amp;lt;pre&amp;gt;DDCB10C0    SET 0,(IX+10h),B&lt;br /&gt;
DDCB10C1    SET 0,(IX+10h),C&lt;br /&gt;
DDCB10C2    SET 0,(IX+10h),D&lt;br /&gt;
DDCB10C3    SET 0,(IX+10h),E&lt;br /&gt;
DDCB10C4    SET 0,(IX+10h),H&lt;br /&gt;
DDCB10C5    SET 0,(IX+10h),L&lt;br /&gt;
DDCB10C6    SET 0,(IX+10h) - documented instruction&lt;br /&gt;
DDCB10C7    SET 0,(IX+10h),A&lt;br /&gt;
&amp;lt;/pre&amp;gt; &lt;br /&gt;
So for example with the last instruction, the value of (IX+10h) with bit 0 set is also stored in register A. &lt;br /&gt;
&lt;br /&gt;
The DDCB BIT instructions do not store any value; they merely test a bit. That’s why the undocumented DDCB BIT instructions are no different from the official ones: &lt;br /&gt;
&amp;lt;pre&amp;gt;DDCB d 78   BIT 7,(IX+d)&lt;br /&gt;
DDCB d 79   BIT 7,(IX+d)&lt;br /&gt;
DDCB d 7A   BIT 7,(IX+d)&lt;br /&gt;
DDCB d 7B   BIT 7,(IX+d)&lt;br /&gt;
DDCB d 7C   BIT 7,(IX+d)&lt;br /&gt;
DDCB d 7D   BIT 7,(IX+d)&lt;br /&gt;
DDCB d 7E   BIT 7,(IX+d) - documented instruction&lt;br /&gt;
DDCB d 7F   BIT 7,(IX+d)&lt;br /&gt;
&amp;lt;/pre&amp;gt; &lt;br /&gt;
== FDCB prefix  ==&lt;br /&gt;
&lt;br /&gt;
Same as for the DDCB prefix, though IY is used instead of IX. &lt;br /&gt;
&lt;br /&gt;
== Web links  ==&lt;br /&gt;
&lt;br /&gt;
*[http://www.robsy.net/z80undoc.pdf &amp;quot;The Undocumented Z80 Documented&amp;quot; by Sean Young at Jan Wilmans' Website] &lt;br /&gt;
*[http://www.raww.org/index.php?name=News&amp;amp;file=article&amp;amp;sid=2226 Short information about the internal &amp;quot;MEMPTR&amp;quot; 16bit register of the Z80 and its influence on the F-Register]&lt;br /&gt;
&lt;br /&gt;
[[Category:Programming]]&lt;/div&gt;</summary>
		<author><name>Db6128</name></author>	</entry>

	<entry>
		<id>https://oldwiki.cpcwiki.eu/index.php?title=Mission_Genocide&amp;diff=84663</id>
		<title>Mission Genocide</title>
		<link rel="alternate" type="text/html" href="https://oldwiki.cpcwiki.eu/index.php?title=Mission_Genocide&amp;diff=84663"/>
				<updated>2012-12-03T18:09:36Z</updated>
		
		<summary type="html">&lt;p&gt;Db6128: Adding info on Shirley's alias being Rotovision and on the port to the C64. Now, how do we get that info-box to actually align to the right?&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;{|align=&amp;quot;right&amp;quot; valign=&amp;quot;top&amp;quot;&lt;br /&gt;
|{{Infobox Game&lt;br /&gt;
|Image = [[Image:Mission genocide (K7) (Firebird Software) (199 Silver Range) (1987) (Standard Jewel Case) - (Front).jpg|center|300px|Titlescreen of the game]]&lt;br /&gt;
|Company = [[Firebird]]&lt;br /&gt;
|Developer = [http://www.dadgum.com/halcyon/BOOK/SHIRLEY.HTM Paul Shirley] a.k.a. Rotovision&lt;br /&gt;
|Publisher = [[Firebird]]&lt;br /&gt;
|Musician = Unknown&lt;br /&gt;
|Release = [[:Category:Games 1987|1987]]&lt;br /&gt;
|Platform = [[Amstrad CPC|CPC]], [[Commodore 64]]&lt;br /&gt;
|Genre = Shoot'Em Up&lt;br /&gt;
|GameModes = Unknown&lt;br /&gt;
|Controls = {{Keyboard}} {{Joystick}}&lt;br /&gt;
|Media = {{Disk}} {{Tape}}&lt;br /&gt;
|Language = {{EN}}&lt;br /&gt;
|Info = Unknown&lt;br /&gt;
}}&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
'''''Mission Genocide''''', originally titled '''''ZTB''''' (for ''Zap the Bastards'' and later ''Badstars'' [http://www.dadgum.com/halcyon/BOOK/SHIRLEY.HTM]) and still named thusly on the loading screen and elsewhere, is a game by Paul Shirley (a.k.a. Rotovision) for the old generation of CPCs, released on both tape and disc and compatible with all models.&lt;br /&gt;
&lt;br /&gt;
The game is mentioned fairly often for its smooth and pixel-perfect vertical scrolling, which is done in hardware using the [[CRTC]]. It is also notable in using a very fast method of plotting sprites, which takes advantage of the 16 colours of graphical Mode 0 by using 3 for sprites, Ink 0 for transparency, and the remaining 12 as 3 duplicate sets of 4 colours for the background: the roles of these Inks are arranged according to binary logic so that sprites can be ORd onto the background and ANDed to remove them, a method that is much faster and more memory-efficient than storing a sprite and a masking table and then performing all the relevant masking operations between these and the background. The name Rotovision has been used to refer to either of these techniques, but this seems actually to be an alias of the game’s programmer Paul Shirley: different ROMs of the game display one of these two names.&lt;br /&gt;
&lt;br /&gt;
Shirley later ported ''Mission Genocide'' from the CPC to the [[Commodore 64]], although he says that version is “not worth the tape it's saved on”, unlike the “technically impressive” original version.&lt;br /&gt;
&lt;br /&gt;
== Covertapes ==&lt;br /&gt;
&lt;br /&gt;
&amp;lt;gallery caption=&amp;quot;Mission Genocide&amp;quot;&amp;gt;&lt;br /&gt;
&lt;br /&gt;
Image:Mission genocide (K7) (Firebird Software) (199 Silver Range) (1987) (Standard Jewel Case) - (Back).jpg|Back Covertape&lt;br /&gt;
Image:Mission genocide (K7) (Firebird Software) (199 Silver Range) (1987) (Standard Jewel Case) - (Front).jpg|Front Covertape&lt;br /&gt;
&lt;br /&gt;
&amp;lt;/gallery&amp;gt;&lt;br /&gt;
&lt;br /&gt;
== Tape ==&lt;br /&gt;
&lt;br /&gt;
&amp;lt;gallery caption=&amp;quot;Mission Genocide&amp;quot;&amp;gt;&lt;br /&gt;
&lt;br /&gt;
Image:Mission genocide (K7) (Firebird Software) (199 Silver Range) (1987) (Standard Jewel Case) - (Media).jpg|Tape&lt;br /&gt;
&lt;br /&gt;
&amp;lt;/gallery&amp;gt;&lt;br /&gt;
&lt;br /&gt;
== Download ==&lt;br /&gt;
&lt;br /&gt;
* [[Media:Mission genocide (Firebird Software) (199 Silver Range) (1987) (Standard Jewel Case).cdt.zip|Mission genocide (Firebird Software) (199 Silver Range) (1987) (Standard Jewel Case).cdt.zip]] (CDT for Emulators)&lt;br /&gt;
&lt;br /&gt;
== Reviews ==&lt;br /&gt;
&lt;br /&gt;
* [[Amstrad Computer User]] July of 1987:&lt;br /&gt;
&amp;lt;gallery&amp;gt;&lt;br /&gt;
image:MissionGenocide ACU July1987 p1.jpg|page 40&lt;br /&gt;
image:MissionGenocide ACU July1987 p2.jpg|page 41&lt;br /&gt;
&amp;lt;/gallery&amp;gt;&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
== Links ==&lt;br /&gt;
&lt;br /&gt;
* [http://www.cpc-power.com/index.php?page=detail&amp;amp;num=99 CPC game base from CPC Power]&lt;br /&gt;
* [http://tacgr.emuunlim.com/downloads/filedetail.php?recid=580 The Amstrad CPC Games Resource]&lt;br /&gt;
* [http://www.dadgum.com/halcyon/BOOK/SHIRLEY.HTM Interview with coder Paul Shirley], in which he discusses the alternative titles, his lack of faith in his conversion of the game to the Commodore 64, and topics about other projects.&lt;br /&gt;
&lt;br /&gt;
[[Category:Games]] [[Category:Games 1987]]&lt;/div&gt;</summary>
		<author><name>Db6128</name></author>	</entry>

	<entry>
		<id>https://oldwiki.cpcwiki.eu/index.php?title=Mission_Genocide&amp;diff=84662</id>
		<title>Mission Genocide</title>
		<link rel="alternate" type="text/html" href="https://oldwiki.cpcwiki.eu/index.php?title=Mission_Genocide&amp;diff=84662"/>
				<updated>2012-12-03T17:49:34Z</updated>
		
		<summary type="html">&lt;p&gt;Db6128: Adding programmer, link to interview, alternative title, info on relatively famous graphical tricks, etc.&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;{| align=&amp;quot;right&amp;quot; valign=&amp;quot;top&amp;quot;&lt;br /&gt;
|{{Infobox Game&lt;br /&gt;
|Image = [[Image:Mission genocide (K7) (Firebird Software) (199 Silver Range) (1987) (Standard Jewel Case) - (Front).jpg|center|300px|Titlescreen of the game]]&lt;br /&gt;
|Company = [[Firebird]]&lt;br /&gt;
|Developer = [http://www.dadgum.com/halcyon/BOOK/SHIRLEY.HTM Paul Shirley]&lt;br /&gt;
|Publisher = [[Firebird]]&lt;br /&gt;
|Musician = Unknown&lt;br /&gt;
|Release = [[:Category:Games 1987|1987]]&lt;br /&gt;
|Platform = [[Amstrad CPC|CPC]]&lt;br /&gt;
|Genre = Shoot'Em Up&lt;br /&gt;
|GameModes = Unknown&lt;br /&gt;
|Controls = {{Keyboard}} {{Joystick}}&lt;br /&gt;
|Media = {{Disk}} {{Tape}}&lt;br /&gt;
|Language = {{EN}}&lt;br /&gt;
|Info = Unknown&lt;br /&gt;
}}&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
'''''Mission Genocide''''', alternatively titled '''''ZTB''''' (for ''Zap the Bastards'' and later ''Badstars'' [http://www.dadgum.com/halcyon/BOOK/SHIRLEY.HTM]) on the loading screen and elsewhere, is a game for the old generation of CPCs, released on both tape and disc and compatible with all models.&lt;br /&gt;
&lt;br /&gt;
The game is mentioned fairly often for its smooth and pixel-perfect vertical scrolling, which is done in hardware using the [[CRTC]]. It is also notable in using a very fast method of plotting sprites, which takes advantage of the 16 colours of graphical Mode 0 by using 3 for sprites, Ink 0 for transparency, and the remaining 12 as 3 duplicate sets of 4 colours for the background: the roles of these Inks are arranged according to binary logic so that sprites can be ORd onto the background and ANDed to remove them, a method that is much faster and more memory-efficient than storing a sprite and a masking table and then performing all the relevant masking operations between these and the background.&lt;br /&gt;
&lt;br /&gt;
== Covertapes ==&lt;br /&gt;
&lt;br /&gt;
&amp;lt;gallery caption=&amp;quot;Mission Genocide&amp;quot;&amp;gt;&lt;br /&gt;
&lt;br /&gt;
Image:Mission genocide (K7) (Firebird Software) (199 Silver Range) (1987) (Standard Jewel Case) - (Back).jpg|Back Covertape&lt;br /&gt;
Image:Mission genocide (K7) (Firebird Software) (199 Silver Range) (1987) (Standard Jewel Case) - (Front).jpg|Front Covertape&lt;br /&gt;
&lt;br /&gt;
&amp;lt;/gallery&amp;gt;&lt;br /&gt;
&lt;br /&gt;
== Tape ==&lt;br /&gt;
&lt;br /&gt;
&amp;lt;gallery caption=&amp;quot;Mission Genocide&amp;quot;&amp;gt;&lt;br /&gt;
&lt;br /&gt;
Image:Mission genocide (K7) (Firebird Software) (199 Silver Range) (1987) (Standard Jewel Case) - (Media).jpg|Tape&lt;br /&gt;
&lt;br /&gt;
&amp;lt;/gallery&amp;gt;&lt;br /&gt;
&lt;br /&gt;
== Download ==&lt;br /&gt;
&lt;br /&gt;
* [[Media:Mission genocide (Firebird Software) (199 Silver Range) (1987) (Standard Jewel Case).cdt.zip|Mission genocide (Firebird Software) (199 Silver Range) (1987) (Standard Jewel Case).cdt.zip]] (CDT for Emulators)&lt;br /&gt;
&lt;br /&gt;
== Reviews ==&lt;br /&gt;
&lt;br /&gt;
* [[Amstrad Computer User]] July of 1987:&lt;br /&gt;
&amp;lt;gallery&amp;gt;&lt;br /&gt;
image:MissionGenocide ACU July1987 p1.jpg|page 40&lt;br /&gt;
image:MissionGenocide ACU July1987 p2.jpg|page 41&lt;br /&gt;
&amp;lt;/gallery&amp;gt;&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
== Links ==&lt;br /&gt;
&lt;br /&gt;
* [http://www.cpc-power.com/index.php?page=detail&amp;amp;num=99 CPC game base from CPC Power]&lt;br /&gt;
* [http://tacgr.emuunlim.com/downloads/filedetail.php?recid=580 The Amstrad CPC Games Resource]&lt;br /&gt;
* [http://www.dadgum.com/halcyon/BOOK/SHIRLEY.HTM Interview with coder Paul Shirley], in which he discusses the alternative title, his lack of faith in his conversion of the game to the Commodore 64, and topics about other projects.&lt;br /&gt;
&lt;br /&gt;
[[Category:Games]] [[Category:Games 1987]]&lt;/div&gt;</summary>
		<author><name>Db6128</name></author>	</entry>

	<entry>
		<id>https://oldwiki.cpcwiki.eu/index.php?title=User:Db6128&amp;diff=84661</id>
		<title>User:Db6128</title>
		<link rel="alternate" type="text/html" href="https://oldwiki.cpcwiki.eu/index.php?title=User:Db6128&amp;diff=84661"/>
				<updated>2012-12-03T17:29:56Z</updated>
		
		<summary type="html">&lt;p&gt;Db6128: &lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;Already have an account on the forums, just saw on YouTube how much effort evidently went into porting Cybernoid from the Spectrum and thought it'd be a good one to add to the in-progress &amp;quot;Speccy ports&amp;quot; page&lt;br /&gt;
&lt;br /&gt;
[Some time later…] Still going to get around to that some time when I can collect pics, ''etc.'' for comparison--[[User:Db6128|Db6128]] ([[User talk:Db6128|talk]]) 19:29, 3 December 2012 (EET)&lt;/div&gt;</summary>
		<author><name>Db6128</name></author>	</entry>

	<entry>
		<id>https://oldwiki.cpcwiki.eu/index.php?title=Talk:KC_Compact&amp;diff=84660</id>
		<title>Talk:KC Compact</title>
		<link rel="alternate" type="text/html" href="https://oldwiki.cpcwiki.eu/index.php?title=Talk:KC_Compact&amp;diff=84660"/>
				<updated>2012-12-03T17:28:51Z</updated>
		
		<summary type="html">&lt;p&gt;Db6128: &lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;== Original author ==&lt;br /&gt;
Sorry Kev - I tried to follow the trail of previous renames/moves far enough to get the real author but evidently didn't do very well. :D&lt;br /&gt;
--[[User:Db6128|Db6128]] ([[User talk:Db6128|talk]]) 19:28, 3 December 2012 (EET)&lt;/div&gt;</summary>
		<author><name>Db6128</name></author>	</entry>

	<entry>
		<id>https://oldwiki.cpcwiki.eu/index.php?title=Talk:KC_Compact&amp;diff=84659</id>
		<title>Talk:KC Compact</title>
		<link rel="alternate" type="text/html" href="https://oldwiki.cpcwiki.eu/index.php?title=Talk:KC_Compact&amp;diff=84659"/>
				<updated>2012-12-03T17:28:40Z</updated>
		
		<summary type="html">&lt;p&gt;Db6128: /* Original author */ new section&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;== Original author ==&lt;br /&gt;
&lt;br /&gt;
Sorry Kev - I tried to follow the trail of previous renames/moves far enough to get the real author but evidently didn't do very well. :D&lt;/div&gt;</summary>
		<author><name>Db6128</name></author>	</entry>

	<entry>
		<id>https://oldwiki.cpcwiki.eu/index.php?title=Cassette_data_information&amp;diff=84651</id>
		<title>Cassette data information</title>
		<link rel="alternate" type="text/html" href="https://oldwiki.cpcwiki.eu/index.php?title=Cassette_data_information&amp;diff=84651"/>
				<updated>2012-12-03T05:47:55Z</updated>
		
		<summary type="html">&lt;p&gt;Db6128: /* Recording a sound */ numbers :P&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;'''Translation note :'''&lt;br /&gt;
Cassette = Tape.&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
== Recording a sound ==&lt;br /&gt;
&lt;br /&gt;
A sound is recorded by making a measurement of the amplitude of the sound at regular intervals which are defined by the ''sampling rate'' and to a vertical resolution (between the lowest and highest points on the wave) that is called the ''bit-depth''. The act of taking the measurement is often called ''sampling'' and each measurement unit is called a ''sample''. A file which contains samples is often called a waveform, sound sample, audio sample, ''etc.''&lt;br /&gt;
&lt;br /&gt;
The sampling rate defines the rate/frequency at which the measurements are taken. The higher the sampling rate, the faster/more frequently the measurements are taken, and the higher the maximal frequency that can be represented by the signal. Conversely, the lower the sampling rate, the slower the measurements are taken, and the maximal frequency that can be stored is lower. The sample rate is described by the &amp;quot;Hz&amp;quot; unit of measurement. The &amp;quot;Hz&amp;quot; unit of measurement means &amp;quot;per second&amp;quot;. Therefore, a sampling rate of 44100 Hz, a.k.a. 44.1 kHz, means that 44100 measurements are taken each second (in other words, one measurement every 1/44100 th of a second).&lt;br /&gt;
&lt;br /&gt;
If the sampling is too low, then changes in the sound which occur between each measurement will not be measured. Because higher audio frequencies are defined by oscillating more rapidly, this means that lower sampling rates can store only lower frequencies. Therefore, the faster the measurements are taken, the more accurate the recording will be, and thus the higher the quality of sound that can be recorded. Of course, at high sample rates, because there are many more measurements taken, the resulting size of the file (containing the audio data) can be large.&lt;br /&gt;
&lt;br /&gt;
As should be familiar to CPC users with a little technical knowledge, a sample that uses 8-bits for storage can represent 256 distinct amplitude levels, and a sample which uses 16-bits for storage can describe 65536 distinct amplitude levels. The higher the number of bits used by each sample for storage, the larger the range of distinct amplitude levels that can be represented. Therefore, the higher the number of bits used by each sample for storage, the higher the quality of sound that can be recorded. Moreover, the number of bits is directly related to the dynamic range of the resulting signal; that is, how much of a difference there is between the quietest and loudest sounds that it can represent. 16-bit signals provide a nominal 96 dB of dynamic range.&lt;br /&gt;
&lt;br /&gt;
===What settings should you use?===&lt;br /&gt;
&lt;br /&gt;
All modern sound cards should support 8-bit and 16-bit samples and sample rates of 22050 Hz and 44100 Hz. Some sound cards will support a greater range of recording rates which can be lower and higher than these values. The familiar format of CD audio uses a sampling rate of 44100 Hz and a bit-depth of 16-bits. These values are more than adequate to represent almost all real-world signals for listening by humans - and also, conveniently, are fine for Amstrad tapes, too! In fact, in theory, because the standard Amstrad tape routines have a maximal frequency of 2500 Hz, settings as low as 8000 Hz and 8 bits would probably be fine. However, you will probably want to use higher settings, just in case and/or to keep in line with more common formats such as CD audio, especially if you intend to archive your recordings.&lt;br /&gt;
&lt;br /&gt;
For samp2cdt, you should save the file as &amp;quot;PCM&amp;quot; (&amp;quot;Pulse Code Modulation&amp;quot;). This is a uncompressed, unencoded storage representation. Each sample is a single measurement of the amplitude of the sound taken at a measurement point in time. Other representations such as &amp;quot;ADPCM&amp;quot; (&amp;quot;Amplitude Delta Pulse Code Modulation&amp;quot;), encode or compress the data to reduce the size of the audio file. Samp2cdt can't understand these representations, so please use &amp;quot;PCM&amp;quot; only.&lt;br /&gt;
&lt;br /&gt;
===Illustrations and explanations of digital audio===&lt;br /&gt;
&lt;br /&gt;
[[Image:wave1.gif]]&lt;br /&gt;
&lt;br /&gt;
''Fig 1. An amplitude/time graph showing the waveform of the original sound''&lt;br /&gt;
&lt;br /&gt;
[[Image:wave2.gif]]&lt;br /&gt;
&lt;br /&gt;
''Fig 2. An amplitude/time graph showing the waveform of the original sound. The crosses indicate the amplitude measured at each sample time and the dotted lines indicate the the time of each measurement. The duration of time between each dotted line, defined by the sample rate, is equal to the duration of a sample. From this it can be seen that each sample has a finite and equal duration.''&lt;br /&gt;
&lt;br /&gt;
[[Image:wave3.gif]]&lt;br /&gt;
&lt;br /&gt;
''Fig 3. An amplitude/time graph showing the waveform of the original sound. As in Fig 2, the crosses indicate the amplitude measured at each sample time. The dotted line shows the waveform generated by sampling. The final value of each sample is defined to be the amplitude measured at the time of measurement.''&lt;br /&gt;
&lt;br /&gt;
[[Image:wave4.gif]]&lt;br /&gt;
&lt;br /&gt;
''Fig 4. An amplitude/time graph showing the sampled waveform. This waveform was generated at a high sample rate, and therefore the resulting waveform has a shape which is similar to the original. This waveform is the type you can see in a audio recording program like Goldwave. '''Note''', however, that this distinctively square signal is not what would be output by any barely decent sound-card! Audio hardware has built-in filters to smooth waveforms as they are converted from digital to analogue.''&lt;br /&gt;
&lt;br /&gt;
[[Image:wave5.gif]]&lt;br /&gt;
&lt;br /&gt;
''Fig 5. An amplitude/time graph showing the waveform of the original sound. As in Fig 2, this graph shows the amplitude of each measurement, and the dotted line indicates the time of measurement. This graph was created using a low sample rate. Notice that the time between each measurement is longer compared to Fig 2.''&lt;br /&gt;
&lt;br /&gt;
[[Image:wave6.gif]]&lt;br /&gt;
&lt;br /&gt;
''Fig 6. An amplitude/time graph showing the waveform of the original sound. As in Fig 3, the crosses indicate the amplitude measured at each sample time, and the dotted line shows the waveform generated by sampling. This graph shows the resulting waveform generated using a low sample rate.''&lt;br /&gt;
&lt;br /&gt;
[[Image:wave7.gif]]&lt;br /&gt;
&lt;br /&gt;
''Fig 7. An amplitude/time graph showing the sampled waveform. As explained in the note for Figure 4, this is only a visual representation of the digitally stored audio, '''not''' of the signal that would be output by any competent audio card. However, it does illustrate how low sampling rates reduce the bandwidth of frequencies: This waveform was generated at a low sample rate, and therefore the resulting waveform is much more coarse compared to Fig 4. Notice that although the general shape is similar to the original waveform, much of the smoothness is is lost between the time of each measurement. The loss of smoothness also means loss of information: the lower the sampling rate, the more information is lost; in other words, the maximal frequency that the signal can represent is lower. Similarly, lower bit-depths mean that the signal is less accurate, and in extreme cases can generate audible noise. Therefore, to record a sound, it is best to use relatively high sampling rate and bit-depth; CD audio's 44.1 kHz and 16 bits should be more than adequate for most uses, especially storage of CPC cassettes.''&lt;br /&gt;
&lt;br /&gt;
Notes:&lt;br /&gt;
&lt;br /&gt;
1. The &amp;quot;Nyquist theory&amp;quot; states that in order to accuratly record a sound of a known frequency, you must use a recording frequency which is more than twice that frequency (note &amp;quot;more than&amp;quot;, not equal to). Example: to record a sound of 3000 Hz, you must record using &amp;gt;6000 Hz. If you use a lower sampling rate (e.g. 5000 Hz), frequencies less than or equal to half of the sampling rate cannot be properly represented and will be altered into lower-sounding frequencies.&lt;br /&gt;
Most Amstrad loaders are between 300 to 2500 Hz, therefore you should use a recording sample rate of &amp;gt;5000 Hz. It is recommended to use one of the common sample rates. e.g. 22050 Hz (22.05 Khz) or 44100 Hz (44.1 Khz).&lt;br /&gt;
&lt;br /&gt;
2. There are two different representations to store the amplitude of the sample in a PCM audio file: unsigned or signed.&lt;br /&gt;
* A 8-bit unsigned sample has values between 0 and 255. In this range, 0 represents a low amplitudes, 255 a high amplitude, and the amplitudes increase linearly from 0 to 255.&lt;br /&gt;
* A 8-bit signed sample has values between -128 and 127. In this range, -128 represents a low amplitude, and 127 high amplitude, and the amplitudes increase linearly from -128 to 127.&lt;br /&gt;
Both methods can represent the same data, just in different ways (techies will be able to compare this to their knowledge of Z80 assembly), so there is no advantage to using either. The original reason for the two methods is due to the original method to playback the sound. Modern sound cards can play audio stored in both ways.&lt;br /&gt;
Note that both (albeit more obvious in the latter) share a feature typical of binary-encoded numbers: there is no exact 'centre' value, because the total number of possible values is even. In the context of audio, this means that, if the signal spanned the entire range, its centre (average) would be slightly off-zero (in this case, below), which is known as a DC offset. However, even if this did occur, it would be negligible and certainly not audible by humans!&lt;br /&gt;
&lt;br /&gt;
== Duplication of cassettes ==&lt;br /&gt;
&lt;br /&gt;
When the writing of a program is completed a &amp;quot;master&amp;quot; cassette is created. This cassette contains a audio representation of the computer data.&lt;br /&gt;
&lt;br /&gt;
The master cassette is then duplicated, using a machine, onto many blank cassettes. These cassettes are packaged with instructions and distributed.&lt;br /&gt;
&lt;br /&gt;
It is also easy to make a copy of a cassette if you have a twin cassette system, where one cassette unit will play the sound and the other will record. A first generation copy taken from a original cassette could be considered a copy of a copy of the master cassette.&lt;br /&gt;
&lt;br /&gt;
Each time a cassette is copied however, additional noise may be introduced into the copied version. This noise is a mixture of noise from the original, and noise created by the machine making the copy. Therefore the sound on any cassette contains a mixture of noise and the sound of the computer data.&lt;br /&gt;
&lt;br /&gt;
A loader on the computer must therefore be able to identify the actual sound of the data from other sounds that are on the cassette. If it can't do this, then there will be loading errors.&lt;br /&gt;
&lt;br /&gt;
If you are transfering a cassette using samp2cdt, then you are advised to use an original (i.e. a cassette created directly from a master cassette), or a first generation copy (i.e. a cassette copied from an original).&lt;br /&gt;
&lt;br /&gt;
== Loader ==&lt;br /&gt;
&lt;br /&gt;
A &amp;quot;loader&amp;quot; is the name given to a program that reads data from cassette into the computer memory.&lt;br /&gt;
&lt;br /&gt;
There is a &amp;quot;system&amp;quot; loader which is built into the Amstrad CPC ROM. This loader is activated when the computer is in cassette mode (note 1), and it can only understand one specific computer audio sound, the audio sound of the Amstrad CPC system data-blocks.&lt;br /&gt;
&lt;br /&gt;
To read other loading systems (e.g. a fast-loader), there must be a program on the cassette (a &amp;quot;pre-loader&amp;quot; or &amp;quot;boot loader&amp;quot; or sometimes refered to as &amp;quot;loader&amp;quot;), stored using the Amstrad CPC system loader, which when executed will be able to understand and load fast-loader data.&lt;br /&gt;
&lt;br /&gt;
This loader program is usually stored immediatly before any fast-loader blocks, and takes over from the system loader to load the remaining fast-loader blocks.&lt;br /&gt;
&lt;br /&gt;
|program for fast-loader| |fast-loader block(s)|&lt;br /&gt;
&lt;br /&gt;
So when a cassette is loaded the following occurs:&lt;br /&gt;
&lt;br /&gt;
1. system loader recognises and loads &amp;quot;program for fast-loader&amp;quot;.&lt;br /&gt;
2. &amp;quot;program for fast loader&amp;quot; takes control and loads the data from the fast-loader block(s) into computer memory&lt;br /&gt;
3. when loading has completed, the program is executed. &lt;br /&gt;
&lt;br /&gt;
Notes:&lt;br /&gt;
&lt;br /&gt;
1. a CPC without a disc interface (e.g. a CPC464, CPC464+ or KC Compact) will start-up in cassette mode. For a CPC with a disc interface attached (or internal), you must type |TAPE to enter cassette mode.&lt;br /&gt;
&lt;br /&gt;
You can test if the computer is operating in cassette mode by typing RUN&amp;quot;. If you see &amp;quot;Press PLAY then any key&amp;quot;, then the computer is operating in cassette mode. If there is an error, then the computer is not operating in cassette mode. &lt;br /&gt;
&lt;br /&gt;
== Amstrad cassette hardware ==&lt;br /&gt;
&lt;br /&gt;
=== Reading ===&lt;br /&gt;
&lt;br /&gt;
The audio from the cassette is read from a cassette player through the Amstrad's cassette electronics.&lt;br /&gt;
&lt;br /&gt;
The Amstrad's cassette electronics converts the amplitude of the sound (a analogue signal) into a &amp;quot;0&amp;quot; or &amp;quot;1&amp;quot; measurement (a digital signal). This measurement can then be read from bit 7 of port B of the PPI 8255 IC.&lt;br /&gt;
&lt;br /&gt;
[[Image:conv.gif]]&lt;br /&gt;
&lt;br /&gt;
''Fig 8. This image shows the conversion of the audio waveform from the cassette into the digital representation by the Amstrad's cassette electronics. i.e. audio waveform (on cassette) -&amp;gt; Amstrad's cassette electronics -&amp;gt; 0 and 1 measurements''&lt;br /&gt;
&lt;br /&gt;
The resulting measurements can be read using the following Z80 instructions:&lt;br /&gt;
&lt;br /&gt;
&amp;lt;pre&amp;gt;&lt;br /&gt;
ld b,&amp;amp;f5			;; I/O port address for PPI 8255 port B&lt;br /&gt;
				;; (PPI 8255 port B is operating as input.)&lt;br /&gt;
in a,(c)			;; read port B inputs&lt;br /&gt;
and %10000000			;; isolate bit 7 which contains the measurement.&lt;br /&gt;
&amp;lt;/pre&amp;gt;&lt;br /&gt;
&lt;br /&gt;
This measurement is *not* the actual state of a data-bit, but represents a low (&amp;quot;0&amp;quot;) or high amplitude (&amp;quot;1&amp;quot;). In this document, the value of this measurement will be refered to as a &amp;quot;high&amp;quot; (&amp;quot;1&amp;quot;) or &amp;quot;low&amp;quot; (&amp;quot;0&amp;quot;) level.&lt;br /&gt;
&lt;br /&gt;
Notes:&lt;br /&gt;
&lt;br /&gt;
1. The CPC464 and CPC464+ have a cassette player built in. To connect a cassette player to the CPC664, CPC6128 or KC Compact then you must use a lead.&lt;br /&gt;
2. It is not known exactly how the amplitude of the sound from the cassette corresponds to the final &amp;quot;0&amp;quot; or &amp;quot;1&amp;quot; measurement.&lt;br /&gt;
&lt;br /&gt;
samp2cdt uses a crude method to perform this conversion.&lt;br /&gt;
&lt;br /&gt;
For a 8-bit signed sample:&lt;br /&gt;
&lt;br /&gt;
* if the amplitude is 0..127, then the final measurement will be &amp;quot;1&amp;quot;.&lt;br /&gt;
* if the amplitude is -128..0 then the final measurement will be &amp;quot;0&amp;quot;.&lt;br /&gt;
&lt;br /&gt;
=== Writing ===&lt;br /&gt;
&lt;br /&gt;
A waveform is written to cassette using bit 5 of port C of the 8255 PPI IC. The waveform can only be defined by a high or low level, defined by the state of bit 5, which is then converted by the Amstrad's cassette electronics into a final output amplitude which is recorded onto cassette.&lt;br /&gt;
&lt;br /&gt;
A high level can be written using the following Z80 instructions:&lt;br /&gt;
&lt;br /&gt;
&amp;lt;pre&amp;gt;&lt;br /&gt;
ld b,&amp;amp;f6		;; I/O port address for PPI 8255 port C&lt;br /&gt;
			;; (PPI 8255 port C is operating as output.)&lt;br /&gt;
&lt;br /&gt;
set 5,a			;; set cassette write output to high level &lt;br /&gt;
out (c),a		;; output level&lt;br /&gt;
&amp;lt;/pre&amp;gt;&lt;br /&gt;
&lt;br /&gt;
A low level can be written using the following Z80 instructions:&lt;br /&gt;
&lt;br /&gt;
&amp;lt;pre&amp;gt;&lt;br /&gt;
ld b,&amp;amp;f6		;; I/O port address for PPI 8255 port C&lt;br /&gt;
			;; (PPI 8255 port C is operating as output.)&lt;br /&gt;
&lt;br /&gt;
res 5,a			;; set cassette write output to low level&lt;br /&gt;
out (c),a		;; output level&lt;br /&gt;
&amp;lt;/pre&amp;gt;&lt;br /&gt;
&lt;br /&gt;
The amplitude of the output waveform is not amplified, therefore if you wish to record the cassette audio direct from an Amstrad you will need to amplify the waveform.&lt;br /&gt;
&lt;br /&gt;
If the state of bit 5 is changed at a fixed frequency, then the graph of the state of bit 5 over time will be a square wave. However, the resulting audio written on the cassette will not be a perfect square wave because nature will attempt to convert the waveform into a sine wave.&lt;br /&gt;
Loading system audio waveform&lt;br /&gt;
&lt;br /&gt;
Every loading system on the Amstrad uses a serial bit-stream. i.e. a single bit of information is read at a time.&lt;br /&gt;
&lt;br /&gt;
This serial bit-stream is grouped into blocks of audio sound.&lt;br /&gt;
&lt;br /&gt;
Every loading system uses a basic structure to describe each audio block in the following order:&lt;br /&gt;
&lt;br /&gt;
|pilot|sync|data|trailer|&lt;br /&gt;
&lt;br /&gt;
'''pilot'''&lt;br /&gt;
&lt;br /&gt;
This is also refered to as &amp;quot;leader&amp;quot; by some documents.&lt;br /&gt;
&lt;br /&gt;
This is constructed from a repeated waveform often with a fixed number of repetitions defined by the loading system.&lt;br /&gt;
&lt;br /&gt;
The shape of the waveform is known by the loader program and this is used to identify the pilot waveform from other waveforms that may be present (e.g. noise).&lt;br /&gt;
&lt;br /&gt;
The pilot is often long, so that the loader doesn't need to see the start of the pilot waveform in order to load the block.&lt;br /&gt;
&lt;br /&gt;
The loader program will test the incoming waveform, checking it against the parameters defined for the pilot, before the waveform is accepted as the pilot waveform. (e.g. the number of repetitions must be some defined minimum value). The incoming waveform must fall within these specifications otherwise the waveform is not accepted as a pilot waveform. &lt;br /&gt;
&lt;br /&gt;
'''sync (&amp;quot;synchronisation&amp;quot;)'''&lt;br /&gt;
&lt;br /&gt;
The sync is a waveform which is different to the pilot, and this defines the end of the pilot and the start of the data. When this sync has been detected, the loader knows that there is data following, and that the loader is always at the same point in the data stream. i.e. the loader program is synchronised to a specific point in the data waveform.&lt;br /&gt;
&lt;br /&gt;
'''data'''&lt;br /&gt;
&lt;br /&gt;
This is the actual data which is composed of waveforms defining &amp;quot;0&amp;quot; and &amp;quot;1&amp;quot; data bits.&lt;br /&gt;
&lt;br /&gt;
The first element of the data may be a marker or id which may, for example, indicate the type of data in the block or the number of the block.&lt;br /&gt;
&lt;br /&gt;
The remaining bits will define the data and zero or more checksums.&lt;br /&gt;
&lt;br /&gt;
The whole data may consist of a single block with a single location and length (e.g. one block for a screen another for data), or multiple blocks each with their own location and length. (e.g. one block for screen and data)&lt;br /&gt;
&lt;br /&gt;
The location and lengths of the blocks may be in the data stream itself, or they may be in a preceeding block, or may be hard-coded into the loader program. &lt;br /&gt;
&lt;br /&gt;
'''trailer'''&lt;br /&gt;
&lt;br /&gt;
The trailer always follows the data. Some loaders may not have a trailer. The two main purposes of the trailer are to ensure that the waveform of the last data bit in the data is constructed correctly and to provide some time in which the loader can prepare for the next block.&lt;br /&gt;
&lt;br /&gt;
The exact definition of the loading systems's audio waveform is defined by the loader program.&lt;br /&gt;
&lt;br /&gt;
samp2cdt has a number of decoder algorithms which recognises the audio waveform of various loading systems. These decoders read the waveform using a similar method to the loader program itself. These decoders have been created by examining the instructions of each loader program and the graph of the waveform in a sound recording package.&lt;br /&gt;
&lt;br /&gt;
== Example of a typical loading system ==&lt;br /&gt;
&lt;br /&gt;
The data on cassette actually consists of changing 0 and 1 levels. (a &amp;quot;level&amp;quot; is a magnitude of a value). The loader measures the time between each &amp;quot;level transition&amp;quot; where a &amp;quot;level transition&amp;quot; is the change from a &amp;quot;0&amp;quot; to a &amp;quot;1&amp;quot; level or the change from a &amp;quot;1&amp;quot; to a &amp;quot;0&amp;quot; level. The level can be timed using the following Z80 instructions: &lt;br /&gt;
&lt;br /&gt;
&amp;lt;pre&amp;gt;&lt;br /&gt;
;; - keep testing the state of bit 7 of PPI 8255 port B &lt;br /&gt;
;; - update the counter to record the number of tests done &lt;br /&gt;
;; - when bit 7 of PPI 8255 port B changes state, stop testing. &lt;br /&gt;
;; counter will hold the total number of tests made. &lt;br /&gt;
;; &lt;br /&gt;
;; B = &amp;amp;F5 (I/O address of PPI 8255 input port B) &lt;br /&gt;
;; C = previous data read from PPI port B&lt;br /&gt;
ld d,0              ;; initialise count to 0&lt;br /&gt;
.loop inc d         ;; increment count&lt;br /&gt;
in a,(c)            ;; read input to PPI 8255 port B&lt;br /&gt;
xor c               ;; exclusive-or with previous data read from PPI 8255 port B&lt;br /&gt;
and %10000000       ;; isolate bit 7 &lt;br /&gt;
;; if result is 0, then the state of bit 7 that has &lt;br /&gt;
;; been read is the same as the previous state. i.e. bit 7 has not changed state. &lt;br /&gt;
;; if result is not 0, then the state of bit 7 has changed. &lt;br /&gt;
;; e.g. if bit 7 was previously 1, it is now 0. if bit 7 was previously 0, it is now 1.&lt;br /&gt;
jr z,loop &lt;br /&gt;
;; when execution reaches here we know that bit 7 has changed state and D &lt;br /&gt;
;; contains the number of tests.&lt;br /&gt;
&amp;lt;/pre&amp;gt;&lt;br /&gt;
&lt;br /&gt;
== Loader operation==&lt;br /&gt;
&lt;br /&gt;
The loader generally operates in this way:&lt;br /&gt;
&lt;br /&gt;
1. Time a wave. Is the duration of the wave within the minimum and maximum duration required for the pilot. If yes, go to 2, else go to 1.&lt;br /&gt;
&lt;br /&gt;
2. We might have seen a wave from the pilot signal. time a wave. Is the duration of this wave within the minimum and maximum duration required for the pilot. If yes, increment number of waves seen, go to 2, else go to 1.&lt;br /&gt;
&lt;br /&gt;
3. Have we seen the minimum number of pilot waves? Yes, go to 4, else go to 2. 4. time a wave. Is the duration of the wave within the minimum and maximum duration required for the sync? 2. Each Z80 instruction takes a finite time to execute. The execution time depends on the computer. If the timing of the Z80 instructions used by the test algorithm is known and predictable, then the time for each test can be calculated. Now, since the count represents the number of tests made before the condition is true (i.e. bit 7 changes state), the total time for the condition to be true, is the sum of the time for each test made. If each test always takes the same time, then the total time is the number of tests multiplied by the time for one test. In the Amstrad computer, all Z80 instructions execute in multiples of 1us (microsecond) regardless of their location in RAM. This fact simplifies this calculation.&lt;br /&gt;
Checksum&lt;br /&gt;
&lt;br /&gt;
A &amp;quot;Checksum&amp;quot; is used to verify the loaded data.&lt;br /&gt;
&lt;br /&gt;
A Checksum is the result of the &amp;quot;checksum calculation&amp;quot; made on a block of data. The actual calculation can be different depending on the method chosen.&lt;br /&gt;
&lt;br /&gt;
There are two &amp;quot;Checksum&amp;quot;s.&lt;br /&gt;
&lt;br /&gt;
1. a stored &amp;quot;Checksum&amp;quot;.&lt;br /&gt;
&lt;br /&gt;
This is the result of the &amp;quot;checksum calculation&amp;quot; calculated from the correct data. This is then stored with the data (e.g. before or after the data) when the master cassette is created.&lt;br /&gt;
2. a calculated &amp;quot;Checksum&amp;quot;.&lt;br /&gt;
&lt;br /&gt;
This is the result of the &amp;quot;checksum calculation&amp;quot; calculated from the data read from the cassette. After the calculation is complete it is compared against the stored checksum. &lt;br /&gt;
&lt;br /&gt;
The stored and calculated &amp;quot;Checksums&amp;quot; are initialised with the same initial value and calculated using the same algorithm. Therefore, if the stored checksum matches the calculated checksum, it is assumed that the loaded data is identical to the original data. The data is verified to be correct.&lt;br /&gt;
&lt;br /&gt;
If the stored checksum doesn't match the calculated checksum, then there has been a error. One or more bit's of data is incorrect. The checksum is designed to detect errors only, and often it is not possible to know which bit or bits of data is incorrect and in this case it is not often possible to correct the errors to reproduce the correct data.&lt;br /&gt;
&lt;br /&gt;
A loader which has a checksum therefore is better than a loader that doesn't have a checksum, because the checksum will verify that the data is correct or incorrect.&lt;br /&gt;
&lt;br /&gt;
With a loader which doesn't have a checksum, you have no way to verify the data, and therefore you can't guarantee that the data is identical to the original.&lt;br /&gt;
&lt;br /&gt;
In this case, the only way to test that the data is correct is to make multiple transfers of the program and test each thoroughly (e.g. if the program is a game, you would play the game to the end), checking for graphic corruption and bugs. If all of the transfers operate the same, then you can assume that the data is correct.&lt;br /&gt;
&lt;br /&gt;
== Various Audio file formats ==&lt;br /&gt;
&lt;br /&gt;
There are numerous Audio file formats, each of which can store audio, but each has it's own structures and representation for the data.&lt;br /&gt;
&lt;br /&gt;
The &amp;quot;format&amp;quot; of a file describes the internal structure, order and encoding of the data within the file.&lt;br /&gt;
&lt;br /&gt;
Here is a list of the audio file formats supported by samp2cdt:&lt;br /&gt;
&lt;br /&gt;
* Windows Wave file (a file which has the &amp;quot;.wav&amp;quot; file extension) is the common file format used for audio sounds on computers running &amp;quot;Windows&amp;quot;.&lt;br /&gt;
* A Voice Wave file (a file which has the &amp;quot;.voc&amp;quot; file extension) was created by Creative for the original Soundblaster ISA sound card. This file format is used by the original voc2tzx utility which samp2cdt was developed from.&lt;br /&gt;
* A Audio Interchange file (a file which has the &amp;quot;.aiff&amp;quot; or &amp;quot;.aif&amp;quot; file extension) is the common file format used for audio sounds on the Mac computer.&lt;br /&gt;
* A file which has the &amp;quot;.iff&amp;quot; file extension is the common file format used for audio sounds by the Amiga computer.&lt;br /&gt;
&lt;br /&gt;
==Links==&lt;br /&gt;
[[Converting a tape-image into a audio file]]&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
[[Category:Hardware]][[Category:DATA Storage|*]][[Category:Music and sound]][[Category:CPC Internal Components]]&lt;/div&gt;</summary>
		<author><name>Db6128</name></author>	</entry>

	<entry>
		<id>https://oldwiki.cpcwiki.eu/index.php?title=Cassette_data_information&amp;diff=84650</id>
		<title>Cassette data information</title>
		<link rel="alternate" type="text/html" href="https://oldwiki.cpcwiki.eu/index.php?title=Cassette_data_information&amp;diff=84650"/>
				<updated>2012-12-03T05:44:44Z</updated>
		
		<summary type="html">&lt;p&gt;Db6128: /* Example of a typical loading system */ formatting was borked&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;'''Translation note :'''&lt;br /&gt;
Cassette = Tape.&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
== Recording a sound ==&lt;br /&gt;
&lt;br /&gt;
A sound is recorded by making a measurement of the amplitude of the sound at regular intervals which are defined by the ''sampling rate'' and to a vertical resolution (between the lowest and highest points on the wave) that is called the ''bit-depth''. The act of taking the measurement is often called ''sampling'' and each measurement unit is called a ''sample''. A file which contains samples is often called a waveform, sound sample, audio sample, ''etc.''&lt;br /&gt;
&lt;br /&gt;
The sampling rate defines the rate/frequency at which the measurements are taken. The higher the sampling rate, the faster/more frequently the measurements are taken, and the higher the maximal frequency that can be represented by the signal. Conversely, the lower the sampling rate, the slower the measurements are taken, and the maximal frequency that can be stored is lower. The sample rate is described by the &amp;quot;Hz&amp;quot; unit of measurement. The &amp;quot;Hz&amp;quot; unit of measurement means &amp;quot;per second&amp;quot;. Therefore, a sampling rate of 44010 Hz means 44010 measurements are taken each second (in other words, one measurement every 1/44010 th of a second).&lt;br /&gt;
&lt;br /&gt;
If the sampling is too low, then changes in the sound which occur between each measurement will not be measured. Because higher audio frequencies are defined by oscillating more rapidly, this means that lower sampling rates can store only lower frequencies. Therefore, the faster the measurements are taken, the more accurate the recording will be, and thus the higher the quality of sound that can be recorded. Of course, at high sample rates, because there are many more measurements taken, the resulting size of the file (containing the audio data) can be large.&lt;br /&gt;
&lt;br /&gt;
As should be familiar to CPC users with a little technical knowledge, a sample that uses 8-bits for storage can represent 256 distinct amplitude levels, and a sample which uses 16-bits for storage can describe 65536 distinct amplitude levels. The higher the number of bits used by each sample for storage, the larger the range of distinct amplitude levels that can be represented. Therefore, the higher the number of bits used by each sample for storage, the higher the quality of sound that can be recorded. Moreover, the number of bits is directly related to the dynamic range of the resulting signal; that is, how much of a difference there is between the quietest and loudest sounds that it can represent. 16-bit signals provide a nominal 96 dB of dynamic range.&lt;br /&gt;
&lt;br /&gt;
===What settings should you use?===&lt;br /&gt;
&lt;br /&gt;
All modern sound cards should support 8-bit and 16-bit samples and sample rates of 22050 Hz and 44100 Hz. Some sound cards will support a greater range of recording rates which can be lower and higher than these values. The familiar format of CD audio uses a sampling rate of 44100 Hz and a bit-depth of 16-bits. These values are more than adequate to represent almost all real-world signals for listening by humans - and also, conveniently, are fine for Amstrad tapes, too! In fact, in theory, because the standard Amstrad tape routines have a maximal frequency of 2500 Hz, settings as low as 8000 Hz and 8 bits would probably be fine. However, you will probably want to use higher settings, just in case and/or to keep in line with more common formats such as CD audio, especially if you intend to archive your recordings.&lt;br /&gt;
&lt;br /&gt;
For samp2cdt, you should save the file as &amp;quot;PCM&amp;quot; (&amp;quot;Pulse Code Modulation&amp;quot;). This is a uncompressed, unencoded storage representation. Each sample is a single measurement of the amplitude of the sound taken at a measurement point in time. Other representations such as &amp;quot;ADPCM&amp;quot; (&amp;quot;Amplitude Delta Pulse Code Modulation&amp;quot;), encode or compress the data to reduce the size of the audio file. Samp2cdt can't understand these representations, so please use &amp;quot;PCM&amp;quot; only.&lt;br /&gt;
&lt;br /&gt;
===Illustrations and explanations of digital audio===&lt;br /&gt;
&lt;br /&gt;
[[Image:wave1.gif]]&lt;br /&gt;
&lt;br /&gt;
''Fig 1. An amplitude/time graph showing the waveform of the original sound''&lt;br /&gt;
&lt;br /&gt;
[[Image:wave2.gif]]&lt;br /&gt;
&lt;br /&gt;
''Fig 2. An amplitude/time graph showing the waveform of the original sound. The crosses indicate the amplitude measured at each sample time and the dotted lines indicate the the time of each measurement. The duration of time between each dotted line, defined by the sample rate, is equal to the duration of a sample. From this it can be seen that each sample has a finite and equal duration.''&lt;br /&gt;
&lt;br /&gt;
[[Image:wave3.gif]]&lt;br /&gt;
&lt;br /&gt;
''Fig 3. An amplitude/time graph showing the waveform of the original sound. As in Fig 2, the crosses indicate the amplitude measured at each sample time. The dotted line shows the waveform generated by sampling. The final value of each sample is defined to be the amplitude measured at the time of measurement.''&lt;br /&gt;
&lt;br /&gt;
[[Image:wave4.gif]]&lt;br /&gt;
&lt;br /&gt;
''Fig 4. An amplitude/time graph showing the sampled waveform. This waveform was generated at a high sample rate, and therefore the resulting waveform has a shape which is similar to the original. This waveform is the type you can see in a audio recording program like Goldwave. '''Note''', however, that this distinctively square signal is not what would be output by any barely decent sound-card! Audio hardware has built-in filters to smooth waveforms as they are converted from digital to analogue.''&lt;br /&gt;
&lt;br /&gt;
[[Image:wave5.gif]]&lt;br /&gt;
&lt;br /&gt;
''Fig 5. An amplitude/time graph showing the waveform of the original sound. As in Fig 2, this graph shows the amplitude of each measurement, and the dotted line indicates the time of measurement. This graph was created using a low sample rate. Notice that the time between each measurement is longer compared to Fig 2.''&lt;br /&gt;
&lt;br /&gt;
[[Image:wave6.gif]]&lt;br /&gt;
&lt;br /&gt;
''Fig 6. An amplitude/time graph showing the waveform of the original sound. As in Fig 3, the crosses indicate the amplitude measured at each sample time, and the dotted line shows the waveform generated by sampling. This graph shows the resulting waveform generated using a low sample rate.''&lt;br /&gt;
&lt;br /&gt;
[[Image:wave7.gif]]&lt;br /&gt;
&lt;br /&gt;
''Fig 7. An amplitude/time graph showing the sampled waveform. As explained in the note for Figure 4, this is only a visual representation of the digitally stored audio, '''not''' of the signal that would be output by any competent audio card. However, it does illustrate how low sampling rates reduce the bandwidth of frequencies: This waveform was generated at a low sample rate, and therefore the resulting waveform is much more coarse compared to Fig 4. Notice that although the general shape is similar to the original waveform, much of the smoothness is is lost between the time of each measurement. The loss of smoothness also means loss of information: the lower the sample rating, the more information is lost; in other words, the maximal frequencies that the signal can represent is lower. Similarly, lower bit-depths mean that the signal is less accurate, and in extreme cases can generate audible noise, Therefore, to record a sound, it is best to use relatively high sampling rate and bit-depth.''&lt;br /&gt;
&lt;br /&gt;
Notes:&lt;br /&gt;
&lt;br /&gt;
1. The &amp;quot;Nyquist theory&amp;quot; states that in order to accuratly record a sound of a known frequency, you must use a recording frequency which is more than twice that frequency (note &amp;quot;more than&amp;quot;, not equal to). Example: to record a sound of 3000 Hz, you must record using &amp;gt;6000 Hz. If you use a lower sampling rate (e.g. 5000 Hz), frequencies less than or equal to half of the sampling rate cannot be properly represented and will be altered into lower-sounding frequencies.&lt;br /&gt;
Most Amstrad loaders are between 300 to 2500 Hz, therefore you should use a recording sample rate of &amp;gt;5000 Hz. It is recommended to use one of the common sample rates. e.g. 22050 Hz (22.05 Khz) or 44100 Hz (44.1 Khz).&lt;br /&gt;
&lt;br /&gt;
2. There are two different representations to store the amplitude of the sample in a PCM audio file: unsigned or signed.&lt;br /&gt;
* A 8-bit unsigned sample has values between 0 and 255. In this range, 0 represents a low amplitudes, 255 a high amplitude, and the amplitudes increase linearly from 0 to 255.&lt;br /&gt;
* A 8-bit signed sample has values between -128 and 127. In this range, -128 represents a low amplitude, and 127 high amplitude, and the amplitudes increase linearly from -128 to 127.&lt;br /&gt;
Both methods can represent the same data, just in different ways (techies will be able to compare this to their knowledge of Z80 assembly), so there is no advantage to using either. The original reason for the two methods is due to the original method to playback the sound. Modern sound cards can play audio stored in both ways.&lt;br /&gt;
Note that both (albeit more obvious in the latter) share a feature typical of binary-encoded numbers: there is no exact 'centre' value, because the total number of possible values is even. In the context of audio, this means that, if the signal spanned the entire range, its centre (average) would be slightly off-zero (in this case, below), which is known as a DC offset. However, even if this did occur, it would be negligible and certainly not audible by humans!&lt;br /&gt;
&lt;br /&gt;
== Duplication of cassettes ==&lt;br /&gt;
&lt;br /&gt;
When the writing of a program is completed a &amp;quot;master&amp;quot; cassette is created. This cassette contains a audio representation of the computer data.&lt;br /&gt;
&lt;br /&gt;
The master cassette is then duplicated, using a machine, onto many blank cassettes. These cassettes are packaged with instructions and distributed.&lt;br /&gt;
&lt;br /&gt;
It is also easy to make a copy of a cassette if you have a twin cassette system, where one cassette unit will play the sound and the other will record. A first generation copy taken from a original cassette could be considered a copy of a copy of the master cassette.&lt;br /&gt;
&lt;br /&gt;
Each time a cassette is copied however, additional noise may be introduced into the copied version. This noise is a mixture of noise from the original, and noise created by the machine making the copy. Therefore the sound on any cassette contains a mixture of noise and the sound of the computer data.&lt;br /&gt;
&lt;br /&gt;
A loader on the computer must therefore be able to identify the actual sound of the data from other sounds that are on the cassette. If it can't do this, then there will be loading errors.&lt;br /&gt;
&lt;br /&gt;
If you are transfering a cassette using samp2cdt, then you are advised to use an original (i.e. a cassette created directly from a master cassette), or a first generation copy (i.e. a cassette copied from an original).&lt;br /&gt;
&lt;br /&gt;
== Loader ==&lt;br /&gt;
&lt;br /&gt;
A &amp;quot;loader&amp;quot; is the name given to a program that reads data from cassette into the computer memory.&lt;br /&gt;
&lt;br /&gt;
There is a &amp;quot;system&amp;quot; loader which is built into the Amstrad CPC ROM. This loader is activated when the computer is in cassette mode (note 1), and it can only understand one specific computer audio sound, the audio sound of the Amstrad CPC system data-blocks.&lt;br /&gt;
&lt;br /&gt;
To read other loading systems (e.g. a fast-loader), there must be a program on the cassette (a &amp;quot;pre-loader&amp;quot; or &amp;quot;boot loader&amp;quot; or sometimes refered to as &amp;quot;loader&amp;quot;), stored using the Amstrad CPC system loader, which when executed will be able to understand and load fast-loader data.&lt;br /&gt;
&lt;br /&gt;
This loader program is usually stored immediatly before any fast-loader blocks, and takes over from the system loader to load the remaining fast-loader blocks.&lt;br /&gt;
&lt;br /&gt;
|program for fast-loader| |fast-loader block(s)|&lt;br /&gt;
&lt;br /&gt;
So when a cassette is loaded the following occurs:&lt;br /&gt;
&lt;br /&gt;
1. system loader recognises and loads &amp;quot;program for fast-loader&amp;quot;.&lt;br /&gt;
2. &amp;quot;program for fast loader&amp;quot; takes control and loads the data from the fast-loader block(s) into computer memory&lt;br /&gt;
3. when loading has completed, the program is executed. &lt;br /&gt;
&lt;br /&gt;
Notes:&lt;br /&gt;
&lt;br /&gt;
1. a CPC without a disc interface (e.g. a CPC464, CPC464+ or KC Compact) will start-up in cassette mode. For a CPC with a disc interface attached (or internal), you must type |TAPE to enter cassette mode.&lt;br /&gt;
&lt;br /&gt;
You can test if the computer is operating in cassette mode by typing RUN&amp;quot;. If you see &amp;quot;Press PLAY then any key&amp;quot;, then the computer is operating in cassette mode. If there is an error, then the computer is not operating in cassette mode. &lt;br /&gt;
&lt;br /&gt;
== Amstrad cassette hardware ==&lt;br /&gt;
&lt;br /&gt;
=== Reading ===&lt;br /&gt;
&lt;br /&gt;
The audio from the cassette is read from a cassette player through the Amstrad's cassette electronics.&lt;br /&gt;
&lt;br /&gt;
The Amstrad's cassette electronics converts the amplitude of the sound (a analogue signal) into a &amp;quot;0&amp;quot; or &amp;quot;1&amp;quot; measurement (a digital signal). This measurement can then be read from bit 7 of port B of the PPI 8255 IC.&lt;br /&gt;
&lt;br /&gt;
[[Image:conv.gif]]&lt;br /&gt;
&lt;br /&gt;
''Fig 8. This image shows the conversion of the audio waveform from the cassette into the digital representation by the Amstrad's cassette electronics. i.e. audio waveform (on cassette) -&amp;gt; Amstrad's cassette electronics -&amp;gt; 0 and 1 measurements''&lt;br /&gt;
&lt;br /&gt;
The resulting measurements can be read using the following Z80 instructions:&lt;br /&gt;
&lt;br /&gt;
&amp;lt;pre&amp;gt;&lt;br /&gt;
ld b,&amp;amp;f5			;; I/O port address for PPI 8255 port B&lt;br /&gt;
				;; (PPI 8255 port B is operating as input.)&lt;br /&gt;
in a,(c)			;; read port B inputs&lt;br /&gt;
and %10000000			;; isolate bit 7 which contains the measurement.&lt;br /&gt;
&amp;lt;/pre&amp;gt;&lt;br /&gt;
&lt;br /&gt;
This measurement is *not* the actual state of a data-bit, but represents a low (&amp;quot;0&amp;quot;) or high amplitude (&amp;quot;1&amp;quot;). In this document, the value of this measurement will be refered to as a &amp;quot;high&amp;quot; (&amp;quot;1&amp;quot;) or &amp;quot;low&amp;quot; (&amp;quot;0&amp;quot;) level.&lt;br /&gt;
&lt;br /&gt;
Notes:&lt;br /&gt;
&lt;br /&gt;
1. The CPC464 and CPC464+ have a cassette player built in. To connect a cassette player to the CPC664, CPC6128 or KC Compact then you must use a lead.&lt;br /&gt;
2. It is not known exactly how the amplitude of the sound from the cassette corresponds to the final &amp;quot;0&amp;quot; or &amp;quot;1&amp;quot; measurement.&lt;br /&gt;
&lt;br /&gt;
samp2cdt uses a crude method to perform this conversion.&lt;br /&gt;
&lt;br /&gt;
For a 8-bit signed sample:&lt;br /&gt;
&lt;br /&gt;
* if the amplitude is 0..127, then the final measurement will be &amp;quot;1&amp;quot;.&lt;br /&gt;
* if the amplitude is -128..0 then the final measurement will be &amp;quot;0&amp;quot;.&lt;br /&gt;
&lt;br /&gt;
=== Writing ===&lt;br /&gt;
&lt;br /&gt;
A waveform is written to cassette using bit 5 of port C of the 8255 PPI IC. The waveform can only be defined by a high or low level, defined by the state of bit 5, which is then converted by the Amstrad's cassette electronics into a final output amplitude which is recorded onto cassette.&lt;br /&gt;
&lt;br /&gt;
A high level can be written using the following Z80 instructions:&lt;br /&gt;
&lt;br /&gt;
&amp;lt;pre&amp;gt;&lt;br /&gt;
ld b,&amp;amp;f6		;; I/O port address for PPI 8255 port C&lt;br /&gt;
			;; (PPI 8255 port C is operating as output.)&lt;br /&gt;
&lt;br /&gt;
set 5,a			;; set cassette write output to high level &lt;br /&gt;
out (c),a		;; output level&lt;br /&gt;
&amp;lt;/pre&amp;gt;&lt;br /&gt;
&lt;br /&gt;
A low level can be written using the following Z80 instructions:&lt;br /&gt;
&lt;br /&gt;
&amp;lt;pre&amp;gt;&lt;br /&gt;
ld b,&amp;amp;f6		;; I/O port address for PPI 8255 port C&lt;br /&gt;
			;; (PPI 8255 port C is operating as output.)&lt;br /&gt;
&lt;br /&gt;
res 5,a			;; set cassette write output to low level&lt;br /&gt;
out (c),a		;; output level&lt;br /&gt;
&amp;lt;/pre&amp;gt;&lt;br /&gt;
&lt;br /&gt;
The amplitude of the output waveform is not amplified, therefore if you wish to record the cassette audio direct from an Amstrad you will need to amplify the waveform.&lt;br /&gt;
&lt;br /&gt;
If the state of bit 5 is changed at a fixed frequency, then the graph of the state of bit 5 over time will be a square wave. However, the resulting audio written on the cassette will not be a perfect square wave because nature will attempt to convert the waveform into a sine wave.&lt;br /&gt;
Loading system audio waveform&lt;br /&gt;
&lt;br /&gt;
Every loading system on the Amstrad uses a serial bit-stream. i.e. a single bit of information is read at a time.&lt;br /&gt;
&lt;br /&gt;
This serial bit-stream is grouped into blocks of audio sound.&lt;br /&gt;
&lt;br /&gt;
Every loading system uses a basic structure to describe each audio block in the following order:&lt;br /&gt;
&lt;br /&gt;
|pilot|sync|data|trailer|&lt;br /&gt;
&lt;br /&gt;
'''pilot'''&lt;br /&gt;
&lt;br /&gt;
This is also refered to as &amp;quot;leader&amp;quot; by some documents.&lt;br /&gt;
&lt;br /&gt;
This is constructed from a repeated waveform often with a fixed number of repetitions defined by the loading system.&lt;br /&gt;
&lt;br /&gt;
The shape of the waveform is known by the loader program and this is used to identify the pilot waveform from other waveforms that may be present (e.g. noise).&lt;br /&gt;
&lt;br /&gt;
The pilot is often long, so that the loader doesn't need to see the start of the pilot waveform in order to load the block.&lt;br /&gt;
&lt;br /&gt;
The loader program will test the incoming waveform, checking it against the parameters defined for the pilot, before the waveform is accepted as the pilot waveform. (e.g. the number of repetitions must be some defined minimum value). The incoming waveform must fall within these specifications otherwise the waveform is not accepted as a pilot waveform. &lt;br /&gt;
&lt;br /&gt;
'''sync (&amp;quot;synchronisation&amp;quot;)'''&lt;br /&gt;
&lt;br /&gt;
The sync is a waveform which is different to the pilot, and this defines the end of the pilot and the start of the data. When this sync has been detected, the loader knows that there is data following, and that the loader is always at the same point in the data stream. i.e. the loader program is synchronised to a specific point in the data waveform.&lt;br /&gt;
&lt;br /&gt;
'''data'''&lt;br /&gt;
&lt;br /&gt;
This is the actual data which is composed of waveforms defining &amp;quot;0&amp;quot; and &amp;quot;1&amp;quot; data bits.&lt;br /&gt;
&lt;br /&gt;
The first element of the data may be a marker or id which may, for example, indicate the type of data in the block or the number of the block.&lt;br /&gt;
&lt;br /&gt;
The remaining bits will define the data and zero or more checksums.&lt;br /&gt;
&lt;br /&gt;
The whole data may consist of a single block with a single location and length (e.g. one block for a screen another for data), or multiple blocks each with their own location and length. (e.g. one block for screen and data)&lt;br /&gt;
&lt;br /&gt;
The location and lengths of the blocks may be in the data stream itself, or they may be in a preceeding block, or may be hard-coded into the loader program. &lt;br /&gt;
&lt;br /&gt;
'''trailer'''&lt;br /&gt;
&lt;br /&gt;
The trailer always follows the data. Some loaders may not have a trailer. The two main purposes of the trailer are to ensure that the waveform of the last data bit in the data is constructed correctly and to provide some time in which the loader can prepare for the next block.&lt;br /&gt;
&lt;br /&gt;
The exact definition of the loading systems's audio waveform is defined by the loader program.&lt;br /&gt;
&lt;br /&gt;
samp2cdt has a number of decoder algorithms which recognises the audio waveform of various loading systems. These decoders read the waveform using a similar method to the loader program itself. These decoders have been created by examining the instructions of each loader program and the graph of the waveform in a sound recording package.&lt;br /&gt;
&lt;br /&gt;
== Example of a typical loading system ==&lt;br /&gt;
&lt;br /&gt;
The data on cassette actually consists of changing 0 and 1 levels. (a &amp;quot;level&amp;quot; is a magnitude of a value). The loader measures the time between each &amp;quot;level transition&amp;quot; where a &amp;quot;level transition&amp;quot; is the change from a &amp;quot;0&amp;quot; to a &amp;quot;1&amp;quot; level or the change from a &amp;quot;1&amp;quot; to a &amp;quot;0&amp;quot; level. The level can be timed using the following Z80 instructions: &lt;br /&gt;
&lt;br /&gt;
&amp;lt;pre&amp;gt;&lt;br /&gt;
;; - keep testing the state of bit 7 of PPI 8255 port B &lt;br /&gt;
;; - update the counter to record the number of tests done &lt;br /&gt;
;; - when bit 7 of PPI 8255 port B changes state, stop testing. &lt;br /&gt;
;; counter will hold the total number of tests made. &lt;br /&gt;
;; &lt;br /&gt;
;; B = &amp;amp;F5 (I/O address of PPI 8255 input port B) &lt;br /&gt;
;; C = previous data read from PPI port B&lt;br /&gt;
ld d,0              ;; initialise count to 0&lt;br /&gt;
.loop inc d         ;; increment count&lt;br /&gt;
in a,(c)            ;; read input to PPI 8255 port B&lt;br /&gt;
xor c               ;; exclusive-or with previous data read from PPI 8255 port B&lt;br /&gt;
and %10000000       ;; isolate bit 7 &lt;br /&gt;
;; if result is 0, then the state of bit 7 that has &lt;br /&gt;
;; been read is the same as the previous state. i.e. bit 7 has not changed state. &lt;br /&gt;
;; if result is not 0, then the state of bit 7 has changed. &lt;br /&gt;
;; e.g. if bit 7 was previously 1, it is now 0. if bit 7 was previously 0, it is now 1.&lt;br /&gt;
jr z,loop &lt;br /&gt;
;; when execution reaches here we know that bit 7 has changed state and D &lt;br /&gt;
;; contains the number of tests.&lt;br /&gt;
&amp;lt;/pre&amp;gt;&lt;br /&gt;
&lt;br /&gt;
== Loader operation==&lt;br /&gt;
&lt;br /&gt;
The loader generally operates in this way:&lt;br /&gt;
&lt;br /&gt;
1. Time a wave. Is the duration of the wave within the minimum and maximum duration required for the pilot. If yes, go to 2, else go to 1.&lt;br /&gt;
&lt;br /&gt;
2. We might have seen a wave from the pilot signal. time a wave. Is the duration of this wave within the minimum and maximum duration required for the pilot. If yes, increment number of waves seen, go to 2, else go to 1.&lt;br /&gt;
&lt;br /&gt;
3. Have we seen the minimum number of pilot waves? Yes, go to 4, else go to 2. 4. time a wave. Is the duration of the wave within the minimum and maximum duration required for the sync? 2. Each Z80 instruction takes a finite time to execute. The execution time depends on the computer. If the timing of the Z80 instructions used by the test algorithm is known and predictable, then the time for each test can be calculated. Now, since the count represents the number of tests made before the condition is true (i.e. bit 7 changes state), the total time for the condition to be true, is the sum of the time for each test made. If each test always takes the same time, then the total time is the number of tests multiplied by the time for one test. In the Amstrad computer, all Z80 instructions execute in multiples of 1us (microsecond) regardless of their location in RAM. This fact simplifies this calculation.&lt;br /&gt;
Checksum&lt;br /&gt;
&lt;br /&gt;
A &amp;quot;Checksum&amp;quot; is used to verify the loaded data.&lt;br /&gt;
&lt;br /&gt;
A Checksum is the result of the &amp;quot;checksum calculation&amp;quot; made on a block of data. The actual calculation can be different depending on the method chosen.&lt;br /&gt;
&lt;br /&gt;
There are two &amp;quot;Checksum&amp;quot;s.&lt;br /&gt;
&lt;br /&gt;
1. a stored &amp;quot;Checksum&amp;quot;.&lt;br /&gt;
&lt;br /&gt;
This is the result of the &amp;quot;checksum calculation&amp;quot; calculated from the correct data. This is then stored with the data (e.g. before or after the data) when the master cassette is created.&lt;br /&gt;
2. a calculated &amp;quot;Checksum&amp;quot;.&lt;br /&gt;
&lt;br /&gt;
This is the result of the &amp;quot;checksum calculation&amp;quot; calculated from the data read from the cassette. After the calculation is complete it is compared against the stored checksum. &lt;br /&gt;
&lt;br /&gt;
The stored and calculated &amp;quot;Checksums&amp;quot; are initialised with the same initial value and calculated using the same algorithm. Therefore, if the stored checksum matches the calculated checksum, it is assumed that the loaded data is identical to the original data. The data is verified to be correct.&lt;br /&gt;
&lt;br /&gt;
If the stored checksum doesn't match the calculated checksum, then there has been a error. One or more bit's of data is incorrect. The checksum is designed to detect errors only, and often it is not possible to know which bit or bits of data is incorrect and in this case it is not often possible to correct the errors to reproduce the correct data.&lt;br /&gt;
&lt;br /&gt;
A loader which has a checksum therefore is better than a loader that doesn't have a checksum, because the checksum will verify that the data is correct or incorrect.&lt;br /&gt;
&lt;br /&gt;
With a loader which doesn't have a checksum, you have no way to verify the data, and therefore you can't guarantee that the data is identical to the original.&lt;br /&gt;
&lt;br /&gt;
In this case, the only way to test that the data is correct is to make multiple transfers of the program and test each thoroughly (e.g. if the program is a game, you would play the game to the end), checking for graphic corruption and bugs. If all of the transfers operate the same, then you can assume that the data is correct.&lt;br /&gt;
&lt;br /&gt;
== Various Audio file formats ==&lt;br /&gt;
&lt;br /&gt;
There are numerous Audio file formats, each of which can store audio, but each has it's own structures and representation for the data.&lt;br /&gt;
&lt;br /&gt;
The &amp;quot;format&amp;quot; of a file describes the internal structure, order and encoding of the data within the file.&lt;br /&gt;
&lt;br /&gt;
Here is a list of the audio file formats supported by samp2cdt:&lt;br /&gt;
&lt;br /&gt;
* Windows Wave file (a file which has the &amp;quot;.wav&amp;quot; file extension) is the common file format used for audio sounds on computers running &amp;quot;Windows&amp;quot;.&lt;br /&gt;
* A Voice Wave file (a file which has the &amp;quot;.voc&amp;quot; file extension) was created by Creative for the original Soundblaster ISA sound card. This file format is used by the original voc2tzx utility which samp2cdt was developed from.&lt;br /&gt;
* A Audio Interchange file (a file which has the &amp;quot;.aiff&amp;quot; or &amp;quot;.aif&amp;quot; file extension) is the common file format used for audio sounds on the Mac computer.&lt;br /&gt;
* A file which has the &amp;quot;.iff&amp;quot; file extension is the common file format used for audio sounds by the Amiga computer.&lt;br /&gt;
&lt;br /&gt;
==Links==&lt;br /&gt;
[[Converting a tape-image into a audio file]]&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
[[Category:Hardware]][[Category:DATA Storage|*]][[Category:Music and sound]][[Category:CPC Internal Components]]&lt;/div&gt;</summary>
		<author><name>Db6128</name></author>	</entry>

	<entry>
		<id>https://oldwiki.cpcwiki.eu/index.php?title=Cassette_data_information&amp;diff=84649</id>
		<title>Cassette data information</title>
		<link rel="alternate" type="text/html" href="https://oldwiki.cpcwiki.eu/index.php?title=Cassette_data_information&amp;diff=84649"/>
				<updated>2012-12-03T05:41:28Z</updated>
		
		<summary type="html">&lt;p&gt;Db6128: /* Reading */ 8-bit signed numbers cannot represent both -128 and +128... unless you've hacked the universe&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;'''Translation note :'''&lt;br /&gt;
Cassette = Tape.&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
== Recording a sound ==&lt;br /&gt;
&lt;br /&gt;
A sound is recorded by making a measurement of the amplitude of the sound at regular intervals which are defined by the ''sampling rate'' and to a vertical resolution (between the lowest and highest points on the wave) that is called the ''bit-depth''. The act of taking the measurement is often called ''sampling'' and each measurement unit is called a ''sample''. A file which contains samples is often called a waveform, sound sample, audio sample, ''etc.''&lt;br /&gt;
&lt;br /&gt;
The sampling rate defines the rate/frequency at which the measurements are taken. The higher the sampling rate, the faster/more frequently the measurements are taken, and the higher the maximal frequency that can be represented by the signal. Conversely, the lower the sampling rate, the slower the measurements are taken, and the maximal frequency that can be stored is lower. The sample rate is described by the &amp;quot;Hz&amp;quot; unit of measurement. The &amp;quot;Hz&amp;quot; unit of measurement means &amp;quot;per second&amp;quot;. Therefore, a sampling rate of 44010 Hz means 44010 measurements are taken each second (in other words, one measurement every 1/44010 th of a second).&lt;br /&gt;
&lt;br /&gt;
If the sampling is too low, then changes in the sound which occur between each measurement will not be measured. Because higher audio frequencies are defined by oscillating more rapidly, this means that lower sampling rates can store only lower frequencies. Therefore, the faster the measurements are taken, the more accurate the recording will be, and thus the higher the quality of sound that can be recorded. Of course, at high sample rates, because there are many more measurements taken, the resulting size of the file (containing the audio data) can be large.&lt;br /&gt;
&lt;br /&gt;
As should be familiar to CPC users with a little technical knowledge, a sample that uses 8-bits for storage can represent 256 distinct amplitude levels, and a sample which uses 16-bits for storage can describe 65536 distinct amplitude levels. The higher the number of bits used by each sample for storage, the larger the range of distinct amplitude levels that can be represented. Therefore, the higher the number of bits used by each sample for storage, the higher the quality of sound that can be recorded. Moreover, the number of bits is directly related to the dynamic range of the resulting signal; that is, how much of a difference there is between the quietest and loudest sounds that it can represent. 16-bit signals provide a nominal 96 dB of dynamic range.&lt;br /&gt;
&lt;br /&gt;
===What settings should you use?===&lt;br /&gt;
&lt;br /&gt;
All modern sound cards should support 8-bit and 16-bit samples and sample rates of 22050 Hz and 44100 Hz. Some sound cards will support a greater range of recording rates which can be lower and higher than these values. The familiar format of CD audio uses a sampling rate of 44100 Hz and a bit-depth of 16-bits. These values are more than adequate to represent almost all real-world signals for listening by humans - and also, conveniently, are fine for Amstrad tapes, too! In fact, in theory, because the standard Amstrad tape routines have a maximal frequency of 2500 Hz, settings as low as 8000 Hz and 8 bits would probably be fine. However, you will probably want to use higher settings, just in case and/or to keep in line with more common formats such as CD audio, especially if you intend to archive your recordings.&lt;br /&gt;
&lt;br /&gt;
For samp2cdt, you should save the file as &amp;quot;PCM&amp;quot; (&amp;quot;Pulse Code Modulation&amp;quot;). This is a uncompressed, unencoded storage representation. Each sample is a single measurement of the amplitude of the sound taken at a measurement point in time. Other representations such as &amp;quot;ADPCM&amp;quot; (&amp;quot;Amplitude Delta Pulse Code Modulation&amp;quot;), encode or compress the data to reduce the size of the audio file. Samp2cdt can't understand these representations, so please use &amp;quot;PCM&amp;quot; only.&lt;br /&gt;
&lt;br /&gt;
===Illustrations and explanations of digital audio===&lt;br /&gt;
&lt;br /&gt;
[[Image:wave1.gif]]&lt;br /&gt;
&lt;br /&gt;
''Fig 1. An amplitude/time graph showing the waveform of the original sound''&lt;br /&gt;
&lt;br /&gt;
[[Image:wave2.gif]]&lt;br /&gt;
&lt;br /&gt;
''Fig 2. An amplitude/time graph showing the waveform of the original sound. The crosses indicate the amplitude measured at each sample time and the dotted lines indicate the the time of each measurement. The duration of time between each dotted line, defined by the sample rate, is equal to the duration of a sample. From this it can be seen that each sample has a finite and equal duration.''&lt;br /&gt;
&lt;br /&gt;
[[Image:wave3.gif]]&lt;br /&gt;
&lt;br /&gt;
''Fig 3. An amplitude/time graph showing the waveform of the original sound. As in Fig 2, the crosses indicate the amplitude measured at each sample time. The dotted line shows the waveform generated by sampling. The final value of each sample is defined to be the amplitude measured at the time of measurement.''&lt;br /&gt;
&lt;br /&gt;
[[Image:wave4.gif]]&lt;br /&gt;
&lt;br /&gt;
''Fig 4. An amplitude/time graph showing the sampled waveform. This waveform was generated at a high sample rate, and therefore the resulting waveform has a shape which is similar to the original. This waveform is the type you can see in a audio recording program like Goldwave. '''Note''', however, that this distinctively square signal is not what would be output by any barely decent sound-card! Audio hardware has built-in filters to smooth waveforms as they are converted from digital to analogue.''&lt;br /&gt;
&lt;br /&gt;
[[Image:wave5.gif]]&lt;br /&gt;
&lt;br /&gt;
''Fig 5. An amplitude/time graph showing the waveform of the original sound. As in Fig 2, this graph shows the amplitude of each measurement, and the dotted line indicates the time of measurement. This graph was created using a low sample rate. Notice that the time between each measurement is longer compared to Fig 2.''&lt;br /&gt;
&lt;br /&gt;
[[Image:wave6.gif]]&lt;br /&gt;
&lt;br /&gt;
''Fig 6. An amplitude/time graph showing the waveform of the original sound. As in Fig 3, the crosses indicate the amplitude measured at each sample time, and the dotted line shows the waveform generated by sampling. This graph shows the resulting waveform generated using a low sample rate.''&lt;br /&gt;
&lt;br /&gt;
[[Image:wave7.gif]]&lt;br /&gt;
&lt;br /&gt;
''Fig 7. An amplitude/time graph showing the sampled waveform. As explained in the note for Figure 4, this is only a visual representation of the digitally stored audio, '''not''' of the signal that would be output by any competent audio card. However, it does illustrate how low sampling rates reduce the bandwidth of frequencies: This waveform was generated at a low sample rate, and therefore the resulting waveform is much more coarse compared to Fig 4. Notice that although the general shape is similar to the original waveform, much of the smoothness is is lost between the time of each measurement. The loss of smoothness also means loss of information: the lower the sample rating, the more information is lost; in other words, the maximal frequencies that the signal can represent is lower. Similarly, lower bit-depths mean that the signal is less accurate, and in extreme cases can generate audible noise, Therefore, to record a sound, it is best to use relatively high sampling rate and bit-depth.''&lt;br /&gt;
&lt;br /&gt;
Notes:&lt;br /&gt;
&lt;br /&gt;
1. The &amp;quot;Nyquist theory&amp;quot; states that in order to accuratly record a sound of a known frequency, you must use a recording frequency which is more than twice that frequency (note &amp;quot;more than&amp;quot;, not equal to). Example: to record a sound of 3000 Hz, you must record using &amp;gt;6000 Hz. If you use a lower sampling rate (e.g. 5000 Hz), frequencies less than or equal to half of the sampling rate cannot be properly represented and will be altered into lower-sounding frequencies.&lt;br /&gt;
Most Amstrad loaders are between 300 to 2500 Hz, therefore you should use a recording sample rate of &amp;gt;5000 Hz. It is recommended to use one of the common sample rates. e.g. 22050 Hz (22.05 Khz) or 44100 Hz (44.1 Khz).&lt;br /&gt;
&lt;br /&gt;
2. There are two different representations to store the amplitude of the sample in a PCM audio file: unsigned or signed.&lt;br /&gt;
* A 8-bit unsigned sample has values between 0 and 255. In this range, 0 represents a low amplitudes, 255 a high amplitude, and the amplitudes increase linearly from 0 to 255.&lt;br /&gt;
* A 8-bit signed sample has values between -128 and 127. In this range, -128 represents a low amplitude, and 127 high amplitude, and the amplitudes increase linearly from -128 to 127.&lt;br /&gt;
Both methods can represent the same data, just in different ways (techies will be able to compare this to their knowledge of Z80 assembly), so there is no advantage to using either. The original reason for the two methods is due to the original method to playback the sound. Modern sound cards can play audio stored in both ways.&lt;br /&gt;
Note that both (albeit more obvious in the latter) share a feature typical of binary-encoded numbers: there is no exact 'centre' value, because the total number of possible values is even. In the context of audio, this means that, if the signal spanned the entire range, its centre (average) would be slightly off-zero (in this case, below), which is known as a DC offset. However, even if this did occur, it would be negligible and certainly not audible by humans!&lt;br /&gt;
&lt;br /&gt;
== Duplication of cassettes ==&lt;br /&gt;
&lt;br /&gt;
When the writing of a program is completed a &amp;quot;master&amp;quot; cassette is created. This cassette contains a audio representation of the computer data.&lt;br /&gt;
&lt;br /&gt;
The master cassette is then duplicated, using a machine, onto many blank cassettes. These cassettes are packaged with instructions and distributed.&lt;br /&gt;
&lt;br /&gt;
It is also easy to make a copy of a cassette if you have a twin cassette system, where one cassette unit will play the sound and the other will record. A first generation copy taken from a original cassette could be considered a copy of a copy of the master cassette.&lt;br /&gt;
&lt;br /&gt;
Each time a cassette is copied however, additional noise may be introduced into the copied version. This noise is a mixture of noise from the original, and noise created by the machine making the copy. Therefore the sound on any cassette contains a mixture of noise and the sound of the computer data.&lt;br /&gt;
&lt;br /&gt;
A loader on the computer must therefore be able to identify the actual sound of the data from other sounds that are on the cassette. If it can't do this, then there will be loading errors.&lt;br /&gt;
&lt;br /&gt;
If you are transfering a cassette using samp2cdt, then you are advised to use an original (i.e. a cassette created directly from a master cassette), or a first generation copy (i.e. a cassette copied from an original).&lt;br /&gt;
&lt;br /&gt;
== Loader ==&lt;br /&gt;
&lt;br /&gt;
A &amp;quot;loader&amp;quot; is the name given to a program that reads data from cassette into the computer memory.&lt;br /&gt;
&lt;br /&gt;
There is a &amp;quot;system&amp;quot; loader which is built into the Amstrad CPC ROM. This loader is activated when the computer is in cassette mode (note 1), and it can only understand one specific computer audio sound, the audio sound of the Amstrad CPC system data-blocks.&lt;br /&gt;
&lt;br /&gt;
To read other loading systems (e.g. a fast-loader), there must be a program on the cassette (a &amp;quot;pre-loader&amp;quot; or &amp;quot;boot loader&amp;quot; or sometimes refered to as &amp;quot;loader&amp;quot;), stored using the Amstrad CPC system loader, which when executed will be able to understand and load fast-loader data.&lt;br /&gt;
&lt;br /&gt;
This loader program is usually stored immediatly before any fast-loader blocks, and takes over from the system loader to load the remaining fast-loader blocks.&lt;br /&gt;
&lt;br /&gt;
|program for fast-loader| |fast-loader block(s)|&lt;br /&gt;
&lt;br /&gt;
So when a cassette is loaded the following occurs:&lt;br /&gt;
&lt;br /&gt;
1. system loader recognises and loads &amp;quot;program for fast-loader&amp;quot;.&lt;br /&gt;
2. &amp;quot;program for fast loader&amp;quot; takes control and loads the data from the fast-loader block(s) into computer memory&lt;br /&gt;
3. when loading has completed, the program is executed. &lt;br /&gt;
&lt;br /&gt;
Notes:&lt;br /&gt;
&lt;br /&gt;
1. a CPC without a disc interface (e.g. a CPC464, CPC464+ or KC Compact) will start-up in cassette mode. For a CPC with a disc interface attached (or internal), you must type |TAPE to enter cassette mode.&lt;br /&gt;
&lt;br /&gt;
You can test if the computer is operating in cassette mode by typing RUN&amp;quot;. If you see &amp;quot;Press PLAY then any key&amp;quot;, then the computer is operating in cassette mode. If there is an error, then the computer is not operating in cassette mode. &lt;br /&gt;
&lt;br /&gt;
== Amstrad cassette hardware ==&lt;br /&gt;
&lt;br /&gt;
=== Reading ===&lt;br /&gt;
&lt;br /&gt;
The audio from the cassette is read from a cassette player through the Amstrad's cassette electronics.&lt;br /&gt;
&lt;br /&gt;
The Amstrad's cassette electronics converts the amplitude of the sound (a analogue signal) into a &amp;quot;0&amp;quot; or &amp;quot;1&amp;quot; measurement (a digital signal). This measurement can then be read from bit 7 of port B of the PPI 8255 IC.&lt;br /&gt;
&lt;br /&gt;
[[Image:conv.gif]]&lt;br /&gt;
&lt;br /&gt;
''Fig 8. This image shows the conversion of the audio waveform from the cassette into the digital representation by the Amstrad's cassette electronics. i.e. audio waveform (on cassette) -&amp;gt; Amstrad's cassette electronics -&amp;gt; 0 and 1 measurements''&lt;br /&gt;
&lt;br /&gt;
The resulting measurements can be read using the following Z80 instructions:&lt;br /&gt;
&lt;br /&gt;
&amp;lt;pre&amp;gt;&lt;br /&gt;
ld b,&amp;amp;f5			;; I/O port address for PPI 8255 port B&lt;br /&gt;
				;; (PPI 8255 port B is operating as input.)&lt;br /&gt;
in a,(c)			;; read port B inputs&lt;br /&gt;
and %10000000			;; isolate bit 7 which contains the measurement.&lt;br /&gt;
&amp;lt;/pre&amp;gt;&lt;br /&gt;
&lt;br /&gt;
This measurement is *not* the actual state of a data-bit, but represents a low (&amp;quot;0&amp;quot;) or high amplitude (&amp;quot;1&amp;quot;). In this document, the value of this measurement will be refered to as a &amp;quot;high&amp;quot; (&amp;quot;1&amp;quot;) or &amp;quot;low&amp;quot; (&amp;quot;0&amp;quot;) level.&lt;br /&gt;
&lt;br /&gt;
Notes:&lt;br /&gt;
&lt;br /&gt;
1. The CPC464 and CPC464+ have a cassette player built in. To connect a cassette player to the CPC664, CPC6128 or KC Compact then you must use a lead.&lt;br /&gt;
2. It is not known exactly how the amplitude of the sound from the cassette corresponds to the final &amp;quot;0&amp;quot; or &amp;quot;1&amp;quot; measurement.&lt;br /&gt;
&lt;br /&gt;
samp2cdt uses a crude method to perform this conversion.&lt;br /&gt;
&lt;br /&gt;
For a 8-bit signed sample:&lt;br /&gt;
&lt;br /&gt;
* if the amplitude is 0..127, then the final measurement will be &amp;quot;1&amp;quot;.&lt;br /&gt;
* if the amplitude is -128..0 then the final measurement will be &amp;quot;0&amp;quot;.&lt;br /&gt;
&lt;br /&gt;
=== Writing ===&lt;br /&gt;
&lt;br /&gt;
A waveform is written to cassette using bit 5 of port C of the 8255 PPI IC. The waveform can only be defined by a high or low level, defined by the state of bit 5, which is then converted by the Amstrad's cassette electronics into a final output amplitude which is recorded onto cassette.&lt;br /&gt;
&lt;br /&gt;
A high level can be written using the following Z80 instructions:&lt;br /&gt;
&lt;br /&gt;
&amp;lt;pre&amp;gt;&lt;br /&gt;
ld b,&amp;amp;f6		;; I/O port address for PPI 8255 port C&lt;br /&gt;
			;; (PPI 8255 port C is operating as output.)&lt;br /&gt;
&lt;br /&gt;
set 5,a			;; set cassette write output to high level &lt;br /&gt;
out (c),a		;; output level&lt;br /&gt;
&amp;lt;/pre&amp;gt;&lt;br /&gt;
&lt;br /&gt;
A low level can be written using the following Z80 instructions:&lt;br /&gt;
&lt;br /&gt;
&amp;lt;pre&amp;gt;&lt;br /&gt;
ld b,&amp;amp;f6		;; I/O port address for PPI 8255 port C&lt;br /&gt;
			;; (PPI 8255 port C is operating as output.)&lt;br /&gt;
&lt;br /&gt;
res 5,a			;; set cassette write output to low level&lt;br /&gt;
out (c),a		;; output level&lt;br /&gt;
&amp;lt;/pre&amp;gt;&lt;br /&gt;
&lt;br /&gt;
The amplitude of the output waveform is not amplified, therefore if you wish to record the cassette audio direct from an Amstrad you will need to amplify the waveform.&lt;br /&gt;
&lt;br /&gt;
If the state of bit 5 is changed at a fixed frequency, then the graph of the state of bit 5 over time will be a square wave. However, the resulting audio written on the cassette will not be a perfect square wave because nature will attempt to convert the waveform into a sine wave.&lt;br /&gt;
Loading system audio waveform&lt;br /&gt;
&lt;br /&gt;
Every loading system on the Amstrad uses a serial bit-stream. i.e. a single bit of information is read at a time.&lt;br /&gt;
&lt;br /&gt;
This serial bit-stream is grouped into blocks of audio sound.&lt;br /&gt;
&lt;br /&gt;
Every loading system uses a basic structure to describe each audio block in the following order:&lt;br /&gt;
&lt;br /&gt;
|pilot|sync|data|trailer|&lt;br /&gt;
&lt;br /&gt;
'''pilot'''&lt;br /&gt;
&lt;br /&gt;
This is also refered to as &amp;quot;leader&amp;quot; by some documents.&lt;br /&gt;
&lt;br /&gt;
This is constructed from a repeated waveform often with a fixed number of repetitions defined by the loading system.&lt;br /&gt;
&lt;br /&gt;
The shape of the waveform is known by the loader program and this is used to identify the pilot waveform from other waveforms that may be present (e.g. noise).&lt;br /&gt;
&lt;br /&gt;
The pilot is often long, so that the loader doesn't need to see the start of the pilot waveform in order to load the block.&lt;br /&gt;
&lt;br /&gt;
The loader program will test the incoming waveform, checking it against the parameters defined for the pilot, before the waveform is accepted as the pilot waveform. (e.g. the number of repetitions must be some defined minimum value). The incoming waveform must fall within these specifications otherwise the waveform is not accepted as a pilot waveform. &lt;br /&gt;
&lt;br /&gt;
'''sync (&amp;quot;synchronisation&amp;quot;)'''&lt;br /&gt;
&lt;br /&gt;
The sync is a waveform which is different to the pilot, and this defines the end of the pilot and the start of the data. When this sync has been detected, the loader knows that there is data following, and that the loader is always at the same point in the data stream. i.e. the loader program is synchronised to a specific point in the data waveform.&lt;br /&gt;
&lt;br /&gt;
'''data'''&lt;br /&gt;
&lt;br /&gt;
This is the actual data which is composed of waveforms defining &amp;quot;0&amp;quot; and &amp;quot;1&amp;quot; data bits.&lt;br /&gt;
&lt;br /&gt;
The first element of the data may be a marker or id which may, for example, indicate the type of data in the block or the number of the block.&lt;br /&gt;
&lt;br /&gt;
The remaining bits will define the data and zero or more checksums.&lt;br /&gt;
&lt;br /&gt;
The whole data may consist of a single block with a single location and length (e.g. one block for a screen another for data), or multiple blocks each with their own location and length. (e.g. one block for screen and data)&lt;br /&gt;
&lt;br /&gt;
The location and lengths of the blocks may be in the data stream itself, or they may be in a preceeding block, or may be hard-coded into the loader program. &lt;br /&gt;
&lt;br /&gt;
'''trailer'''&lt;br /&gt;
&lt;br /&gt;
The trailer always follows the data. Some loaders may not have a trailer. The two main purposes of the trailer are to ensure that the waveform of the last data bit in the data is constructed correctly and to provide some time in which the loader can prepare for the next block.&lt;br /&gt;
&lt;br /&gt;
The exact definition of the loading systems's audio waveform is defined by the loader program.&lt;br /&gt;
&lt;br /&gt;
samp2cdt has a number of decoder algorithms which recognises the audio waveform of various loading systems. These decoders read the waveform using a similar method to the loader program itself. These decoders have been created by examining the instructions of each loader program and the graph of the waveform in a sound recording package.&lt;br /&gt;
&lt;br /&gt;
== Example of a typical loading system ==&lt;br /&gt;
&lt;br /&gt;
The data on cassette actually consists of changing 0 and 1 levels. (a &amp;quot;level&amp;quot; is a magnitude of a value). The loader measures the time between each &amp;quot;level transition&amp;quot; where a &amp;quot;level transition&amp;quot; is the change from a &amp;quot;0&amp;quot; to a &amp;quot;1&amp;quot; level or the change from a &amp;quot;1&amp;quot; to a &amp;quot;0&amp;quot; level. The level can be timed using the following Z80 instructions: &lt;br /&gt;
&lt;br /&gt;
&amp;lt;pre&amp;gt;&lt;br /&gt;
;; - keep testing the state of bit 7 of PPI 8255 port B &lt;br /&gt;
;; - update the counter to record the number of tests done &lt;br /&gt;
;; - when bit 7 of PPI 8255 port B changes state, stop testing. &lt;br /&gt;
;; counter will hold the total number of tests made. &lt;br /&gt;
;; &lt;br /&gt;
;; B = &amp;amp;F5 (I/O address of PPI 8255 input port B) &lt;br /&gt;
;; C = previous data read from PPI port B ld d,0 &lt;br /&gt;
;; initialise count to 0 .loop inc d &lt;br /&gt;
;; increment count in a,(c) &lt;br /&gt;
;; read input to PPI 8255 port B xor c &lt;br /&gt;
;; exclusive-or with previous data read from PPI 8255 port B and %10000000 &lt;br /&gt;
;; isolate bit 7 &lt;br /&gt;
;; if result is 0, then the state of bit 7 that has &lt;br /&gt;
;; been read is the same as the previous state. i.e. bit 7 has not changed state. &lt;br /&gt;
;; if result is not 0, then the state of bit 7 has changed. &lt;br /&gt;
;; e.g. if bit 7 was previously 1, it is now 0. if bit 7 was previously 0, it is now 1. jr z,loop &lt;br /&gt;
;; when execution reaches here we know that bit 7 has changed state and D &lt;br /&gt;
;; contains the number of tests.&lt;br /&gt;
&amp;lt;/pre&amp;gt;&lt;br /&gt;
&lt;br /&gt;
== Loader operation==&lt;br /&gt;
&lt;br /&gt;
The loader generally operates in this way:&lt;br /&gt;
&lt;br /&gt;
1. Time a wave. Is the duration of the wave within the minimum and maximum duration required for the pilot. If yes, go to 2, else go to 1.&lt;br /&gt;
&lt;br /&gt;
2. We might have seen a wave from the pilot signal. time a wave. Is the duration of this wave within the minimum and maximum duration required for the pilot. If yes, increment number of waves seen, go to 2, else go to 1.&lt;br /&gt;
&lt;br /&gt;
3. Have we seen the minimum number of pilot waves? Yes, go to 4, else go to 2. 4. time a wave. Is the duration of the wave within the minimum and maximum duration required for the sync? 2. Each Z80 instruction takes a finite time to execute. The execution time depends on the computer. If the timing of the Z80 instructions used by the test algorithm is known and predictable, then the time for each test can be calculated. Now, since the count represents the number of tests made before the condition is true (i.e. bit 7 changes state), the total time for the condition to be true, is the sum of the time for each test made. If each test always takes the same time, then the total time is the number of tests multiplied by the time for one test. In the Amstrad computer, all Z80 instructions execute in multiples of 1us (microsecond) regardless of their location in RAM. This fact simplifies this calculation.&lt;br /&gt;
Checksum&lt;br /&gt;
&lt;br /&gt;
A &amp;quot;Checksum&amp;quot; is used to verify the loaded data.&lt;br /&gt;
&lt;br /&gt;
A Checksum is the result of the &amp;quot;checksum calculation&amp;quot; made on a block of data. The actual calculation can be different depending on the method chosen.&lt;br /&gt;
&lt;br /&gt;
There are two &amp;quot;Checksum&amp;quot;s.&lt;br /&gt;
&lt;br /&gt;
1. a stored &amp;quot;Checksum&amp;quot;.&lt;br /&gt;
&lt;br /&gt;
This is the result of the &amp;quot;checksum calculation&amp;quot; calculated from the correct data. This is then stored with the data (e.g. before or after the data) when the master cassette is created.&lt;br /&gt;
2. a calculated &amp;quot;Checksum&amp;quot;.&lt;br /&gt;
&lt;br /&gt;
This is the result of the &amp;quot;checksum calculation&amp;quot; calculated from the data read from the cassette. After the calculation is complete it is compared against the stored checksum. &lt;br /&gt;
&lt;br /&gt;
The stored and calculated &amp;quot;Checksums&amp;quot; are initialised with the same initial value and calculated using the same algorithm. Therefore, if the stored checksum matches the calculated checksum, it is assumed that the loaded data is identical to the original data. The data is verified to be correct.&lt;br /&gt;
&lt;br /&gt;
If the stored checksum doesn't match the calculated checksum, then there has been a error. One or more bit's of data is incorrect. The checksum is designed to detect errors only, and often it is not possible to know which bit or bits of data is incorrect and in this case it is not often possible to correct the errors to reproduce the correct data.&lt;br /&gt;
&lt;br /&gt;
A loader which has a checksum therefore is better than a loader that doesn't have a checksum, because the checksum will verify that the data is correct or incorrect.&lt;br /&gt;
&lt;br /&gt;
With a loader which doesn't have a checksum, you have no way to verify the data, and therefore you can't guarantee that the data is identical to the original.&lt;br /&gt;
&lt;br /&gt;
In this case, the only way to test that the data is correct is to make multiple transfers of the program and test each thoroughly (e.g. if the program is a game, you would play the game to the end), checking for graphic corruption and bugs. If all of the transfers operate the same, then you can assume that the data is correct.&lt;br /&gt;
&lt;br /&gt;
== Various Audio file formats ==&lt;br /&gt;
&lt;br /&gt;
There are numerous Audio file formats, each of which can store audio, but each has it's own structures and representation for the data.&lt;br /&gt;
&lt;br /&gt;
The &amp;quot;format&amp;quot; of a file describes the internal structure, order and encoding of the data within the file.&lt;br /&gt;
&lt;br /&gt;
Here is a list of the audio file formats supported by samp2cdt:&lt;br /&gt;
&lt;br /&gt;
* Windows Wave file (a file which has the &amp;quot;.wav&amp;quot; file extension) is the common file format used for audio sounds on computers running &amp;quot;Windows&amp;quot;.&lt;br /&gt;
* A Voice Wave file (a file which has the &amp;quot;.voc&amp;quot; file extension) was created by Creative for the original Soundblaster ISA sound card. This file format is used by the original voc2tzx utility which samp2cdt was developed from.&lt;br /&gt;
* A Audio Interchange file (a file which has the &amp;quot;.aiff&amp;quot; or &amp;quot;.aif&amp;quot; file extension) is the common file format used for audio sounds on the Mac computer.&lt;br /&gt;
* A file which has the &amp;quot;.iff&amp;quot; file extension is the common file format used for audio sounds by the Amiga computer.&lt;br /&gt;
&lt;br /&gt;
==Links==&lt;br /&gt;
[[Converting a tape-image into a audio file]]&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
[[Category:Hardware]][[Category:DATA Storage|*]][[Category:Music and sound]][[Category:CPC Internal Components]]&lt;/div&gt;</summary>
		<author><name>Db6128</name></author>	</entry>

	<entry>
		<id>https://oldwiki.cpcwiki.eu/index.php?title=Cassette_data_information&amp;diff=84648</id>
		<title>Cassette data information</title>
		<link rel="alternate" type="text/html" href="https://oldwiki.cpcwiki.eu/index.php?title=Cassette_data_information&amp;diff=84648"/>
				<updated>2012-12-03T05:40:31Z</updated>
		
		<summary type="html">&lt;p&gt;Db6128: /* Recording a sound */ intended to clarify a few things, mostly ended up rambling :S&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;'''Translation note :'''&lt;br /&gt;
Cassette = Tape.&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
== Recording a sound ==&lt;br /&gt;
&lt;br /&gt;
A sound is recorded by making a measurement of the amplitude of the sound at regular intervals which are defined by the ''sampling rate'' and to a vertical resolution (between the lowest and highest points on the wave) that is called the ''bit-depth''. The act of taking the measurement is often called ''sampling'' and each measurement unit is called a ''sample''. A file which contains samples is often called a waveform, sound sample, audio sample, ''etc.''&lt;br /&gt;
&lt;br /&gt;
The sampling rate defines the rate/frequency at which the measurements are taken. The higher the sampling rate, the faster/more frequently the measurements are taken, and the higher the maximal frequency that can be represented by the signal. Conversely, the lower the sampling rate, the slower the measurements are taken, and the maximal frequency that can be stored is lower. The sample rate is described by the &amp;quot;Hz&amp;quot; unit of measurement. The &amp;quot;Hz&amp;quot; unit of measurement means &amp;quot;per second&amp;quot;. Therefore, a sampling rate of 44010 Hz means 44010 measurements are taken each second (in other words, one measurement every 1/44010 th of a second).&lt;br /&gt;
&lt;br /&gt;
If the sampling is too low, then changes in the sound which occur between each measurement will not be measured. Because higher audio frequencies are defined by oscillating more rapidly, this means that lower sampling rates can store only lower frequencies. Therefore, the faster the measurements are taken, the more accurate the recording will be, and thus the higher the quality of sound that can be recorded. Of course, at high sample rates, because there are many more measurements taken, the resulting size of the file (containing the audio data) can be large.&lt;br /&gt;
&lt;br /&gt;
As should be familiar to CPC users with a little technical knowledge, a sample that uses 8-bits for storage can represent 256 distinct amplitude levels, and a sample which uses 16-bits for storage can describe 65536 distinct amplitude levels. The higher the number of bits used by each sample for storage, the larger the range of distinct amplitude levels that can be represented. Therefore, the higher the number of bits used by each sample for storage, the higher the quality of sound that can be recorded. Moreover, the number of bits is directly related to the dynamic range of the resulting signal; that is, how much of a difference there is between the quietest and loudest sounds that it can represent. 16-bit signals provide a nominal 96 dB of dynamic range.&lt;br /&gt;
&lt;br /&gt;
===What settings should you use?===&lt;br /&gt;
&lt;br /&gt;
All modern sound cards should support 8-bit and 16-bit samples and sample rates of 22050 Hz and 44100 Hz. Some sound cards will support a greater range of recording rates which can be lower and higher than these values. The familiar format of CD audio uses a sampling rate of 44100 Hz and a bit-depth of 16-bits. These values are more than adequate to represent almost all real-world signals for listening by humans - and also, conveniently, are fine for Amstrad tapes, too! In fact, in theory, because the standard Amstrad tape routines have a maximal frequency of 2500 Hz, settings as low as 8000 Hz and 8 bits would probably be fine. However, you will probably want to use higher settings, just in case and/or to keep in line with more common formats such as CD audio, especially if you intend to archive your recordings.&lt;br /&gt;
&lt;br /&gt;
For samp2cdt, you should save the file as &amp;quot;PCM&amp;quot; (&amp;quot;Pulse Code Modulation&amp;quot;). This is a uncompressed, unencoded storage representation. Each sample is a single measurement of the amplitude of the sound taken at a measurement point in time. Other representations such as &amp;quot;ADPCM&amp;quot; (&amp;quot;Amplitude Delta Pulse Code Modulation&amp;quot;), encode or compress the data to reduce the size of the audio file. Samp2cdt can't understand these representations, so please use &amp;quot;PCM&amp;quot; only.&lt;br /&gt;
&lt;br /&gt;
===Illustrations and explanations of digital audio===&lt;br /&gt;
&lt;br /&gt;
[[Image:wave1.gif]]&lt;br /&gt;
&lt;br /&gt;
''Fig 1. An amplitude/time graph showing the waveform of the original sound''&lt;br /&gt;
&lt;br /&gt;
[[Image:wave2.gif]]&lt;br /&gt;
&lt;br /&gt;
''Fig 2. An amplitude/time graph showing the waveform of the original sound. The crosses indicate the amplitude measured at each sample time and the dotted lines indicate the the time of each measurement. The duration of time between each dotted line, defined by the sample rate, is equal to the duration of a sample. From this it can be seen that each sample has a finite and equal duration.''&lt;br /&gt;
&lt;br /&gt;
[[Image:wave3.gif]]&lt;br /&gt;
&lt;br /&gt;
''Fig 3. An amplitude/time graph showing the waveform of the original sound. As in Fig 2, the crosses indicate the amplitude measured at each sample time. The dotted line shows the waveform generated by sampling. The final value of each sample is defined to be the amplitude measured at the time of measurement.''&lt;br /&gt;
&lt;br /&gt;
[[Image:wave4.gif]]&lt;br /&gt;
&lt;br /&gt;
''Fig 4. An amplitude/time graph showing the sampled waveform. This waveform was generated at a high sample rate, and therefore the resulting waveform has a shape which is similar to the original. This waveform is the type you can see in a audio recording program like Goldwave. '''Note''', however, that this distinctively square signal is not what would be output by any barely decent sound-card! Audio hardware has built-in filters to smooth waveforms as they are converted from digital to analogue.''&lt;br /&gt;
&lt;br /&gt;
[[Image:wave5.gif]]&lt;br /&gt;
&lt;br /&gt;
''Fig 5. An amplitude/time graph showing the waveform of the original sound. As in Fig 2, this graph shows the amplitude of each measurement, and the dotted line indicates the time of measurement. This graph was created using a low sample rate. Notice that the time between each measurement is longer compared to Fig 2.''&lt;br /&gt;
&lt;br /&gt;
[[Image:wave6.gif]]&lt;br /&gt;
&lt;br /&gt;
''Fig 6. An amplitude/time graph showing the waveform of the original sound. As in Fig 3, the crosses indicate the amplitude measured at each sample time, and the dotted line shows the waveform generated by sampling. This graph shows the resulting waveform generated using a low sample rate.''&lt;br /&gt;
&lt;br /&gt;
[[Image:wave7.gif]]&lt;br /&gt;
&lt;br /&gt;
''Fig 7. An amplitude/time graph showing the sampled waveform. As explained in the note for Figure 4, this is only a visual representation of the digitally stored audio, '''not''' of the signal that would be output by any competent audio card. However, it does illustrate how low sampling rates reduce the bandwidth of frequencies: This waveform was generated at a low sample rate, and therefore the resulting waveform is much more coarse compared to Fig 4. Notice that although the general shape is similar to the original waveform, much of the smoothness is is lost between the time of each measurement. The loss of smoothness also means loss of information: the lower the sample rating, the more information is lost; in other words, the maximal frequencies that the signal can represent is lower. Similarly, lower bit-depths mean that the signal is less accurate, and in extreme cases can generate audible noise, Therefore, to record a sound, it is best to use relatively high sampling rate and bit-depth.''&lt;br /&gt;
&lt;br /&gt;
Notes:&lt;br /&gt;
&lt;br /&gt;
1. The &amp;quot;Nyquist theory&amp;quot; states that in order to accuratly record a sound of a known frequency, you must use a recording frequency which is more than twice that frequency (note &amp;quot;more than&amp;quot;, not equal to). Example: to record a sound of 3000 Hz, you must record using &amp;gt;6000 Hz. If you use a lower sampling rate (e.g. 5000 Hz), frequencies less than or equal to half of the sampling rate cannot be properly represented and will be altered into lower-sounding frequencies.&lt;br /&gt;
Most Amstrad loaders are between 300 to 2500 Hz, therefore you should use a recording sample rate of &amp;gt;5000 Hz. It is recommended to use one of the common sample rates. e.g. 22050 Hz (22.05 Khz) or 44100 Hz (44.1 Khz).&lt;br /&gt;
&lt;br /&gt;
2. There are two different representations to store the amplitude of the sample in a PCM audio file: unsigned or signed.&lt;br /&gt;
* A 8-bit unsigned sample has values between 0 and 255. In this range, 0 represents a low amplitudes, 255 a high amplitude, and the amplitudes increase linearly from 0 to 255.&lt;br /&gt;
* A 8-bit signed sample has values between -128 and 127. In this range, -128 represents a low amplitude, and 127 high amplitude, and the amplitudes increase linearly from -128 to 127.&lt;br /&gt;
Both methods can represent the same data, just in different ways (techies will be able to compare this to their knowledge of Z80 assembly), so there is no advantage to using either. The original reason for the two methods is due to the original method to playback the sound. Modern sound cards can play audio stored in both ways.&lt;br /&gt;
Note that both (albeit more obvious in the latter) share a feature typical of binary-encoded numbers: there is no exact 'centre' value, because the total number of possible values is even. In the context of audio, this means that, if the signal spanned the entire range, its centre (average) would be slightly off-zero (in this case, below), which is known as a DC offset. However, even if this did occur, it would be negligible and certainly not audible by humans!&lt;br /&gt;
&lt;br /&gt;
== Duplication of cassettes ==&lt;br /&gt;
&lt;br /&gt;
When the writing of a program is completed a &amp;quot;master&amp;quot; cassette is created. This cassette contains a audio representation of the computer data.&lt;br /&gt;
&lt;br /&gt;
The master cassette is then duplicated, using a machine, onto many blank cassettes. These cassettes are packaged with instructions and distributed.&lt;br /&gt;
&lt;br /&gt;
It is also easy to make a copy of a cassette if you have a twin cassette system, where one cassette unit will play the sound and the other will record. A first generation copy taken from a original cassette could be considered a copy of a copy of the master cassette.&lt;br /&gt;
&lt;br /&gt;
Each time a cassette is copied however, additional noise may be introduced into the copied version. This noise is a mixture of noise from the original, and noise created by the machine making the copy. Therefore the sound on any cassette contains a mixture of noise and the sound of the computer data.&lt;br /&gt;
&lt;br /&gt;
A loader on the computer must therefore be able to identify the actual sound of the data from other sounds that are on the cassette. If it can't do this, then there will be loading errors.&lt;br /&gt;
&lt;br /&gt;
If you are transfering a cassette using samp2cdt, then you are advised to use an original (i.e. a cassette created directly from a master cassette), or a first generation copy (i.e. a cassette copied from an original).&lt;br /&gt;
&lt;br /&gt;
== Loader ==&lt;br /&gt;
&lt;br /&gt;
A &amp;quot;loader&amp;quot; is the name given to a program that reads data from cassette into the computer memory.&lt;br /&gt;
&lt;br /&gt;
There is a &amp;quot;system&amp;quot; loader which is built into the Amstrad CPC ROM. This loader is activated when the computer is in cassette mode (note 1), and it can only understand one specific computer audio sound, the audio sound of the Amstrad CPC system data-blocks.&lt;br /&gt;
&lt;br /&gt;
To read other loading systems (e.g. a fast-loader), there must be a program on the cassette (a &amp;quot;pre-loader&amp;quot; or &amp;quot;boot loader&amp;quot; or sometimes refered to as &amp;quot;loader&amp;quot;), stored using the Amstrad CPC system loader, which when executed will be able to understand and load fast-loader data.&lt;br /&gt;
&lt;br /&gt;
This loader program is usually stored immediatly before any fast-loader blocks, and takes over from the system loader to load the remaining fast-loader blocks.&lt;br /&gt;
&lt;br /&gt;
|program for fast-loader| |fast-loader block(s)|&lt;br /&gt;
&lt;br /&gt;
So when a cassette is loaded the following occurs:&lt;br /&gt;
&lt;br /&gt;
1. system loader recognises and loads &amp;quot;program for fast-loader&amp;quot;.&lt;br /&gt;
2. &amp;quot;program for fast loader&amp;quot; takes control and loads the data from the fast-loader block(s) into computer memory&lt;br /&gt;
3. when loading has completed, the program is executed. &lt;br /&gt;
&lt;br /&gt;
Notes:&lt;br /&gt;
&lt;br /&gt;
1. a CPC without a disc interface (e.g. a CPC464, CPC464+ or KC Compact) will start-up in cassette mode. For a CPC with a disc interface attached (or internal), you must type |TAPE to enter cassette mode.&lt;br /&gt;
&lt;br /&gt;
You can test if the computer is operating in cassette mode by typing RUN&amp;quot;. If you see &amp;quot;Press PLAY then any key&amp;quot;, then the computer is operating in cassette mode. If there is an error, then the computer is not operating in cassette mode. &lt;br /&gt;
&lt;br /&gt;
== Amstrad cassette hardware ==&lt;br /&gt;
&lt;br /&gt;
=== Reading ===&lt;br /&gt;
&lt;br /&gt;
The audio from the cassette is read from a cassette player through the Amstrad's cassette electronics.&lt;br /&gt;
&lt;br /&gt;
The Amstrad's cassette electronics converts the amplitude of the sound (a analogue signal) into a &amp;quot;0&amp;quot; or &amp;quot;1&amp;quot; measurement (a digital signal). This measurement can then be read from bit 7 of port B of the PPI 8255 IC.&lt;br /&gt;
&lt;br /&gt;
[[Image:conv.gif]]&lt;br /&gt;
&lt;br /&gt;
''Fig 8. This image shows the conversion of the audio waveform from the cassette into the digital representation by the Amstrad's cassette electronics. i.e. audio waveform (on cassette) -&amp;gt; Amstrad's cassette electronics -&amp;gt; 0 and 1 measurements''&lt;br /&gt;
&lt;br /&gt;
The resulting measurements can be read using the following Z80 instructions:&lt;br /&gt;
&lt;br /&gt;
&amp;lt;pre&amp;gt;&lt;br /&gt;
ld b,&amp;amp;f5			;; I/O port address for PPI 8255 port B&lt;br /&gt;
				;; (PPI 8255 port B is operating as input.)&lt;br /&gt;
in a,(c)			;; read port B inputs&lt;br /&gt;
and %10000000			;; isolate bit 7 which contains the measurement.&lt;br /&gt;
&amp;lt;/pre&amp;gt;&lt;br /&gt;
&lt;br /&gt;
This measurement is *not* the actual state of a data-bit, but represents a low (&amp;quot;0&amp;quot;) or high amplitude (&amp;quot;1&amp;quot;). In this document, the value of this measurement will be refered to as a &amp;quot;high&amp;quot; (&amp;quot;1&amp;quot;) or &amp;quot;low&amp;quot; (&amp;quot;0&amp;quot;) level.&lt;br /&gt;
&lt;br /&gt;
Notes:&lt;br /&gt;
&lt;br /&gt;
1. The CPC464 and CPC464+ have a cassette player built in. To connect a cassette player to the CPC664, CPC6128 or KC Compact then you must use a lead.&lt;br /&gt;
2. It is not known exactly how the amplitude of the sound from the cassette corresponds to the final &amp;quot;0&amp;quot; or &amp;quot;1&amp;quot; measurement.&lt;br /&gt;
&lt;br /&gt;
samp2cdt uses a crude method to perform this conversion.&lt;br /&gt;
&lt;br /&gt;
For a 8-bit signed sample:&lt;br /&gt;
&lt;br /&gt;
* if the amplitude is 0..128, then the final measurement will be &amp;quot;1&amp;quot;.&lt;br /&gt;
* if the amplitude is -128..0 then the final measurement will be &amp;quot;0&amp;quot;.&lt;br /&gt;
&lt;br /&gt;
=== Writing ===&lt;br /&gt;
&lt;br /&gt;
A waveform is written to cassette using bit 5 of port C of the 8255 PPI IC. The waveform can only be defined by a high or low level, defined by the state of bit 5, which is then converted by the Amstrad's cassette electronics into a final output amplitude which is recorded onto cassette.&lt;br /&gt;
&lt;br /&gt;
A high level can be written using the following Z80 instructions:&lt;br /&gt;
&lt;br /&gt;
&amp;lt;pre&amp;gt;&lt;br /&gt;
ld b,&amp;amp;f6		;; I/O port address for PPI 8255 port C&lt;br /&gt;
			;; (PPI 8255 port C is operating as output.)&lt;br /&gt;
&lt;br /&gt;
set 5,a			;; set cassette write output to high level &lt;br /&gt;
out (c),a		;; output level&lt;br /&gt;
&amp;lt;/pre&amp;gt;&lt;br /&gt;
&lt;br /&gt;
A low level can be written using the following Z80 instructions:&lt;br /&gt;
&lt;br /&gt;
&amp;lt;pre&amp;gt;&lt;br /&gt;
ld b,&amp;amp;f6		;; I/O port address for PPI 8255 port C&lt;br /&gt;
			;; (PPI 8255 port C is operating as output.)&lt;br /&gt;
&lt;br /&gt;
res 5,a			;; set cassette write output to low level&lt;br /&gt;
out (c),a		;; output level&lt;br /&gt;
&amp;lt;/pre&amp;gt;&lt;br /&gt;
&lt;br /&gt;
The amplitude of the output waveform is not amplified, therefore if you wish to record the cassette audio direct from an Amstrad you will need to amplify the waveform.&lt;br /&gt;
&lt;br /&gt;
If the state of bit 5 is changed at a fixed frequency, then the graph of the state of bit 5 over time will be a square wave. However, the resulting audio written on the cassette will not be a perfect square wave because nature will attempt to convert the waveform into a sine wave.&lt;br /&gt;
Loading system audio waveform&lt;br /&gt;
&lt;br /&gt;
Every loading system on the Amstrad uses a serial bit-stream. i.e. a single bit of information is read at a time.&lt;br /&gt;
&lt;br /&gt;
This serial bit-stream is grouped into blocks of audio sound.&lt;br /&gt;
&lt;br /&gt;
Every loading system uses a basic structure to describe each audio block in the following order:&lt;br /&gt;
&lt;br /&gt;
|pilot|sync|data|trailer|&lt;br /&gt;
&lt;br /&gt;
'''pilot'''&lt;br /&gt;
&lt;br /&gt;
This is also refered to as &amp;quot;leader&amp;quot; by some documents.&lt;br /&gt;
&lt;br /&gt;
This is constructed from a repeated waveform often with a fixed number of repetitions defined by the loading system.&lt;br /&gt;
&lt;br /&gt;
The shape of the waveform is known by the loader program and this is used to identify the pilot waveform from other waveforms that may be present (e.g. noise).&lt;br /&gt;
&lt;br /&gt;
The pilot is often long, so that the loader doesn't need to see the start of the pilot waveform in order to load the block.&lt;br /&gt;
&lt;br /&gt;
The loader program will test the incoming waveform, checking it against the parameters defined for the pilot, before the waveform is accepted as the pilot waveform. (e.g. the number of repetitions must be some defined minimum value). The incoming waveform must fall within these specifications otherwise the waveform is not accepted as a pilot waveform. &lt;br /&gt;
&lt;br /&gt;
'''sync (&amp;quot;synchronisation&amp;quot;)'''&lt;br /&gt;
&lt;br /&gt;
The sync is a waveform which is different to the pilot, and this defines the end of the pilot and the start of the data. When this sync has been detected, the loader knows that there is data following, and that the loader is always at the same point in the data stream. i.e. the loader program is synchronised to a specific point in the data waveform.&lt;br /&gt;
&lt;br /&gt;
'''data'''&lt;br /&gt;
&lt;br /&gt;
This is the actual data which is composed of waveforms defining &amp;quot;0&amp;quot; and &amp;quot;1&amp;quot; data bits.&lt;br /&gt;
&lt;br /&gt;
The first element of the data may be a marker or id which may, for example, indicate the type of data in the block or the number of the block.&lt;br /&gt;
&lt;br /&gt;
The remaining bits will define the data and zero or more checksums.&lt;br /&gt;
&lt;br /&gt;
The whole data may consist of a single block with a single location and length (e.g. one block for a screen another for data), or multiple blocks each with their own location and length. (e.g. one block for screen and data)&lt;br /&gt;
&lt;br /&gt;
The location and lengths of the blocks may be in the data stream itself, or they may be in a preceeding block, or may be hard-coded into the loader program. &lt;br /&gt;
&lt;br /&gt;
'''trailer'''&lt;br /&gt;
&lt;br /&gt;
The trailer always follows the data. Some loaders may not have a trailer. The two main purposes of the trailer are to ensure that the waveform of the last data bit in the data is constructed correctly and to provide some time in which the loader can prepare for the next block.&lt;br /&gt;
&lt;br /&gt;
The exact definition of the loading systems's audio waveform is defined by the loader program.&lt;br /&gt;
&lt;br /&gt;
samp2cdt has a number of decoder algorithms which recognises the audio waveform of various loading systems. These decoders read the waveform using a similar method to the loader program itself. These decoders have been created by examining the instructions of each loader program and the graph of the waveform in a sound recording package.&lt;br /&gt;
&lt;br /&gt;
== Example of a typical loading system ==&lt;br /&gt;
&lt;br /&gt;
The data on cassette actually consists of changing 0 and 1 levels. (a &amp;quot;level&amp;quot; is a magnitude of a value). The loader measures the time between each &amp;quot;level transition&amp;quot; where a &amp;quot;level transition&amp;quot; is the change from a &amp;quot;0&amp;quot; to a &amp;quot;1&amp;quot; level or the change from a &amp;quot;1&amp;quot; to a &amp;quot;0&amp;quot; level. The level can be timed using the following Z80 instructions: &lt;br /&gt;
&lt;br /&gt;
&amp;lt;pre&amp;gt;&lt;br /&gt;
;; - keep testing the state of bit 7 of PPI 8255 port B &lt;br /&gt;
;; - update the counter to record the number of tests done &lt;br /&gt;
;; - when bit 7 of PPI 8255 port B changes state, stop testing. &lt;br /&gt;
;; counter will hold the total number of tests made. &lt;br /&gt;
;; &lt;br /&gt;
;; B = &amp;amp;F5 (I/O address of PPI 8255 input port B) &lt;br /&gt;
;; C = previous data read from PPI port B ld d,0 &lt;br /&gt;
;; initialise count to 0 .loop inc d &lt;br /&gt;
;; increment count in a,(c) &lt;br /&gt;
;; read input to PPI 8255 port B xor c &lt;br /&gt;
;; exclusive-or with previous data read from PPI 8255 port B and %10000000 &lt;br /&gt;
;; isolate bit 7 &lt;br /&gt;
;; if result is 0, then the state of bit 7 that has &lt;br /&gt;
;; been read is the same as the previous state. i.e. bit 7 has not changed state. &lt;br /&gt;
;; if result is not 0, then the state of bit 7 has changed. &lt;br /&gt;
;; e.g. if bit 7 was previously 1, it is now 0. if bit 7 was previously 0, it is now 1. jr z,loop &lt;br /&gt;
;; when execution reaches here we know that bit 7 has changed state and D &lt;br /&gt;
;; contains the number of tests.&lt;br /&gt;
&amp;lt;/pre&amp;gt;&lt;br /&gt;
&lt;br /&gt;
== Loader operation==&lt;br /&gt;
&lt;br /&gt;
The loader generally operates in this way:&lt;br /&gt;
&lt;br /&gt;
1. Time a wave. Is the duration of the wave within the minimum and maximum duration required for the pilot. If yes, go to 2, else go to 1.&lt;br /&gt;
&lt;br /&gt;
2. We might have seen a wave from the pilot signal. time a wave. Is the duration of this wave within the minimum and maximum duration required for the pilot. If yes, increment number of waves seen, go to 2, else go to 1.&lt;br /&gt;
&lt;br /&gt;
3. Have we seen the minimum number of pilot waves? Yes, go to 4, else go to 2. 4. time a wave. Is the duration of the wave within the minimum and maximum duration required for the sync? 2. Each Z80 instruction takes a finite time to execute. The execution time depends on the computer. If the timing of the Z80 instructions used by the test algorithm is known and predictable, then the time for each test can be calculated. Now, since the count represents the number of tests made before the condition is true (i.e. bit 7 changes state), the total time for the condition to be true, is the sum of the time for each test made. If each test always takes the same time, then the total time is the number of tests multiplied by the time for one test. In the Amstrad computer, all Z80 instructions execute in multiples of 1us (microsecond) regardless of their location in RAM. This fact simplifies this calculation.&lt;br /&gt;
Checksum&lt;br /&gt;
&lt;br /&gt;
A &amp;quot;Checksum&amp;quot; is used to verify the loaded data.&lt;br /&gt;
&lt;br /&gt;
A Checksum is the result of the &amp;quot;checksum calculation&amp;quot; made on a block of data. The actual calculation can be different depending on the method chosen.&lt;br /&gt;
&lt;br /&gt;
There are two &amp;quot;Checksum&amp;quot;s.&lt;br /&gt;
&lt;br /&gt;
1. a stored &amp;quot;Checksum&amp;quot;.&lt;br /&gt;
&lt;br /&gt;
This is the result of the &amp;quot;checksum calculation&amp;quot; calculated from the correct data. This is then stored with the data (e.g. before or after the data) when the master cassette is created.&lt;br /&gt;
2. a calculated &amp;quot;Checksum&amp;quot;.&lt;br /&gt;
&lt;br /&gt;
This is the result of the &amp;quot;checksum calculation&amp;quot; calculated from the data read from the cassette. After the calculation is complete it is compared against the stored checksum. &lt;br /&gt;
&lt;br /&gt;
The stored and calculated &amp;quot;Checksums&amp;quot; are initialised with the same initial value and calculated using the same algorithm. Therefore, if the stored checksum matches the calculated checksum, it is assumed that the loaded data is identical to the original data. The data is verified to be correct.&lt;br /&gt;
&lt;br /&gt;
If the stored checksum doesn't match the calculated checksum, then there has been a error. One or more bit's of data is incorrect. The checksum is designed to detect errors only, and often it is not possible to know which bit or bits of data is incorrect and in this case it is not often possible to correct the errors to reproduce the correct data.&lt;br /&gt;
&lt;br /&gt;
A loader which has a checksum therefore is better than a loader that doesn't have a checksum, because the checksum will verify that the data is correct or incorrect.&lt;br /&gt;
&lt;br /&gt;
With a loader which doesn't have a checksum, you have no way to verify the data, and therefore you can't guarantee that the data is identical to the original.&lt;br /&gt;
&lt;br /&gt;
In this case, the only way to test that the data is correct is to make multiple transfers of the program and test each thoroughly (e.g. if the program is a game, you would play the game to the end), checking for graphic corruption and bugs. If all of the transfers operate the same, then you can assume that the data is correct.&lt;br /&gt;
&lt;br /&gt;
== Various Audio file formats ==&lt;br /&gt;
&lt;br /&gt;
There are numerous Audio file formats, each of which can store audio, but each has it's own structures and representation for the data.&lt;br /&gt;
&lt;br /&gt;
The &amp;quot;format&amp;quot; of a file describes the internal structure, order and encoding of the data within the file.&lt;br /&gt;
&lt;br /&gt;
Here is a list of the audio file formats supported by samp2cdt:&lt;br /&gt;
&lt;br /&gt;
* Windows Wave file (a file which has the &amp;quot;.wav&amp;quot; file extension) is the common file format used for audio sounds on computers running &amp;quot;Windows&amp;quot;.&lt;br /&gt;
* A Voice Wave file (a file which has the &amp;quot;.voc&amp;quot; file extension) was created by Creative for the original Soundblaster ISA sound card. This file format is used by the original voc2tzx utility which samp2cdt was developed from.&lt;br /&gt;
* A Audio Interchange file (a file which has the &amp;quot;.aiff&amp;quot; or &amp;quot;.aif&amp;quot; file extension) is the common file format used for audio sounds on the Mac computer.&lt;br /&gt;
* A file which has the &amp;quot;.iff&amp;quot; file extension is the common file format used for audio sounds by the Amiga computer.&lt;br /&gt;
&lt;br /&gt;
==Links==&lt;br /&gt;
[[Converting a tape-image into a audio file]]&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
[[Category:Hardware]][[Category:DATA Storage|*]][[Category:Music and sound]][[Category:CPC Internal Components]]&lt;/div&gt;</summary>
		<author><name>Db6128</name></author>	</entry>

	<entry>
		<id>https://oldwiki.cpcwiki.eu/index.php?title=KC_Compact&amp;diff=84647</id>
		<title>KC Compact</title>
		<link rel="alternate" type="text/html" href="https://oldwiki.cpcwiki.eu/index.php?title=KC_Compact&amp;diff=84647"/>
				<updated>2012-12-02T22:06:11Z</updated>
		
		<summary type="html">&lt;p&gt;Db6128: correct user link&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;''Note: Much of this article was originally written by [[User:CPCLER|CPCLER]], and so any references in the first person (&amp;quot;I&amp;quot;, &amp;quot;me&amp;quot;, ''etc.'') are probably by him.&lt;br /&gt;
&lt;br /&gt;
[[Image:Kcc top.jpg|right|thumb|250px|The East German KC Compact Computer]]&lt;br /&gt;
&lt;br /&gt;
== Background ==&lt;br /&gt;
&lt;br /&gt;
The KC compact is a [[Clones|clone]] of the Amstrad CPC and was developed by a East German company called RFT.&lt;br /&gt;
&lt;br /&gt;
The computer was designed in 1989 and made to celebrate 40 years of the DDR/GDR (Deutsche Demokratische Republik/German Democratic Republic). A year later the Berlin wall came down and East and West Germany were joined together and the DDR/GDR came to an end. Production of the computer halted, and it was only available for a short time and is rare.&lt;br /&gt;
&lt;br /&gt;
I read about the KC compact in the Amscene section of Amstrad Action magazine, a Future Publishing Ltd publication. From that point I was hooked and I eventually wanted to own one.&lt;br /&gt;
&lt;br /&gt;
During this time I found Andreas Krueger, webmaster of the Robotron-Net website, who owned one of these computers. Andreas was very helpful and provided photocopies of a manual and the schematics, a dump of the roms, ran some tests for me and more. I want to send him a big thankyou for all the help he gave.&lt;br /&gt;
&lt;br /&gt;
In the last few months (May 2001) I contacted Thomas Tratz who owns a KC Compact. Thomas Tratz runs a great website for QuickBASIC. He has given me many of the original manuals, original software, and I bought a real KC Compact from his cousin! A big thankyou to Thomas and his cousin!&lt;br /&gt;
&lt;br /&gt;
The case of the KC compact is the same as the Robotron BIC A5105, but has different hardware inside. The KC Compact I have does not have a information sticker on the underside, but information for the A5105!&lt;br /&gt;
&lt;br /&gt;
Many of the IC's inside are Russian and clones of other IC's. (The UA880 is a clone of the Zilog Z80, and the U82536 is a clone of the Zilog Z8536).&lt;br /&gt;
&lt;br /&gt;
I know of only a few people who have a real KC Compact (Andreas Kruger, Thomas Tratz, Frank Salmon of Oldbits computer collection and myself), if there are others please contact me and I will make a list of KC Compact owners, and you will be members of an exclusive club! :)&lt;br /&gt;
&lt;br /&gt;
This document will describe the hardware and software differences (that are known) between this system and the Amstrad CPC.&lt;br /&gt;
&lt;br /&gt;
== Alternative power supply ==&lt;br /&gt;
&lt;br /&gt;
With the help of Darren Jarvis I now have a new power supply for my KC Compact. He gave me a power pack from a PC laptop, and with a special lead, this works perfectly on the KC Compact.&lt;br /&gt;
&lt;br /&gt;
PC laptop power pack details:&lt;br /&gt;
&lt;br /&gt;
LISHIN INTERNATIONAL ENTERPRISE CORP. AC ADAPTOR.&lt;br /&gt;
&lt;br /&gt;
MODEL: LSE9802A1960&lt;br /&gt;
&lt;br /&gt;
INPUT: 100-240V A.C. 50/60Hz 1.5A&lt;br /&gt;
&lt;br /&gt;
OUTPUT: 19V D.C. 3.16A. 60W MAX&lt;br /&gt;
&lt;br /&gt;
The power pack has a 3.5mm power plug at the end.&lt;br /&gt;
&lt;br /&gt;
I made a lead which has a 3.5mm power socket and a telefunktion socket.&lt;br /&gt;
&lt;br /&gt;
== External power supply ==&lt;br /&gt;
&lt;br /&gt;
The official external power modulator provides +20V,-20V DC (err... more probably +20V and 0V) with 500mA (believed to be un-smoothed), from a source of ~220V at 50Hz.&lt;br /&gt;
&lt;br /&gt;
The external power modulator is connected to the computer's internal power modulator, which generates a smoothed 12V and 5V outputs and these provide the power for the IC's. Most or all runs at 5V. The 12V are used for the built-in TV modulator, and is also output to the Expansion Port and Scart connector (and, not sure, maybe used elsewhere, too)&lt;br /&gt;
&lt;br /&gt;
The internal power supply is very tolerant and the computer will run with input voltages as low as 6V, but the colours in the palette are weak. If the voltage is increased, the colours become strong, and around 18V-20V, they are all correct. If a low input voltage is used, it is likely that the 12V power output on the expansion connector will not be correct.&lt;br /&gt;
&lt;br /&gt;
The connector is believed to be a Telefunken Line socket (Maplins catalogue reference: FT99H). If you can't find this connector then you can make a suitable connector using a power lead and a sharp craft knife.&lt;br /&gt;
&lt;br /&gt;
== Software differences ==&lt;br /&gt;
&lt;br /&gt;
The base system has 32k of &lt;br /&gt;
&lt;br /&gt;
* Locomotive BASIC v1.1 rom (identical to BASIC rom in English CPC6128) (16k)&lt;br /&gt;
* A modified operating system rom from an English CPC6128 (16k)&lt;br /&gt;
&lt;br /&gt;
* Differences are:&lt;br /&gt;
&lt;br /&gt;
:* Different start-up message&lt;br /&gt;
:* Computer names (Schneider, Awa, Solavox etc) removed.&lt;br /&gt;
:* Initialisation code for the CIO (see details below)&lt;br /&gt;
:* Test program transfer (see details below) &lt;br /&gt;
&lt;br /&gt;
I believe most software will run, but I have not been able to test this, but programs that use the following may be broken:&lt;br /&gt;
&lt;br /&gt;
* Programs that rely on exact Interrupt mechanism of the CPC6128&lt;br /&gt;
* Programs that call direct into the operating system rom (these may work, because the changes to the operating system rom are minor)&lt;br /&gt;
* Programs that rely on a unofficial hardware feature (I do not know of all hardware details, so I cannot say the level of compatibility)&lt;br /&gt;
&lt;br /&gt;
The disc interface has a modified AMSDOS rom.&lt;br /&gt;
&lt;br /&gt;
== Hardware differences ==&lt;br /&gt;
&lt;br /&gt;
* The colour palette is not cleared to black on reset&lt;br /&gt;
* The Amstrad unofficial mode (bit 1=bit 0=1 of [[Gate Array]] mode register) does not exist. The clock to the shift registers is stopped. The last colour is output.&lt;br /&gt;
* The raster interrupt is generated in a different way by the CIO.&lt;br /&gt;
&lt;br /&gt;
This section describes the known hardware differences. This information is not definitive. I do not know all differences,&lt;br /&gt;
&lt;br /&gt;
== UA880 CPU (equivalent to Zilog Z80) ==&lt;br /&gt;
&lt;br /&gt;
The KC compact uses a UA880 CPU, which is a Russian clone of the [[Z80]]. It is not confirmed whether there are any actual differences compared to a real Z80. In terms of documentation, the KC Compact System Handbook lists the opcodes SLL, INF [a.k.a. IN F,(C)], and OUTF [a.k.a. OUT (C),F], whereas these have remained undocumented by Zilog.&lt;br /&gt;
&lt;br /&gt;
== Video ==&lt;br /&gt;
&lt;br /&gt;
* The [[CRTC]] should be more or less same as those used in CPCs. The handbook and schematic say the CRTC is a CM 607, but the CRTC in CPCLER's an HD6845P.&lt;br /&gt;
* The clocks for each mode (0,1 and 2) are derived from the main 16Mhz clock, these then drive the shift registers to output pixels to the display.&lt;br /&gt;
* Mode 3 is hardwired to 5V, so it doesn't have a clock. The shift registers are stopped and output the last colour they clocked in. Even if this mode was activated in way of connecting up the clock for Mode 0 it is not decoded the same as on the CPC: 8 colours are chosen from the 16 colour palette, instead of 4.&lt;br /&gt;
* There may be a bug whereby if the border colour is changed rapidly there could be 1 pixel of another colour output. When loading a game which changes the colour of the border, I have seen moving &amp;quot;snow&amp;quot; on the screen. I have seen this effect, but I need to confirm how it is generated.&lt;br /&gt;
* The video output doesn't generate luminance, so the KC Compact can't be used with a GT64 or MM14.&lt;br /&gt;
&lt;br /&gt;
== Colour-ROM ==&lt;br /&gt;
&lt;br /&gt;
The KC compact has a colour-rom. Each byte in the ROM defines the R,G and B of an output colour.&lt;br /&gt;
&lt;br /&gt;
{|{{Prettytable|width: 700px; font-size: 2em;}}&lt;br /&gt;
|''Bit''||''Function''&lt;br /&gt;
|-&lt;br /&gt;
|7||not used''&lt;br /&gt;
|-&lt;br /&gt;
|6||not used''&lt;br /&gt;
|-&lt;br /&gt;
|5||Green''&lt;br /&gt;
|-&lt;br /&gt;
|4||Green''&lt;br /&gt;
|-&lt;br /&gt;
|3||Red''&lt;br /&gt;
|-&lt;br /&gt;
|2||Red''&lt;br /&gt;
|-&lt;br /&gt;
|1||Blue''&lt;br /&gt;
|-&lt;br /&gt;
|0||Blue''&lt;br /&gt;
|-&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
The hardware colour index (defined by the I/O write: A15=&amp;quot;0&amp;quot;, A14=&amp;quot;1&amp;quot;, D7=&amp;quot;0&amp;quot;, D6=&amp;quot;1&amp;quot; D3-D0 define hardware colour index), is used as a look-up into the ROM.&lt;br /&gt;
&lt;br /&gt;
Each colour-element (R, G or B) is defined using 2 bits and has the potential to define a total palette of 64 colours. The colour-rom only uses 3 of the 4 possible settings for each colour-element. Looking at the schematic, the potential is not realised, the two signals for each colour use the same resistors before being combined. This means that the bit combinations 10 and 01 produce the same result. So this means only 27 colours are possible.&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
{|{{Prettytable|width: 700px; font-size: 2em;}}&lt;br /&gt;
|''Element Bit 1''||''Element Bit 0''||Intensity''&lt;br /&gt;
|-&lt;br /&gt;
|0||0||Zero''&lt;br /&gt;
|-&lt;br /&gt;
|0||1||Half (same as 10)''&lt;br /&gt;
|-&lt;br /&gt;
|1||0||Half (same as 01)''&lt;br /&gt;
|-&lt;br /&gt;
|1||1||Full''&lt;br /&gt;
|-&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
The colour ROM can be downloaded from the KC-Klub homepage.&lt;br /&gt;
&lt;br /&gt;
== External connectors ==&lt;br /&gt;
&lt;br /&gt;
=== Built-in connectors: pinout ===&lt;br /&gt;
&lt;br /&gt;
* [[Connector:Cassette recorder|Cassette recorder]] - other pinout as CPC, motor control is TTL (not a relay)&lt;br /&gt;
* [[Connector:Digital joystick|Digital joystick]] - exactly as CPC (all 9 pins are exactly same)&lt;br /&gt;
* [[Connector:Expansion port|Expansion port]] - almost same as CPC (plus some extra pins: additional voltages, TEST feature, FBAS output)&lt;br /&gt;
* [[Connector:Monitor|Monitor]] - 21pin Scart connector, and UHF modulator&lt;br /&gt;
* [[Connector:Printer port|Printer port]] - almost same as CPC Plus (25pin)&lt;br /&gt;
* [[Connector:Stereo sound|Stereo sound]] - 5pin DIN (not 3.5mm)&lt;br /&gt;
&lt;br /&gt;
=== Cassette socket ===&lt;br /&gt;
&lt;br /&gt;
The Cassette socket has different connection assignments compared to the CPC, so you can't use a CPC cassette lead directly with the KC Compact.&lt;br /&gt;
&lt;br /&gt;
I made a second lead which converted between KC Compact assignments and CPC assignments, which was connected between KC Compact and the CPC cassette lead.&lt;br /&gt;
&lt;br /&gt;
I have been successfully loaded some CPC software.&lt;br /&gt;
&lt;br /&gt;
=== Expansion socket ===&lt;br /&gt;
&lt;br /&gt;
The KC compact has a real connector compared to the P.C.B. edge connector of an English CPC6128. The connector appears to be a PC Card connector. This connector is not the same as the one on a German CPC6128.&lt;br /&gt;
&lt;br /&gt;
The expansion connector has more pins; 58 compared to 50 on an English CPC6128.&lt;br /&gt;
&lt;br /&gt;
I am in the process of making an adaptor so that I can test CPC hardware on the KC Compact.&lt;br /&gt;
&lt;br /&gt;
=== Parallel ===&lt;br /&gt;
&lt;br /&gt;
On the KC compact the parallel port is connected to Port A of the CIO.&lt;br /&gt;
&lt;br /&gt;
It is a general purpose I/O port. All 8-bits can be used for input or output. The input/output of each bit can be programmed. With standard setup, bit 7 is assigned to /STROBE, and bits 0-6 are assigned to Printer DATA, making a 7-bit printer port. Additionally, the 8th printer bit is implemented via Bit5 of PIO Port C (see [[8bit Printer Ports]]).&lt;br /&gt;
&lt;br /&gt;
* The Amstrad CPC has a single-direction, 7-bit port.&lt;br /&gt;
* The KC Compact has a bi-directional, 8-bit port.&lt;br /&gt;
&lt;br /&gt;
The KC compact parallel port is more powerful and flexible compared to the Amstrad CPC parallel port!&lt;br /&gt;
&lt;br /&gt;
=== Keyboard ===&lt;br /&gt;
&lt;br /&gt;
* The keyboard matrix of the KC compact supports all the keys of the CPC, but the following keys are not on the keyboard: F5, F6,F7,F8,F9.&lt;br /&gt;
* The KC Compact has a power LED (near CLR key). There are also (unused) locations for two additional LEDs (near TAB/CAPS key), eventually these locations are used by the D005 keyboard for KC-85 computers, or by the Robotron A5105 computer (both D005 and A5105 use the same case &amp;amp; keyboard as the KC Compact, aside from that, they have nothing to do with it).&lt;br /&gt;
&lt;br /&gt;
== KP580BB55 PIO (equivalent to 8255 PPI) ==&lt;br /&gt;
&lt;br /&gt;
Used (almost) identically as the CPC's [[8255]]. PIO Port B is slightly different:&lt;br /&gt;
&lt;br /&gt;
{|{{Prettytable|width: 700px; font-size: 2em;}}&lt;br /&gt;
|7||Cassette data read (identical to CPC)&lt;br /&gt;
|-&lt;br /&gt;
|6||Centronics/Printer Busy (identical to CPC)&lt;br /&gt;
|-&lt;br /&gt;
|5||/EXP (identical to CPC)&lt;br /&gt;
|-&lt;br /&gt;
|4||1 (+5v) (would be LK4 screen refresh rate in CPC) (but isn't like so in KC Compact?)&lt;br /&gt;
|-&lt;br /&gt;
|3||1 (+5v) (would be LK3 manufacturer ID in CPC)&lt;br /&gt;
|-&lt;br /&gt;
|2||0 (0v) (would be LK2 manufacturer ID in CPC)&lt;br /&gt;
|-&lt;br /&gt;
|1||/TEST (would be LK1 manufacturer ID in CPC)&lt;br /&gt;
|-&lt;br /&gt;
|0||VSYNC (identical to CPC)&lt;br /&gt;
|-&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
* Note: The KC System Handbook accidently calls the chip &amp;quot;KP580B55&amp;quot;, however, the correct name is &amp;quot;KP580BB55&amp;quot; (with double &amp;quot;B&amp;quot;).&lt;br /&gt;
&lt;br /&gt;
== U82536 CIO (equivalent to Zilog Z8536 CIO) ==&lt;br /&gt;
&lt;br /&gt;
* [[CIO Overview]]&lt;br /&gt;
* [[CIO Usage in KC Compact]]&lt;br /&gt;
* [[CIO Registers (Summary)]]&lt;br /&gt;
* [[CIO Registers (Detailed)]]&lt;br /&gt;
&lt;br /&gt;
The CIO chip is a Counter and I/O chip. In the KC compact system it is used to generate interrupts, access to the parallel printer port, and possibly video control.&lt;br /&gt;
&lt;br /&gt;
When A12 of the I/O address is &amp;quot;0&amp;quot;, the CIO is selected. Bit A9 and A8 of the I/O address select the registers of the CIO,&lt;br /&gt;
to avoid conflict with other peripherals the CIO should be access using:&lt;br /&gt;
&lt;br /&gt;
{|{{Prettytable|width: 700px; font-size: 2em;}}&lt;br /&gt;
|''Port''||''A9''||''A8''||''Register''||''Usage in KC Compact''&lt;br /&gt;
|-&lt;br /&gt;
|&amp;amp;ECxx||0||0||Port B data register||setup as timer and is connected to the video hardware (?)&lt;br /&gt;
|-&lt;br /&gt;
|&amp;amp;EDxx||0||1||Port C data register||setup as timer and is connected to the Interrupt hardware &lt;br /&gt;
|-&lt;br /&gt;
|&amp;amp;EExx||1||0||Control register||control&lt;br /&gt;
|-&lt;br /&gt;
|&amp;amp;EFxx||1||1||Port A data register||setup as I/O and is connected to the parallel printer port&lt;br /&gt;
|-&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
* Note: A8 is passed through an inverter, resulting in the above &amp;quot;B,C,Control,A&amp;quot; ordering - this is done to map Port A to the same address as the CPC Printer Port (without the inverter, CIO registers would have &amp;quot;C,B,A,Control&amp;quot; ordering).&lt;br /&gt;
&lt;br /&gt;
On start-up, the KC compact programs the CIO to the following state:&lt;br /&gt;
&lt;br /&gt;
* Port A: I/O mode: all bits are set to output, and bit 7 is inverted when writing. (bit 7 is /strobe signal to printer)&lt;br /&gt;
* Port B: Counter mode (port B is split into two counters, both are setup the same): continuous count, restarts when count is over, uses external trigger, uses external input to update count, pulse output (when count is over)&lt;br /&gt;
&lt;br /&gt;
* Port C: Counter mode: same configuration as port B. &lt;br /&gt;
&lt;br /&gt;
Port C is used to generate interrupts. The counter input is HSYNC (the counter counts counter-input transitions; low-high and high-low). The trigger input is VSYV (this signal is derived from VSYNC).&lt;br /&gt;
&lt;br /&gt;
What this means:&lt;br /&gt;
&lt;br /&gt;
* The CIO Port C counter is updated when HSYNC changes state&lt;br /&gt;
* The CIO Port C counter is reset when VSYV changes state &lt;br /&gt;
&lt;br /&gt;
With the default settings, the CIO will count 26 HSYNC transitions (52 lines of the display covered in this time) and generate a interrupt. At VSYNC the counter is reset so that the interrupts are synchronised.&lt;br /&gt;
&lt;br /&gt;
I do not know the exact function of the counter's of Port B. &lt;br /&gt;
&lt;br /&gt;
CPC Interrupts:&lt;br /&gt;
&lt;br /&gt;
* synchronised to 2 HSYNCs after VSYNC&lt;br /&gt;
* interrupts cannot be generated closer than 32 lines&lt;br /&gt;
* counter inside Gate Array counts up to 52 lines.&lt;br /&gt;
* interrupt can be cleared by writing to bit 4 of Mode/ROM register in Gate Array (counter is also reset at this time) &lt;br /&gt;
&lt;br /&gt;
KC compact interrupts:&lt;br /&gt;
&lt;br /&gt;
* interrupt can be cleared by writing to bit 4 of Mode/ROM register at 0x07fxx (counter is *not* reset at this time)&lt;br /&gt;
* interrupt system fully programmable: can count HSYNCS, or count internal CIO clocks! &lt;br /&gt;
&lt;br /&gt;
Therefore, the KC compact interrupt system is more powerful than the CPC!&lt;br /&gt;
&lt;br /&gt;
== TEST feature ==&lt;br /&gt;
&lt;br /&gt;
When the KC compact is reset, the /TEST signal on the expansion port is checked.&lt;br /&gt;
&lt;br /&gt;
If it is high (1), the operating system will startup and BASIC will be entered. If it is low (0), the KC compact will enter a data transfer sequence using DATA2, DATA1, /STROBE and DATA7 on the expansion connector.&lt;br /&gt;
&lt;br /&gt;
Data transfer:&lt;br /&gt;
&lt;br /&gt;
The data transfer is controlled by another computer, the KC compact is the &amp;quot;slave&amp;quot;.&lt;br /&gt;
&lt;br /&gt;
Using DATA2, DATA1, /STROBE and DATA7, a program of 256 bytes in size can be transfered into KC compact memory at &amp;amp;a880. When all bytes have been transfered, this program will be executed.&lt;br /&gt;
&lt;br /&gt;
KCC Side:&lt;br /&gt;
&lt;br /&gt;
{|{{Prettytable|width: 700px; font-size: 2em;}}&lt;br /&gt;
|''Synchronisation stage (Data transfer begin)''||''/STROBE must read as &amp;quot;1&amp;quot;!! wait for DATA1 to change from &amp;quot;1&amp;quot; to &amp;quot;0&amp;quot;''&lt;br /&gt;
|-&lt;br /&gt;
|Synchronisation Acknowledge stage||write 0x0f: DATA2=&amp;quot;1&amp;quot;, DATA7=&amp;quot;0&amp;quot;''&lt;br /&gt;
|-&lt;br /&gt;
|Data transfer stage (repeat for 256 bytes)||Data byte transfer||repeat 8 times (once for each data bit) * write 0x0ff: DATA2=&amp;quot;1&amp;quot;,DATA7=&amp;quot;1&amp;quot;, and wait for /STROBE to read as &amp;quot;1&amp;quot; * read inputs: DATA1=data bit&lt;br /&gt;
|-&lt;br /&gt;
|||Data byte acknowledge stage||write: 0x0f0: DATA2=&amp;quot;0&amp;quot;, DATA7=&amp;quot;1&amp;quot;, and wait for /STROBE to read as &amp;quot;1&amp;quot;&lt;br /&gt;
|-&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
* /STROBE and DATA1 are inputs&lt;br /&gt;
* DATA2 and DATA7 are outputs&lt;br /&gt;
&lt;br /&gt;
== Connecting a KC compact to a CPC+ monitor ==&lt;br /&gt;
&lt;br /&gt;
These connections are known to work!&lt;br /&gt;
&lt;br /&gt;
What you need:&lt;br /&gt;
&lt;br /&gt;
* SCART plug&lt;br /&gt;
* 8-pin DIN socket &lt;br /&gt;
&lt;br /&gt;
Lead connections:&lt;br /&gt;
&lt;br /&gt;
* Connect the 8-pin DIN socket to the 8-pin DIN plug from the monitor&lt;br /&gt;
* Connect the SCART plug to the SCART socket on the back of the KC Compact &lt;br /&gt;
&lt;br /&gt;
Signal connections:&lt;br /&gt;
&lt;br /&gt;
{|{{Prettytable|width: 700px; font-size: 2em;}}&lt;br /&gt;
|''pin number on SCART plug''||''pin number on CPC+ monitor socket''&lt;br /&gt;
|-&lt;br /&gt;
|19 (Composite Video Output)||1 (Composite Sync)&lt;br /&gt;
|-&lt;br /&gt;
|17 (Video Ground)||8 (GND)&lt;br /&gt;
|-&lt;br /&gt;
|15 (Analogue Red)||4 (Red)&lt;br /&gt;
|-&lt;br /&gt;
|11 (Analogue Green)||2 (Green)&lt;br /&gt;
|-&lt;br /&gt;
|7 (Analogue Blue)||5 (Blue)&lt;br /&gt;
|-&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
== Pictures ==&lt;br /&gt;
&lt;br /&gt;
&amp;lt;gallery caption=&amp;quot;KC Compact Pictures&amp;quot;&amp;gt;&lt;br /&gt;
Image:Kcc top2.jpg|Top (with UHF cable)&lt;br /&gt;
Image:Kcc top.jpg|Top (Keyboard)&lt;br /&gt;
Image:Kcc open.jpg|Top (removed)&lt;br /&gt;
Image:Kcc pcb.jpg|Top (PCB)&lt;br /&gt;
Image:Kcc left.jpg|Left&lt;br /&gt;
Image:Kcc rigt.jpg|Right&lt;br /&gt;
Image:Kcc pjs.jpg|Right (Power, Joystick, Sound)&lt;br /&gt;
Image:Kcc labl.jpg|Sticker for Robotron K1505 computer (accidently badged on a KC computer)&lt;br /&gt;
Image:Kcc back.jpg|Rear&lt;br /&gt;
Image:Kcc pt.jpg|Rear (left: Power, Tape, UHF)&lt;br /&gt;
Image:Kcc asp.jpg|Rear (middle: UHF, Scart, Printer)&lt;br /&gt;
Image:Kcc exp.jpg|Rear (right: Expansion)&lt;br /&gt;
Image:Kcc lead.jpg|Aerial lead connector (UHF)&lt;br /&gt;
Image:KCC with power supply.jpg|Computer with Power Supply&lt;br /&gt;
Image:KCC boxed1.jpg|Boxed (closed)&lt;br /&gt;
Image:KCC boxed2.jpg|Boxed (open)&lt;br /&gt;
Image:Adcompa.jpg|KC Compact advert&lt;br /&gt;
Image:Kcc bright top.jpg|Top&lt;br /&gt;
Image:Kcc bright right.jpg|Right&lt;br /&gt;
Image:Kcc bright back.jpg|Rear&lt;br /&gt;
Image:Kcc base left.jpg|Base Left&lt;br /&gt;
Image:Kcc base right.jpg|Base Right&lt;br /&gt;
Image:Deepfb keyb size kcc.jpg|Dimensions&lt;br /&gt;
Image:KCCompact_PCB_Top.jpg|PCB Top&lt;br /&gt;
Image:KCCompact_PCB_Bottom.jpg|PCB Bottom&lt;br /&gt;
Image:KCCompact_Keyboard_Top.jpg|Keyboard Top&lt;br /&gt;
Image:KCCompact_Keyboard_Bottom.jpg|Keyboard bottom&lt;br /&gt;
&amp;lt;/gallery&amp;gt;&lt;br /&gt;
&lt;br /&gt;
== Datasheets ==&lt;br /&gt;
&lt;br /&gt;
* [[Media:CIO-Z8536.pdf]] - Zilog Z8536 CIO Datasheet (equivalent to U82536)&lt;br /&gt;
* [[Media:PPI M5L8255AP-5.pdf]] - Mitsubishi 8255 PPI Datasheet (equivalent to KP580BB55)&lt;br /&gt;
&lt;br /&gt;
== KC Compact Hardware Manuals (german) ==&lt;br /&gt;
&lt;br /&gt;
* [[Media:Kcc Beschreibung.pdf]] - Technical Data and Pin-Outs&lt;br /&gt;
* [[Media:Kcc Basic Handbuch.pdf]] - Basic Handbook&lt;br /&gt;
* [[Media:Kcc Systemhandbuch.pdf]] - System Handbook&lt;br /&gt;
* [[Media:Kcc Floppy System Handbuch.pdf]] - Floppy Handbook&lt;br /&gt;
&lt;br /&gt;
== KC Compact Cassette Manuals (german) ==&lt;br /&gt;
&lt;br /&gt;
* [[Media:Kcc kassette CC4001 Demokcc.pdf]] - Demonstration (Demo1, Demo2)&lt;br /&gt;
* [[Media:Kcc kassette CC6001 Spielebox1.pdf]] - Gamebox 1 (Strolch, Roessel, Match)&lt;br /&gt;
* [[Media:Kcc kassette CC6002 Spielebox2.pdf]] - Gamebox 2 (Orgel, Konzert)&lt;br /&gt;
* [[Media:Kcc kassette CC6003 Spielebox3.pdf]] - Gamebox 3 (Fruity Frank, Memory)&lt;br /&gt;
* ... Gamebox 4 (?)&lt;br /&gt;
* [[Media:Kcc kassette CC6005 Spielebox5.pdf]] - Gamebox 5 (Cubit, Muehle, Pagode)&lt;br /&gt;
* [[Media:Kcc kassette CC7001 Komponist.pdf]] - Composer (Komponi.bas, Fughette.mus, Menuett.mus, Gedanken.mus, Muslink.bas)&lt;br /&gt;
* [[Media:Kcc kassette CC7002 Grafix1.pdf]] - Graphic (Grafik1, BspMode0.mal, BspMode1.mal)&lt;br /&gt;
&lt;br /&gt;
== KC Compact Schematics ==&lt;br /&gt;
&lt;br /&gt;
&amp;lt;gallery&amp;gt;&lt;br /&gt;
File:Kcc schematic cpu io.gif|CPU and I/O Schematic&lt;br /&gt;
File:Kcc schematic memory.gif|Memory Schematic&lt;br /&gt;
File:Kcc schematic modulator.gif|Modulator Schematic&lt;br /&gt;
File:Kcc schematic video power.gif|Video and Power Schematic&lt;br /&gt;
File:Kcc block diagram.gif|Block Diagram&lt;br /&gt;
File:Kcc component map mainboard.gif|Component Map (Mainboard)&lt;br /&gt;
File:Kcc component map modulator.gif|Component Map (Modulator)&lt;br /&gt;
&amp;lt;/gallery&amp;gt;&lt;br /&gt;
&lt;br /&gt;
For schematics at higher resolution, see &lt;br /&gt;
Schematic (Modulator):[[Media:Kcc schem1.png|hires]], &lt;br /&gt;
Block Diagram (Mainboard):[[Media:Kcc schem2.png|hires]],&lt;br /&gt;
Component Map (Modulator):[[Media:Kcc schem3.png|hires]],&lt;br /&gt;
Schematic (CPU and I/O):[[Media:Kcc schem4l.png|left]] and [[Media:Kcc schem4r.png|right]],&lt;br /&gt;
Schematic (Memory):[[Media:Kcc schem5l.png|left]] and [[Media:Kcc schem5r.png|right]],&lt;br /&gt;
Schematic (Video and Power):[[Media:Kcc schem6l.png|left]] and [[Media:Kcc schem6r.png|right]],&lt;br /&gt;
Component Map (Mainboard):[[Media:Kcc schem7l.png|left]] and [[Media:Kcc schem7r.png|right]].&lt;br /&gt;
&lt;br /&gt;
== Operating systems ==&lt;br /&gt;
&lt;br /&gt;
* [[AMSDOS#BASDOS|BASDOS]] - AMSDOS clone&lt;br /&gt;
* [[CP/M#MicroDOS|MicroDOS]] - CP/M clone&lt;br /&gt;
&lt;br /&gt;
== KC Compact Computer Resources and Links ==&lt;br /&gt;
&lt;br /&gt;
* [[KC Compact Advert]] - KC Compact Advertising (with english translation)&lt;br /&gt;
* [[Clones|CPC Clones]] - List of all known CPC clones&lt;br /&gt;
* http://www.robotrontechnik.de/ - Retro site for east-german computers&lt;br /&gt;
* http://www.robotron-net.de/ - Retro site for east-german computers&lt;br /&gt;
* http://www.iee.et.tu-dresden.de/~kc-club/index.html - Retro site for east-german computers&lt;br /&gt;
* http://www.sax.de/~zander/index2h.html - KC Compact is found in the &amp;quot;Hobby&amp;quot; section&lt;br /&gt;
&lt;br /&gt;
[[Category:Non CPC Computers]][[Category:Clones]]&lt;/div&gt;</summary>
		<author><name>Db6128</name></author>	</entry>

	<entry>
		<id>https://oldwiki.cpcwiki.eu/index.php?title=KC_Compact&amp;diff=84646</id>
		<title>KC Compact</title>
		<link rel="alternate" type="text/html" href="https://oldwiki.cpcwiki.eu/index.php?title=KC_Compact&amp;diff=84646"/>
				<updated>2012-12-02T22:05:24Z</updated>
		
		<summary type="html">&lt;p&gt;Db6128: I didn't know who the &amp;quot;I&amp;quot;/&amp;quot;me&amp;quot; was, so after hunting it down in the history, I've noted it for others. :) Also, Z80 does have IN/OUT F (however useful they might be), so I removed the question.&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;''Note: Much of this article was originally written by [[CPCLER]], and so any references in the first person (&amp;quot;I&amp;quot;, &amp;quot;me&amp;quot;, ''etc.'') are probably by him.&lt;br /&gt;
&lt;br /&gt;
[[Image:Kcc top.jpg|right|thumb|250px|The East German KC Compact Computer]]&lt;br /&gt;
&lt;br /&gt;
== Background ==&lt;br /&gt;
&lt;br /&gt;
The KC compact is a [[Clones|clone]] of the Amstrad CPC and was developed by a East German company called RFT.&lt;br /&gt;
&lt;br /&gt;
The computer was designed in 1989 and made to celebrate 40 years of the DDR/GDR (Deutsche Demokratische Republik/German Democratic Republic). A year later the Berlin wall came down and East and West Germany were joined together and the DDR/GDR came to an end. Production of the computer halted, and it was only available for a short time and is rare.&lt;br /&gt;
&lt;br /&gt;
I read about the KC compact in the Amscene section of Amstrad Action magazine, a Future Publishing Ltd publication. From that point I was hooked and I eventually wanted to own one.&lt;br /&gt;
&lt;br /&gt;
During this time I found Andreas Krueger, webmaster of the Robotron-Net website, who owned one of these computers. Andreas was very helpful and provided photocopies of a manual and the schematics, a dump of the roms, ran some tests for me and more. I want to send him a big thankyou for all the help he gave.&lt;br /&gt;
&lt;br /&gt;
In the last few months (May 2001) I contacted Thomas Tratz who owns a KC Compact. Thomas Tratz runs a great website for QuickBASIC. He has given me many of the original manuals, original software, and I bought a real KC Compact from his cousin! A big thankyou to Thomas and his cousin!&lt;br /&gt;
&lt;br /&gt;
The case of the KC compact is the same as the Robotron BIC A5105, but has different hardware inside. The KC Compact I have does not have a information sticker on the underside, but information for the A5105!&lt;br /&gt;
&lt;br /&gt;
Many of the IC's inside are Russian and clones of other IC's. (The UA880 is a clone of the Zilog Z80, and the U82536 is a clone of the Zilog Z8536).&lt;br /&gt;
&lt;br /&gt;
I know of only a few people who have a real KC Compact (Andreas Kruger, Thomas Tratz, Frank Salmon of Oldbits computer collection and myself), if there are others please contact me and I will make a list of KC Compact owners, and you will be members of an exclusive club! :)&lt;br /&gt;
&lt;br /&gt;
This document will describe the hardware and software differences (that are known) between this system and the Amstrad CPC.&lt;br /&gt;
&lt;br /&gt;
== Alternative power supply ==&lt;br /&gt;
&lt;br /&gt;
With the help of Darren Jarvis I now have a new power supply for my KC Compact. He gave me a power pack from a PC laptop, and with a special lead, this works perfectly on the KC Compact.&lt;br /&gt;
&lt;br /&gt;
PC laptop power pack details:&lt;br /&gt;
&lt;br /&gt;
LISHIN INTERNATIONAL ENTERPRISE CORP. AC ADAPTOR.&lt;br /&gt;
&lt;br /&gt;
MODEL: LSE9802A1960&lt;br /&gt;
&lt;br /&gt;
INPUT: 100-240V A.C. 50/60Hz 1.5A&lt;br /&gt;
&lt;br /&gt;
OUTPUT: 19V D.C. 3.16A. 60W MAX&lt;br /&gt;
&lt;br /&gt;
The power pack has a 3.5mm power plug at the end.&lt;br /&gt;
&lt;br /&gt;
I made a lead which has a 3.5mm power socket and a telefunktion socket.&lt;br /&gt;
&lt;br /&gt;
== External power supply ==&lt;br /&gt;
&lt;br /&gt;
The official external power modulator provides +20V,-20V DC (err... more probably +20V and 0V) with 500mA (believed to be un-smoothed), from a source of ~220V at 50Hz.&lt;br /&gt;
&lt;br /&gt;
The external power modulator is connected to the computer's internal power modulator, which generates a smoothed 12V and 5V outputs and these provide the power for the IC's. Most or all runs at 5V. The 12V are used for the built-in TV modulator, and is also output to the Expansion Port and Scart connector (and, not sure, maybe used elsewhere, too)&lt;br /&gt;
&lt;br /&gt;
The internal power supply is very tolerant and the computer will run with input voltages as low as 6V, but the colours in the palette are weak. If the voltage is increased, the colours become strong, and around 18V-20V, they are all correct. If a low input voltage is used, it is likely that the 12V power output on the expansion connector will not be correct.&lt;br /&gt;
&lt;br /&gt;
The connector is believed to be a Telefunken Line socket (Maplins catalogue reference: FT99H). If you can't find this connector then you can make a suitable connector using a power lead and a sharp craft knife.&lt;br /&gt;
&lt;br /&gt;
== Software differences ==&lt;br /&gt;
&lt;br /&gt;
The base system has 32k of &lt;br /&gt;
&lt;br /&gt;
* Locomotive BASIC v1.1 rom (identical to BASIC rom in English CPC6128) (16k)&lt;br /&gt;
* A modified operating system rom from an English CPC6128 (16k)&lt;br /&gt;
&lt;br /&gt;
* Differences are:&lt;br /&gt;
&lt;br /&gt;
:* Different start-up message&lt;br /&gt;
:* Computer names (Schneider, Awa, Solavox etc) removed.&lt;br /&gt;
:* Initialisation code for the CIO (see details below)&lt;br /&gt;
:* Test program transfer (see details below) &lt;br /&gt;
&lt;br /&gt;
I believe most software will run, but I have not been able to test this, but programs that use the following may be broken:&lt;br /&gt;
&lt;br /&gt;
* Programs that rely on exact Interrupt mechanism of the CPC6128&lt;br /&gt;
* Programs that call direct into the operating system rom (these may work, because the changes to the operating system rom are minor)&lt;br /&gt;
* Programs that rely on a unofficial hardware feature (I do not know of all hardware details, so I cannot say the level of compatibility)&lt;br /&gt;
&lt;br /&gt;
The disc interface has a modified AMSDOS rom.&lt;br /&gt;
&lt;br /&gt;
== Hardware differences ==&lt;br /&gt;
&lt;br /&gt;
* The colour palette is not cleared to black on reset&lt;br /&gt;
* The Amstrad unofficial mode (bit 1=bit 0=1 of [[Gate Array]] mode register) does not exist. The clock to the shift registers is stopped. The last colour is output.&lt;br /&gt;
* The raster interrupt is generated in a different way by the CIO.&lt;br /&gt;
&lt;br /&gt;
This section describes the known hardware differences. This information is not definitive. I do not know all differences,&lt;br /&gt;
&lt;br /&gt;
== UA880 CPU (equivalent to Zilog Z80) ==&lt;br /&gt;
&lt;br /&gt;
The KC compact uses a UA880 CPU, which is a Russian clone of the [[Z80]]. It is not confirmed whether there are any actual differences compared to a real Z80. In terms of documentation, the KC Compact System Handbook lists the opcodes SLL, INF [a.k.a. IN F,(C)], and OUTF [a.k.a. OUT (C),F], whereas these have remained undocumented by Zilog.&lt;br /&gt;
&lt;br /&gt;
== Video ==&lt;br /&gt;
&lt;br /&gt;
* The [[CRTC]] should be more or less same as those used in CPCs. The handbook and schematic say the CRTC is a CM 607, but the CRTC in CPCLER's an HD6845P.&lt;br /&gt;
* The clocks for each mode (0,1 and 2) are derived from the main 16Mhz clock, these then drive the shift registers to output pixels to the display.&lt;br /&gt;
* Mode 3 is hardwired to 5V, so it doesn't have a clock. The shift registers are stopped and output the last colour they clocked in. Even if this mode was activated in way of connecting up the clock for Mode 0 it is not decoded the same as on the CPC: 8 colours are chosen from the 16 colour palette, instead of 4.&lt;br /&gt;
* There may be a bug whereby if the border colour is changed rapidly there could be 1 pixel of another colour output. When loading a game which changes the colour of the border, I have seen moving &amp;quot;snow&amp;quot; on the screen. I have seen this effect, but I need to confirm how it is generated.&lt;br /&gt;
* The video output doesn't generate luminance, so the KC Compact can't be used with a GT64 or MM14.&lt;br /&gt;
&lt;br /&gt;
== Colour-ROM ==&lt;br /&gt;
&lt;br /&gt;
The KC compact has a colour-rom. Each byte in the ROM defines the R,G and B of an output colour.&lt;br /&gt;
&lt;br /&gt;
{|{{Prettytable|width: 700px; font-size: 2em;}}&lt;br /&gt;
|''Bit''||''Function''&lt;br /&gt;
|-&lt;br /&gt;
|7||not used''&lt;br /&gt;
|-&lt;br /&gt;
|6||not used''&lt;br /&gt;
|-&lt;br /&gt;
|5||Green''&lt;br /&gt;
|-&lt;br /&gt;
|4||Green''&lt;br /&gt;
|-&lt;br /&gt;
|3||Red''&lt;br /&gt;
|-&lt;br /&gt;
|2||Red''&lt;br /&gt;
|-&lt;br /&gt;
|1||Blue''&lt;br /&gt;
|-&lt;br /&gt;
|0||Blue''&lt;br /&gt;
|-&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
The hardware colour index (defined by the I/O write: A15=&amp;quot;0&amp;quot;, A14=&amp;quot;1&amp;quot;, D7=&amp;quot;0&amp;quot;, D6=&amp;quot;1&amp;quot; D3-D0 define hardware colour index), is used as a look-up into the ROM.&lt;br /&gt;
&lt;br /&gt;
Each colour-element (R, G or B) is defined using 2 bits and has the potential to define a total palette of 64 colours. The colour-rom only uses 3 of the 4 possible settings for each colour-element. Looking at the schematic, the potential is not realised, the two signals for each colour use the same resistors before being combined. This means that the bit combinations 10 and 01 produce the same result. So this means only 27 colours are possible.&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
{|{{Prettytable|width: 700px; font-size: 2em;}}&lt;br /&gt;
|''Element Bit 1''||''Element Bit 0''||Intensity''&lt;br /&gt;
|-&lt;br /&gt;
|0||0||Zero''&lt;br /&gt;
|-&lt;br /&gt;
|0||1||Half (same as 10)''&lt;br /&gt;
|-&lt;br /&gt;
|1||0||Half (same as 01)''&lt;br /&gt;
|-&lt;br /&gt;
|1||1||Full''&lt;br /&gt;
|-&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
The colour ROM can be downloaded from the KC-Klub homepage.&lt;br /&gt;
&lt;br /&gt;
== External connectors ==&lt;br /&gt;
&lt;br /&gt;
=== Built-in connectors: pinout ===&lt;br /&gt;
&lt;br /&gt;
* [[Connector:Cassette recorder|Cassette recorder]] - other pinout as CPC, motor control is TTL (not a relay)&lt;br /&gt;
* [[Connector:Digital joystick|Digital joystick]] - exactly as CPC (all 9 pins are exactly same)&lt;br /&gt;
* [[Connector:Expansion port|Expansion port]] - almost same as CPC (plus some extra pins: additional voltages, TEST feature, FBAS output)&lt;br /&gt;
* [[Connector:Monitor|Monitor]] - 21pin Scart connector, and UHF modulator&lt;br /&gt;
* [[Connector:Printer port|Printer port]] - almost same as CPC Plus (25pin)&lt;br /&gt;
* [[Connector:Stereo sound|Stereo sound]] - 5pin DIN (not 3.5mm)&lt;br /&gt;
&lt;br /&gt;
=== Cassette socket ===&lt;br /&gt;
&lt;br /&gt;
The Cassette socket has different connection assignments compared to the CPC, so you can't use a CPC cassette lead directly with the KC Compact.&lt;br /&gt;
&lt;br /&gt;
I made a second lead which converted between KC Compact assignments and CPC assignments, which was connected between KC Compact and the CPC cassette lead.&lt;br /&gt;
&lt;br /&gt;
I have been successfully loaded some CPC software.&lt;br /&gt;
&lt;br /&gt;
=== Expansion socket ===&lt;br /&gt;
&lt;br /&gt;
The KC compact has a real connector compared to the P.C.B. edge connector of an English CPC6128. The connector appears to be a PC Card connector. This connector is not the same as the one on a German CPC6128.&lt;br /&gt;
&lt;br /&gt;
The expansion connector has more pins; 58 compared to 50 on an English CPC6128.&lt;br /&gt;
&lt;br /&gt;
I am in the process of making an adaptor so that I can test CPC hardware on the KC Compact.&lt;br /&gt;
&lt;br /&gt;
=== Parallel ===&lt;br /&gt;
&lt;br /&gt;
On the KC compact the parallel port is connected to Port A of the CIO.&lt;br /&gt;
&lt;br /&gt;
It is a general purpose I/O port. All 8-bits can be used for input or output. The input/output of each bit can be programmed. With standard setup, bit 7 is assigned to /STROBE, and bits 0-6 are assigned to Printer DATA, making a 7-bit printer port. Additionally, the 8th printer bit is implemented via Bit5 of PIO Port C (see [[8bit Printer Ports]]).&lt;br /&gt;
&lt;br /&gt;
* The Amstrad CPC has a single-direction, 7-bit port.&lt;br /&gt;
* The KC Compact has a bi-directional, 8-bit port.&lt;br /&gt;
&lt;br /&gt;
The KC compact parallel port is more powerful and flexible compared to the Amstrad CPC parallel port!&lt;br /&gt;
&lt;br /&gt;
=== Keyboard ===&lt;br /&gt;
&lt;br /&gt;
* The keyboard matrix of the KC compact supports all the keys of the CPC, but the following keys are not on the keyboard: F5, F6,F7,F8,F9.&lt;br /&gt;
* The KC Compact has a power LED (near CLR key). There are also (unused) locations for two additional LEDs (near TAB/CAPS key), eventually these locations are used by the D005 keyboard for KC-85 computers, or by the Robotron A5105 computer (both D005 and A5105 use the same case &amp;amp; keyboard as the KC Compact, aside from that, they have nothing to do with it).&lt;br /&gt;
&lt;br /&gt;
== KP580BB55 PIO (equivalent to 8255 PPI) ==&lt;br /&gt;
&lt;br /&gt;
Used (almost) identically as the CPC's [[8255]]. PIO Port B is slightly different:&lt;br /&gt;
&lt;br /&gt;
{|{{Prettytable|width: 700px; font-size: 2em;}}&lt;br /&gt;
|7||Cassette data read (identical to CPC)&lt;br /&gt;
|-&lt;br /&gt;
|6||Centronics/Printer Busy (identical to CPC)&lt;br /&gt;
|-&lt;br /&gt;
|5||/EXP (identical to CPC)&lt;br /&gt;
|-&lt;br /&gt;
|4||1 (+5v) (would be LK4 screen refresh rate in CPC) (but isn't like so in KC Compact?)&lt;br /&gt;
|-&lt;br /&gt;
|3||1 (+5v) (would be LK3 manufacturer ID in CPC)&lt;br /&gt;
|-&lt;br /&gt;
|2||0 (0v) (would be LK2 manufacturer ID in CPC)&lt;br /&gt;
|-&lt;br /&gt;
|1||/TEST (would be LK1 manufacturer ID in CPC)&lt;br /&gt;
|-&lt;br /&gt;
|0||VSYNC (identical to CPC)&lt;br /&gt;
|-&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
* Note: The KC System Handbook accidently calls the chip &amp;quot;KP580B55&amp;quot;, however, the correct name is &amp;quot;KP580BB55&amp;quot; (with double &amp;quot;B&amp;quot;).&lt;br /&gt;
&lt;br /&gt;
== U82536 CIO (equivalent to Zilog Z8536 CIO) ==&lt;br /&gt;
&lt;br /&gt;
* [[CIO Overview]]&lt;br /&gt;
* [[CIO Usage in KC Compact]]&lt;br /&gt;
* [[CIO Registers (Summary)]]&lt;br /&gt;
* [[CIO Registers (Detailed)]]&lt;br /&gt;
&lt;br /&gt;
The CIO chip is a Counter and I/O chip. In the KC compact system it is used to generate interrupts, access to the parallel printer port, and possibly video control.&lt;br /&gt;
&lt;br /&gt;
When A12 of the I/O address is &amp;quot;0&amp;quot;, the CIO is selected. Bit A9 and A8 of the I/O address select the registers of the CIO,&lt;br /&gt;
to avoid conflict with other peripherals the CIO should be access using:&lt;br /&gt;
&lt;br /&gt;
{|{{Prettytable|width: 700px; font-size: 2em;}}&lt;br /&gt;
|''Port''||''A9''||''A8''||''Register''||''Usage in KC Compact''&lt;br /&gt;
|-&lt;br /&gt;
|&amp;amp;ECxx||0||0||Port B data register||setup as timer and is connected to the video hardware (?)&lt;br /&gt;
|-&lt;br /&gt;
|&amp;amp;EDxx||0||1||Port C data register||setup as timer and is connected to the Interrupt hardware &lt;br /&gt;
|-&lt;br /&gt;
|&amp;amp;EExx||1||0||Control register||control&lt;br /&gt;
|-&lt;br /&gt;
|&amp;amp;EFxx||1||1||Port A data register||setup as I/O and is connected to the parallel printer port&lt;br /&gt;
|-&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
* Note: A8 is passed through an inverter, resulting in the above &amp;quot;B,C,Control,A&amp;quot; ordering - this is done to map Port A to the same address as the CPC Printer Port (without the inverter, CIO registers would have &amp;quot;C,B,A,Control&amp;quot; ordering).&lt;br /&gt;
&lt;br /&gt;
On start-up, the KC compact programs the CIO to the following state:&lt;br /&gt;
&lt;br /&gt;
* Port A: I/O mode: all bits are set to output, and bit 7 is inverted when writing. (bit 7 is /strobe signal to printer)&lt;br /&gt;
* Port B: Counter mode (port B is split into two counters, both are setup the same): continuous count, restarts when count is over, uses external trigger, uses external input to update count, pulse output (when count is over)&lt;br /&gt;
&lt;br /&gt;
* Port C: Counter mode: same configuration as port B. &lt;br /&gt;
&lt;br /&gt;
Port C is used to generate interrupts. The counter input is HSYNC (the counter counts counter-input transitions; low-high and high-low). The trigger input is VSYV (this signal is derived from VSYNC).&lt;br /&gt;
&lt;br /&gt;
What this means:&lt;br /&gt;
&lt;br /&gt;
* The CIO Port C counter is updated when HSYNC changes state&lt;br /&gt;
* The CIO Port C counter is reset when VSYV changes state &lt;br /&gt;
&lt;br /&gt;
With the default settings, the CIO will count 26 HSYNC transitions (52 lines of the display covered in this time) and generate a interrupt. At VSYNC the counter is reset so that the interrupts are synchronised.&lt;br /&gt;
&lt;br /&gt;
I do not know the exact function of the counter's of Port B. &lt;br /&gt;
&lt;br /&gt;
CPC Interrupts:&lt;br /&gt;
&lt;br /&gt;
* synchronised to 2 HSYNCs after VSYNC&lt;br /&gt;
* interrupts cannot be generated closer than 32 lines&lt;br /&gt;
* counter inside Gate Array counts up to 52 lines.&lt;br /&gt;
* interrupt can be cleared by writing to bit 4 of Mode/ROM register in Gate Array (counter is also reset at this time) &lt;br /&gt;
&lt;br /&gt;
KC compact interrupts:&lt;br /&gt;
&lt;br /&gt;
* interrupt can be cleared by writing to bit 4 of Mode/ROM register at 0x07fxx (counter is *not* reset at this time)&lt;br /&gt;
* interrupt system fully programmable: can count HSYNCS, or count internal CIO clocks! &lt;br /&gt;
&lt;br /&gt;
Therefore, the KC compact interrupt system is more powerful than the CPC!&lt;br /&gt;
&lt;br /&gt;
== TEST feature ==&lt;br /&gt;
&lt;br /&gt;
When the KC compact is reset, the /TEST signal on the expansion port is checked.&lt;br /&gt;
&lt;br /&gt;
If it is high (1), the operating system will startup and BASIC will be entered. If it is low (0), the KC compact will enter a data transfer sequence using DATA2, DATA1, /STROBE and DATA7 on the expansion connector.&lt;br /&gt;
&lt;br /&gt;
Data transfer:&lt;br /&gt;
&lt;br /&gt;
The data transfer is controlled by another computer, the KC compact is the &amp;quot;slave&amp;quot;.&lt;br /&gt;
&lt;br /&gt;
Using DATA2, DATA1, /STROBE and DATA7, a program of 256 bytes in size can be transfered into KC compact memory at &amp;amp;a880. When all bytes have been transfered, this program will be executed.&lt;br /&gt;
&lt;br /&gt;
KCC Side:&lt;br /&gt;
&lt;br /&gt;
{|{{Prettytable|width: 700px; font-size: 2em;}}&lt;br /&gt;
|''Synchronisation stage (Data transfer begin)''||''/STROBE must read as &amp;quot;1&amp;quot;!! wait for DATA1 to change from &amp;quot;1&amp;quot; to &amp;quot;0&amp;quot;''&lt;br /&gt;
|-&lt;br /&gt;
|Synchronisation Acknowledge stage||write 0x0f: DATA2=&amp;quot;1&amp;quot;, DATA7=&amp;quot;0&amp;quot;''&lt;br /&gt;
|-&lt;br /&gt;
|Data transfer stage (repeat for 256 bytes)||Data byte transfer||repeat 8 times (once for each data bit) * write 0x0ff: DATA2=&amp;quot;1&amp;quot;,DATA7=&amp;quot;1&amp;quot;, and wait for /STROBE to read as &amp;quot;1&amp;quot; * read inputs: DATA1=data bit&lt;br /&gt;
|-&lt;br /&gt;
|||Data byte acknowledge stage||write: 0x0f0: DATA2=&amp;quot;0&amp;quot;, DATA7=&amp;quot;1&amp;quot;, and wait for /STROBE to read as &amp;quot;1&amp;quot;&lt;br /&gt;
|-&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
* /STROBE and DATA1 are inputs&lt;br /&gt;
* DATA2 and DATA7 are outputs&lt;br /&gt;
&lt;br /&gt;
== Connecting a KC compact to a CPC+ monitor ==&lt;br /&gt;
&lt;br /&gt;
These connections are known to work!&lt;br /&gt;
&lt;br /&gt;
What you need:&lt;br /&gt;
&lt;br /&gt;
* SCART plug&lt;br /&gt;
* 8-pin DIN socket &lt;br /&gt;
&lt;br /&gt;
Lead connections:&lt;br /&gt;
&lt;br /&gt;
* Connect the 8-pin DIN socket to the 8-pin DIN plug from the monitor&lt;br /&gt;
* Connect the SCART plug to the SCART socket on the back of the KC Compact &lt;br /&gt;
&lt;br /&gt;
Signal connections:&lt;br /&gt;
&lt;br /&gt;
{|{{Prettytable|width: 700px; font-size: 2em;}}&lt;br /&gt;
|''pin number on SCART plug''||''pin number on CPC+ monitor socket''&lt;br /&gt;
|-&lt;br /&gt;
|19 (Composite Video Output)||1 (Composite Sync)&lt;br /&gt;
|-&lt;br /&gt;
|17 (Video Ground)||8 (GND)&lt;br /&gt;
|-&lt;br /&gt;
|15 (Analogue Red)||4 (Red)&lt;br /&gt;
|-&lt;br /&gt;
|11 (Analogue Green)||2 (Green)&lt;br /&gt;
|-&lt;br /&gt;
|7 (Analogue Blue)||5 (Blue)&lt;br /&gt;
|-&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
== Pictures ==&lt;br /&gt;
&lt;br /&gt;
&amp;lt;gallery caption=&amp;quot;KC Compact Pictures&amp;quot;&amp;gt;&lt;br /&gt;
Image:Kcc top2.jpg|Top (with UHF cable)&lt;br /&gt;
Image:Kcc top.jpg|Top (Keyboard)&lt;br /&gt;
Image:Kcc open.jpg|Top (removed)&lt;br /&gt;
Image:Kcc pcb.jpg|Top (PCB)&lt;br /&gt;
Image:Kcc left.jpg|Left&lt;br /&gt;
Image:Kcc rigt.jpg|Right&lt;br /&gt;
Image:Kcc pjs.jpg|Right (Power, Joystick, Sound)&lt;br /&gt;
Image:Kcc labl.jpg|Sticker for Robotron K1505 computer (accidently badged on a KC computer)&lt;br /&gt;
Image:Kcc back.jpg|Rear&lt;br /&gt;
Image:Kcc pt.jpg|Rear (left: Power, Tape, UHF)&lt;br /&gt;
Image:Kcc asp.jpg|Rear (middle: UHF, Scart, Printer)&lt;br /&gt;
Image:Kcc exp.jpg|Rear (right: Expansion)&lt;br /&gt;
Image:Kcc lead.jpg|Aerial lead connector (UHF)&lt;br /&gt;
Image:KCC with power supply.jpg|Computer with Power Supply&lt;br /&gt;
Image:KCC boxed1.jpg|Boxed (closed)&lt;br /&gt;
Image:KCC boxed2.jpg|Boxed (open)&lt;br /&gt;
Image:Adcompa.jpg|KC Compact advert&lt;br /&gt;
Image:Kcc bright top.jpg|Top&lt;br /&gt;
Image:Kcc bright right.jpg|Right&lt;br /&gt;
Image:Kcc bright back.jpg|Rear&lt;br /&gt;
Image:Kcc base left.jpg|Base Left&lt;br /&gt;
Image:Kcc base right.jpg|Base Right&lt;br /&gt;
Image:Deepfb keyb size kcc.jpg|Dimensions&lt;br /&gt;
Image:KCCompact_PCB_Top.jpg|PCB Top&lt;br /&gt;
Image:KCCompact_PCB_Bottom.jpg|PCB Bottom&lt;br /&gt;
Image:KCCompact_Keyboard_Top.jpg|Keyboard Top&lt;br /&gt;
Image:KCCompact_Keyboard_Bottom.jpg|Keyboard bottom&lt;br /&gt;
&amp;lt;/gallery&amp;gt;&lt;br /&gt;
&lt;br /&gt;
== Datasheets ==&lt;br /&gt;
&lt;br /&gt;
* [[Media:CIO-Z8536.pdf]] - Zilog Z8536 CIO Datasheet (equivalent to U82536)&lt;br /&gt;
* [[Media:PPI M5L8255AP-5.pdf]] - Mitsubishi 8255 PPI Datasheet (equivalent to KP580BB55)&lt;br /&gt;
&lt;br /&gt;
== KC Compact Hardware Manuals (german) ==&lt;br /&gt;
&lt;br /&gt;
* [[Media:Kcc Beschreibung.pdf]] - Technical Data and Pin-Outs&lt;br /&gt;
* [[Media:Kcc Basic Handbuch.pdf]] - Basic Handbook&lt;br /&gt;
* [[Media:Kcc Systemhandbuch.pdf]] - System Handbook&lt;br /&gt;
* [[Media:Kcc Floppy System Handbuch.pdf]] - Floppy Handbook&lt;br /&gt;
&lt;br /&gt;
== KC Compact Cassette Manuals (german) ==&lt;br /&gt;
&lt;br /&gt;
* [[Media:Kcc kassette CC4001 Demokcc.pdf]] - Demonstration (Demo1, Demo2)&lt;br /&gt;
* [[Media:Kcc kassette CC6001 Spielebox1.pdf]] - Gamebox 1 (Strolch, Roessel, Match)&lt;br /&gt;
* [[Media:Kcc kassette CC6002 Spielebox2.pdf]] - Gamebox 2 (Orgel, Konzert)&lt;br /&gt;
* [[Media:Kcc kassette CC6003 Spielebox3.pdf]] - Gamebox 3 (Fruity Frank, Memory)&lt;br /&gt;
* ... Gamebox 4 (?)&lt;br /&gt;
* [[Media:Kcc kassette CC6005 Spielebox5.pdf]] - Gamebox 5 (Cubit, Muehle, Pagode)&lt;br /&gt;
* [[Media:Kcc kassette CC7001 Komponist.pdf]] - Composer (Komponi.bas, Fughette.mus, Menuett.mus, Gedanken.mus, Muslink.bas)&lt;br /&gt;
* [[Media:Kcc kassette CC7002 Grafix1.pdf]] - Graphic (Grafik1, BspMode0.mal, BspMode1.mal)&lt;br /&gt;
&lt;br /&gt;
== KC Compact Schematics ==&lt;br /&gt;
&lt;br /&gt;
&amp;lt;gallery&amp;gt;&lt;br /&gt;
File:Kcc schematic cpu io.gif|CPU and I/O Schematic&lt;br /&gt;
File:Kcc schematic memory.gif|Memory Schematic&lt;br /&gt;
File:Kcc schematic modulator.gif|Modulator Schematic&lt;br /&gt;
File:Kcc schematic video power.gif|Video and Power Schematic&lt;br /&gt;
File:Kcc block diagram.gif|Block Diagram&lt;br /&gt;
File:Kcc component map mainboard.gif|Component Map (Mainboard)&lt;br /&gt;
File:Kcc component map modulator.gif|Component Map (Modulator)&lt;br /&gt;
&amp;lt;/gallery&amp;gt;&lt;br /&gt;
&lt;br /&gt;
For schematics at higher resolution, see &lt;br /&gt;
Schematic (Modulator):[[Media:Kcc schem1.png|hires]], &lt;br /&gt;
Block Diagram (Mainboard):[[Media:Kcc schem2.png|hires]],&lt;br /&gt;
Component Map (Modulator):[[Media:Kcc schem3.png|hires]],&lt;br /&gt;
Schematic (CPU and I/O):[[Media:Kcc schem4l.png|left]] and [[Media:Kcc schem4r.png|right]],&lt;br /&gt;
Schematic (Memory):[[Media:Kcc schem5l.png|left]] and [[Media:Kcc schem5r.png|right]],&lt;br /&gt;
Schematic (Video and Power):[[Media:Kcc schem6l.png|left]] and [[Media:Kcc schem6r.png|right]],&lt;br /&gt;
Component Map (Mainboard):[[Media:Kcc schem7l.png|left]] and [[Media:Kcc schem7r.png|right]].&lt;br /&gt;
&lt;br /&gt;
== Operating systems ==&lt;br /&gt;
&lt;br /&gt;
* [[AMSDOS#BASDOS|BASDOS]] - AMSDOS clone&lt;br /&gt;
* [[CP/M#MicroDOS|MicroDOS]] - CP/M clone&lt;br /&gt;
&lt;br /&gt;
== KC Compact Computer Resources and Links ==&lt;br /&gt;
&lt;br /&gt;
* [[KC Compact Advert]] - KC Compact Advertising (with english translation)&lt;br /&gt;
* [[Clones|CPC Clones]] - List of all known CPC clones&lt;br /&gt;
* http://www.robotrontechnik.de/ - Retro site for east-german computers&lt;br /&gt;
* http://www.robotron-net.de/ - Retro site for east-german computers&lt;br /&gt;
* http://www.iee.et.tu-dresden.de/~kc-club/index.html - Retro site for east-german computers&lt;br /&gt;
* http://www.sax.de/~zander/index2h.html - KC Compact is found in the &amp;quot;Hobby&amp;quot; section&lt;br /&gt;
&lt;br /&gt;
[[Category:Non CPC Computers]][[Category:Clones]]&lt;/div&gt;</summary>
		<author><name>Db6128</name></author>	</entry>

	<entry>
		<id>https://oldwiki.cpcwiki.eu/index.php?title=CPC_old_generation&amp;diff=84645</id>
		<title>CPC old generation</title>
		<link rel="alternate" type="text/html" href="https://oldwiki.cpcwiki.eu/index.php?title=CPC_old_generation&amp;diff=84645"/>
				<updated>2012-12-02T21:54:32Z</updated>
		
		<summary type="html">&lt;p&gt;Db6128: /* Similarities to the BBC Micro */ Replacing the self-confused bit about BBC BASIC for the CPC with a version that makes sense :P + a (necessarily) brief comparison of the two BASICs&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;[[Category:Hardware|*]][[Category:CPC Internal Components| ]][[Category:CPC History|*]][[Category:Amstrad Products| ]]&lt;br /&gt;
&lt;br /&gt;
[[Image:464.png|thumb|CPC 464 with Colour monitor]]&lt;br /&gt;
[[Image:Schneider 664 en.jpg|thumb|German CPC 664]]&lt;br /&gt;
&lt;br /&gt;
''The following text was copied in part from the [http://en.wikipedia.org/wiki/Amstrad_CPC English Wikipedia article].''&lt;br /&gt;
&lt;br /&gt;
==Hardware description==&lt;br /&gt;
All CPC models were based on a Zilog Z80 processor clocked at 4 MHz. Because a common pool of RAM is shared with the video circuits, the Z80 may only make a memory access once every four cycles, which has the effect of rounding all instruction cycle lengths up to the next multiple of four.&lt;br /&gt;
&lt;br /&gt;
The system came with 64 KB or 128 KB of RAM depending on the model (capable of being expanded to 576k). The machines also featured a standard 9-pin Atari-style joystick socket which was able to take two joysticks via a splitter.&lt;br /&gt;
&lt;br /&gt;
The machines' dimensions are:&lt;br /&gt;
*'''CPC464''' : 17 x 57.5 x 7.5&lt;br /&gt;
*'''CPC6128''' : 17.5 x 51.1 x 5&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
===Video (graphics): modes, outputs===&lt;br /&gt;
Underlying the CPC's video output was the [[CRTC|Motorola 6845]] address generator. This chip was connected to a pixel generator that supported 4 bpp, 2 bpp and 1 bpp output (bits per pixel). The address generator was clocked at a constant rate so the 4 bpp display generated half as many pixels as the 2 bpp and a quarter as many as the 1 bpp.&lt;br /&gt;
&lt;br /&gt;
The ROM featured three built-in display resolutions but many others could be achieved by reprogramming the 6845.&lt;br /&gt;
&lt;br /&gt;
The standard [[video modes]] were:&lt;br /&gt;
*'''Mode 0''': '''160×200''' pixels with 16 colours (4 bpp)&lt;br /&gt;
*'''Mode 1''': '''320×200''' pixels with 4 colours (2 bpp)&lt;br /&gt;
*'''Mode 2''': '''640×200''' pixels with 2 colours (1 bpp)&lt;br /&gt;
*'''Mode 3''': '''160×200''' pixels with 4 colours (2 bpp) (this is not an official mode, but rather a side-effect of the hardware)&lt;br /&gt;
&lt;br /&gt;
A colour palette of 27 colours was supported, derived from RGB colour space with each component assigned as either off, half on or on. The later '''Plus''' models extended this to 4096 colours and added support for hardware sprites.&lt;br /&gt;
&lt;br /&gt;
This hardware compares well with the other 8-bit computers. In particular the CPC lacks the colour clash of the ZX Spectrum, and clever programming of the 6845 could produce overscan, different resolutions (although with the same pixel density) and smooth pixel scrolling.&lt;br /&gt;
&lt;br /&gt;
The machine lacked either a RF TV or composite video output and instead shipped with a proprietary 5-pin DIN connector intended for use solely with the supplied Amstrad monitor. An external adapter for RF TV was available to be bought separately.&lt;br /&gt;
&lt;br /&gt;
The five-pin DIN connector is capable of driving a television with a correctly wired SCART lead.&lt;br /&gt;
&lt;br /&gt;
===Audio (sound)===&lt;br /&gt;
The CPC used the General Instrument AY-3-8912 sound chip, providing three channels, each configurable to generate square waves, white noise or both. A small array of hardware volume envelopes are available.&lt;br /&gt;
&lt;br /&gt;
Output was provided in mono by a small (4 cm) built-in loudspeaker with volume control, driven by an unusually powerful amplifier. Stereo output was provided through a 3.5mm headphone jack, not present on some early CPC464 models. In those models, what looked like a standard 3.5&amp;quot; headphone jack was actually used for connecting an external tape recorder, although later models used a five-pin DIN connector for the same purpose.&lt;br /&gt;
&lt;br /&gt;
Playback of digital sound samples at a resolution of a little better than 5-bit, as heard on the title screen of the game ''RoboCop'', was possible through clever programming of the sound chip. This trick was very processor intensive and hard to combine with any other processing.&lt;br /&gt;
&lt;br /&gt;
===The 3&amp;quot; floppy disk drives===&lt;br /&gt;
Amstrad's idiosyncratic choice of Hitachi's 3&amp;quot; floppy disk drive, when the rest of the PC industry was moving to Sony's 3.5&amp;quot; format, is often claimed to be due to Amstrad bulk-buying a large consignment of 3&amp;quot; drive units in Asia. The cheapest drive (built-in in later models) was a single-sided 40-track unit that required the user to physically remove and flip the disk to access both sides. Each side had its own independent write-protect switch. The sides were termed &amp;quot;A&amp;quot; and &amp;quot;B&amp;quot;, with each one holding 180KB (178KB in AMSDOS format) for a total of 360KB per disc.  &lt;br /&gt;
&lt;br /&gt;
The disk drive interface was a NEC 765 FDC, used for the same purpose in the IBM PC/XT, PC/AT and PS/2 machines. Many of its features were unused in order to cut costs, namely DMA transfers and support for single density disks. Disks were formatted as double density using Modified Frequency Modulation. &lt;br /&gt;
&lt;br /&gt;
Disks were shipped in a paper sleeve or a hard plastic case resembling a compact disc &amp;quot;jewel&amp;quot; case. The casing is thicker and more rigid than that of 3.5&amp;quot; diskettes and the sliding metal cover to protect the media surface is internal to the casing and latched, unlike the simple external sliding cover of Sony's version (some reviews at the time reported driving over them with no problems). Because of this they were significantly more expensive than both the 5.25&amp;quot; and 3.5&amp;quot; alternatives. This, combined with their low nominal capacities and their essentially proprietary nature, lead to the format being discontinued when the CPC itself was discontinued.&lt;br /&gt;
&lt;br /&gt;
Apart from Amstrad's other 3&amp;quot; machine, the PCW, and the ZX Spectrum +3 (produced by Sinclair), the only other computer systems to use them were the Sega SF-7000 and mostly obscure and exotic CP/M systems such as the Tatung Einstein and Osborne machines. It should be noted that some of these machines used drives with different pinouts and care should be taken when replacing drives.&lt;br /&gt;
&lt;br /&gt;
The data formatting of 3&amp;quot; disks was very similar to that of 5&amp;amp;frac14;&amp;quot; disks, and the Amstrad CPC machines were able to use 5&amp;amp;frac14;&amp;quot; drives through their &amp;quot;external drive&amp;quot; port - either one specially designed for use by the CPC or an adapted IBM-PC drive.&lt;br /&gt;
&lt;br /&gt;
A more popular alternative was to attach an adapted IBM-PC 3&amp;amp;frac12;&amp;quot; drive for operation in either single-sided 180 KB or double-sided 360 KB mode, although with the later availability of the PARADOS Disc Operating System, 720k per disc became available. (It was possible to patch CP/M Plus so that it recognised 80 track double sided disk formats, too.)&lt;br /&gt;
&lt;br /&gt;
===Serial port adaptor===&lt;br /&gt;
An official RS-232-C D25 serial port adaptor was produced that attached to the expansion connector at the rear of the machine, and had a through-connector for the CPC464 disk drive or other peripherals. The adaptor came with a &amp;quot;''Book of Spells''&amp;quot; for facilitating data transfer between other systems using a proprietary protocol in the device's own ROM, as well as terminal software to connect to British Telecom's Prestel service. A separate version of the ROM was created for the U.S. market due to the use of the commands &amp;quot;SUCK&amp;quot; and &amp;quot;BLOW&amp;quot;, which were considered unacceptable there.&lt;br /&gt;
&lt;br /&gt;
===Similarities to the BBC Micro===&lt;br /&gt;
The CPC has been termed an &amp;quot;improved Z80 implementation of the (earlier) BBC Micro&amp;quot; due to similarities in firmware and hardware. Both used the Motorola 6845 video address generator and the two have very similar sound output chips - the General Instrument AY-3-8912 in the CPC provided three tone channels each optionally with added noise and the Texas Instruments SN76489 in the BBC offered three tone channels and one exclusive noise channel.&lt;br /&gt;
&lt;br /&gt;
The BBC Micro used an Intel 8271 floppy disc controller. The CPC used the Intel 8272, which is similar to the 8271 but contains the addition of a double density (MFM) mode.&lt;br /&gt;
&lt;br /&gt;
The &amp;quot;two cursor&amp;quot; BASIC editing system seen on the Amstrad CPC (whereby holding Shift and using the cursor keys moves a shadow text cursor allowing text to be copied from another area of the screen to the normal cursor) was a lift from BBC BASIC, albeit substantially improved by allowing free movement of the normal cursor.&lt;br /&gt;
&lt;br /&gt;
Both systems provided similar systems of full hardware abstraction through Operating System calls. This saves programs which don't require time critical hardware access from having to touch the underlying machine and provides a level of machine portability for those programs.&lt;br /&gt;
&lt;br /&gt;
As the CPC had its own dialect of [[BASIC]], namely [[Locomotive BASIC]], so the BBC Micro has its own version named [[BBC BASIC]]. BBC BASIC evolved with subsequent models of BBC computers and with Acorn's next system, the Archimedes. Both had their own sets of advantages: Locomotive BASIC was faster in many contexts, had native support for text windows, had more comprehensive commands for manipulating sound, ''etc.''; BBC BASIC had support for procedures (rather than just arithmetic functions), an inline assembler, and others. Of note is the fact that among the numerous [http://www.bbcbasic.co.uk/bbcbasic.html ports of BBC Basic] produced by the company [http://www.rtrussell.co.uk/ R.T. Russell] is a version especially adapted for the Amstrad CPC, including support for its specific graphics and sound capabilities; there is also a generic version for [[CP/M]].&lt;br /&gt;
&lt;br /&gt;
==Software==&lt;br /&gt;
===Built-in BASIC and operating system===&lt;br /&gt;
Like most home computers at the time, the CPC had its OS and a BASIC interpreter built in as ROM. It used Locomotive BASIC - a variant specifically written for the CPC hardware which as a result was faster, more comfortable and more powerful than the generic but common Microsoft BASIC used by the Commodore 64 and MSX amongst others. It was particularly notable for providing easy access to the machine's video and audio resources in contrast to the arcane POKE commands required on some Microsoft implementations (the MSX implementation of Microsoft Basic being an exception, which even allowed for hardware sprite manipulation and collision detection).&lt;br /&gt;
&lt;br /&gt;
===Other languages===&lt;br /&gt;
Although it was possible to obtain compilers for Locomotive BASIC, BCPL, C, Forth, and Turbo Pascal the majority of the CPC's software was written in native Z80 assembly language.&lt;br /&gt;
&lt;br /&gt;
An interpreter for the educational language LOGO was also supplied with the 664 and 6128 (and available for the 464 with purchase of an external disc drive).&lt;br /&gt;
&lt;br /&gt;
==What was in the box?==&lt;br /&gt;
&lt;br /&gt;
=== CPC464 ===&lt;br /&gt;
&lt;br /&gt;
* The computer itself, including built-in [[Datacorder]]&lt;br /&gt;
* [[Demostration tape or disc|Demonstration tape]] in local language (UK, Germany, France, Spain)&lt;br /&gt;
* [[User Manual]]&lt;br /&gt;
* Either an [[Amstrad GT64/GT65 Green Monitor|Amstrad GT64 (Later: GT65) green monitor]] or an [[Amstrad CTM640/CTM644 Color Monitor|Amstrad CTM640 (Later: CTM644) Colour Monitor]]&lt;br /&gt;
* Optional: [[Amstrad MP1/MP2 modulator|Amstrad MP-1 (Later: MP-2) TV modulator and power supply]]&lt;br /&gt;
* A Gamepack consisting of 12 Amsoft Titles on Tape.&lt;br /&gt;
&lt;br /&gt;
&amp;lt;gallery&amp;gt;&lt;br /&gt;
Image:CPC464_pcb_r1.jpg|CPC464 PCB revision 0 (original)&lt;br /&gt;
Image:CPC464_pcb_r3.jpg|CPC464 PCB revision 3 (costdown)&lt;br /&gt;
Image:CPC464_new_amstrad_logo.jpg|CPC464 (new Amstrad logo - photo from costdown model)&lt;br /&gt;
&amp;lt;/gallery&amp;gt;&lt;br /&gt;
&lt;br /&gt;
=== CPC472 ===&lt;br /&gt;
&lt;br /&gt;
* [[472]]&lt;br /&gt;
&lt;br /&gt;
=== CPC664 ===&lt;br /&gt;
&lt;br /&gt;
* The computer itself, including built-in 3&amp;quot; disk drive&lt;br /&gt;
* [[System Disk]]: CP/M 2.2 disk with demo in local language (UK, Germany, France, Spain)&lt;br /&gt;
* [[User Manual]]&lt;br /&gt;
* Either an [[Amstrad GT64/GT65 Green Monitor|Amstrad GT65 green monitor]] or an [[Amstrad CTM640/CTM644 Color Monitor|Amstrad CTM644 Colour Monitor]]&lt;br /&gt;
* Optional: [[Amstrad MP1/MP2 modulator|Amstrad MP-2 TV modulator and power supply]]&lt;br /&gt;
&lt;br /&gt;
&amp;lt;gallery&amp;gt;&lt;br /&gt;
Image:664.jpg|The 664 in high-res&lt;br /&gt;
Image:CPC664_Top.jpg|CPC 664 Top&lt;br /&gt;
Image:CPC664_PCB_Top.jpg|CPC 664 Motherboard Top&lt;br /&gt;
Image:CPC664_PCB_Bottom.jpg|CPC 664 Motherboard Bottom&lt;br /&gt;
&amp;lt;/gallery&amp;gt;&lt;br /&gt;
&lt;br /&gt;
=== CPC6128 ===&lt;br /&gt;
&lt;br /&gt;
* The computer itself, including built-in 3&amp;quot; disk drive&lt;br /&gt;
* [[System Disk]]s with CP/M Plus, CP/M 2.2 and a demo in local language (UK, Germany, France, Spain)&lt;br /&gt;
* [[User Manual]]&lt;br /&gt;
* Either an [[Amstrad GT64/GT65 Green Monitor|Amstrad GT65 green monitor]] or an [[Amstrad CTM640/CTM644 Color Monitor|Amstrad CTM644 Colour Monitor]]&lt;br /&gt;
* Optional: [[Amstrad MP1/MP2 modulator|Amstrad MP-2 TV modulator and power supply]]&lt;br /&gt;
* Later models came with the [[Amstrad PP8 Promotional Pack]] &lt;br /&gt;
 &lt;br /&gt;
&amp;lt;gallery&amp;gt;&lt;br /&gt;
Image:CPC6128_Top.jpg|CPC 6128 Top&lt;br /&gt;
Image:CPC6128_PCB_Top_(Z70290_MC0020B).jpg|CPC 6128 Motherboard Top&lt;br /&gt;
Image:CPC6128_PCB_Bottom_(Z70290_MC0020B).jpg|CPC 6128 Motherboard Bottom&lt;br /&gt;
&amp;lt;/gallery&amp;gt;&lt;br /&gt;
&lt;br /&gt;
=== DDI-1 ===&lt;br /&gt;
&lt;br /&gt;
* Controller DDI-1&lt;br /&gt;
* 3&amp;quot; disk drive FD-1&lt;br /&gt;
* [[System Disk]]: CP/M 2.2 disk with demo&lt;br /&gt;
* [[User Manual]]&lt;br /&gt;
&lt;br /&gt;
==Others==&lt;br /&gt;
&lt;br /&gt;
* [[Keyboard Versions]]&lt;br /&gt;
* [[Mainboard Versions]]&lt;br /&gt;
* [[CPC6128_Keyboard_Disassembled]]&lt;br /&gt;
&lt;br /&gt;
==Clones==&lt;br /&gt;
&lt;br /&gt;
See [[Clones]] for a list of classic and modern clones.&lt;/div&gt;</summary>
		<author><name>Db6128</name></author>	</entry>

	<entry>
		<id>https://oldwiki.cpcwiki.eu/index.php?title=CNGSoft&amp;diff=84644</id>
		<title>CNGSoft</title>
		<link rel="alternate" type="text/html" href="https://oldwiki.cpcwiki.eu/index.php?title=CNGSoft&amp;diff=84644"/>
				<updated>2012-12-02T21:39:51Z</updated>
		
		<summary type="html">&lt;p&gt;Db6128: /* Links */ Whoops, getting rusty with my wikimarkup, evidently&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;'''CNGSoft''' (César Nicolás González) is the Spanish programmer who has been writing and releasing versions of the emulator [[CPCE]] since August 1st 1997.&lt;br /&gt;
&lt;br /&gt;
His other especially notable project is ''[[BB4CPC]]''[http://www.cpcwiki.eu/forum/games/bubble-bobble-remake-(bb4cpc)/msg36311/#msg36311], an enhanced remake of ''[[Bubble Bobble]]'' for the CPC. The system already had a CPC version released during its official heyday, but many players felt that it was not as good a port as it could have been; CNGSoft, being a big fan of the ''Bubble Bobble''/''[[Rainbow Islands]]'' franchise, wanted to release a version that took more advantage of the Amstrad's hardware and provided the best experience possible.&lt;br /&gt;
&lt;br /&gt;
He has made a very interesting tool for the CPC, LZ2PACKER, a [http://en.wikipedia.org/wiki/Self-extracting_archive self-extracting archive], as seen in the binary [ftp://ftp.nvg.ntnu.no/pub/cpc/games/arcade/jetsetff.zip JSW2]. The compression method is based on [http://genesis8.free.fr/frontend/misc/demopack.zip Demoniak's packer] and fully compatible with it.&lt;br /&gt;
&lt;br /&gt;
His most quoted ''excusatio non petita'' is &amp;quot;English isn't my first language, I apologize for using it so poorly.&amp;quot;&lt;br /&gt;
&lt;br /&gt;
==Releases==&lt;br /&gt;
&lt;br /&gt;
===Games===&lt;br /&gt;
* ''[[Justin]]''&lt;br /&gt;
* ''[[BB4CPC]]''&lt;br /&gt;
&lt;br /&gt;
===Emulator===&lt;br /&gt;
* [[CPCE]]&lt;br /&gt;
&lt;br /&gt;
===Tools===&lt;br /&gt;
* LZ2PACKER (see above)&lt;br /&gt;
&lt;br /&gt;
==Links==&lt;br /&gt;
* [http://cngsoft.no-ip.org/ Homepage]&lt;br /&gt;
* [http://cngsoft.no-ip.org/cng_bb4cpc.htm Home of ''BB4CPC'']&lt;br /&gt;
* [http://www.cpcwiki.eu/forum/games/bubble-bobble-remake-(bb4cpc)/msg36311/#msg36311 Topic on the CPC Wiki's forum about the release of ''BB4CPC'']&lt;br /&gt;
&lt;br /&gt;
[[Category:CPC scene members]]&lt;/div&gt;</summary>
		<author><name>Db6128</name></author>	</entry>

	<entry>
		<id>https://oldwiki.cpcwiki.eu/index.php?title=CNGSoft&amp;diff=84643</id>
		<title>CNGSoft</title>
		<link rel="alternate" type="text/html" href="https://oldwiki.cpcwiki.eu/index.php?title=CNGSoft&amp;diff=84643"/>
				<updated>2012-12-02T21:38:52Z</updated>
		
		<summary type="html">&lt;p&gt;Db6128: Adding info on BB4CPC; it's about time :P I guess we will need a dedicated page for that, too&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;'''CNGSoft''' (César Nicolás González) is the Spanish programmer who has been writing and releasing versions of the emulator [[CPCE]] since August 1st 1997.&lt;br /&gt;
&lt;br /&gt;
His other especially notable project is ''[[BB4CPC]]''[http://www.cpcwiki.eu/forum/games/bubble-bobble-remake-(bb4cpc)/msg36311/#msg36311], an enhanced remake of ''[[Bubble Bobble]]'' for the CPC. The system already had a CPC version released during its official heyday, but many players felt that it was not as good a port as it could have been; CNGSoft, being a big fan of the ''Bubble Bobble''/''[[Rainbow Islands]]'' franchise, wanted to release a version that took more advantage of the Amstrad's hardware and provided the best experience possible.&lt;br /&gt;
&lt;br /&gt;
He has made a very interesting tool for the CPC, LZ2PACKER, a [http://en.wikipedia.org/wiki/Self-extracting_archive self-extracting archive], as seen in the binary [ftp://ftp.nvg.ntnu.no/pub/cpc/games/arcade/jetsetff.zip JSW2]. The compression method is based on [http://genesis8.free.fr/frontend/misc/demopack.zip Demoniak's packer] and fully compatible with it.&lt;br /&gt;
&lt;br /&gt;
His most quoted ''excusatio non petita'' is &amp;quot;English isn't my first language, I apologize for using it so poorly.&amp;quot;&lt;br /&gt;
&lt;br /&gt;
==Releases==&lt;br /&gt;
&lt;br /&gt;
===Games===&lt;br /&gt;
* ''[[Justin]]''&lt;br /&gt;
* ''[[BB4CPC]]''&lt;br /&gt;
&lt;br /&gt;
===Emulator===&lt;br /&gt;
* [[CPCE]]&lt;br /&gt;
&lt;br /&gt;
===Tools===&lt;br /&gt;
* LZ2PACKER (see above)&lt;br /&gt;
&lt;br /&gt;
==Links==&lt;br /&gt;
* [http://cngsoft.no-ip.org/] Homepage&lt;br /&gt;
* [http://cngsoft.no-ip.org/cng_bb4cpc.htm] Home of ''BB4CPC''&lt;br /&gt;
&lt;br /&gt;
[[Category:CPC scene members]]&lt;/div&gt;</summary>
		<author><name>Db6128</name></author>	</entry>

	</feed>